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* [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring
@ 2020-11-02 17:49 Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings Dmitry Baryshkov
                   ` (15 more replies)
  0 siblings, 16 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

This patch serie adds support for thermal monitoring block on Qualcomm's
PMIC5 chips. PM8150{,b,l} and sm8250-mtp board device trees are extended
to support thermal zones provided by this thermal monitoring block.
Unlike the rest of PMIC thermal senses, these thermal zones describe
particular thermistors, which differ between from board to board.

Changes since v8:
 - Simplified qcom_vadc_map_voltage_temp() code by removing ascending
   tables support
 - Simplified qcom-vadc-common volt/temp mapping code
 - Implement suggestions by Matthias Kaehlcke: message formatting,
   rewrite comments, remove unused variable initialization.

Changes since v7:
 - Move qcom-vadc-common.h header to include/linux/iio/adc/ dir.
 - Use explicit sizeof(var) instead of hand-coding 1 when accessing
   adc-tm registers.
 - Remove buffer read from adc_tm5_init().
 - Remove extra on-stack var from adc_tm5_get_temp().
 - Minor formatting changes as suggested Daniel.

Changes since v6:
 - Added include <linux/bitfield.h> as noted by Jishnu Prakash.

Changes since v5:
 - Reworked DT bindings:
   * Removed qcom,adc-channel, instead it is parsed from io-channels
   * Renamed qcom,hw-settle-time to include -us suffix
 - Re-added monitor enabling which got lost during refactored. Noted by
   Jishnu Prakash.
 - Use threaded IRQ handler as susggested by Jishnu.

Changes since v4:
 - Added kernel-doc comments to ADC-TM structures
 - Used several sizeof(buf) instead of hand-conding register size

Changes since v3:
 - Fix DT description to spell "thermal monitoring" instead of just TM
 - Fix warnings in DT example
 - Add EXPORT_SYMBOL_GPL(of_iio_channel_get_by_name)
 - Fixed whitespace chanes in qcom-vadc-common.c
 - Removed error message if IIO chanel get returns -EPROBE_DEFER

Changes since v2:
 - IIO: export of_iio_channel_get_by_name() function
 - dt-bindings: move individual io-channels to each thermal monitoring
   channel rather than listing them all in device node
 - added fallback defaults to of_device_get_match_data calls in
   qcom-spmi-adc5 and qcom-spmi-adc-tm5 drivers
 - minor typo fixes

Changes since v1:
 - Introduce fixp_linear_interpolate() by Craig Tatlor
 - Lots of syntax/whitespace changes
 - Cleaned up register definitions per Jonathan's suggestion
 - Implemented most of the suggestions from Bjorn's and Jonathan's
   review



^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-04 18:32   ` Rob Herring
  2020-11-02 17:49 ` [PATCH v9 02/15] fixp-arith: add a linear interpolation function Dmitry Baryshkov
                   ` (14 subsequent siblings)
  15 siblings, 1 reply; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Rob Herring

Add bindings for thermal monitor, part of Qualcomm PMIC5 chips. It is a
close counterpart of VADC part of those PMICs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/thermal/qcom-spmi-adc-tm5.yaml   | 154 ++++++++++++++++++
 1 file changed, 154 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml

diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
new file mode 100644
index 000000000000..9da2b349030d
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm's SPMI PMIC ADC Thermal Monitoring
+maintainers:
+  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+properties:
+  compatible:
+    const: qcom,spmi-adc-tm5
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  "#thermal-sensor-cells":
+    const: 1
+    description:
+      Number of cells required to uniquely identify the thermal sensors. Since
+      we have multiple sensors this is set to 1
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  qcom,avg-samples:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Number of samples to be used for measurement.
+    enum:
+      - 1
+      - 2
+      - 4
+      - 8
+      - 16
+    default: 1
+
+  qcom,decimation:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: This parameter is used to decrease ADC sampling rate.
+            Quicker measurements can be made by reducing decimation ratio.
+    enum:
+      - 250
+      - 420
+      - 840
+    default: 840
+
+patternProperties:
+  "^([-a-z0-9]*)@[0-7]$":
+    type: object
+    description:
+      Represent one thermal sensor.
+
+    properties:
+      reg:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description: Specify the sensor channel. There are 8 channels in PMIC5's ADC TM
+        minimum: 0
+        maximum: 7
+
+      io-channels:
+        description:
+          From common IIO binding. Used to pipe PMIC ADC channel to thermal monitor
+
+      qcom,ratiometric:
+        $ref: /schemas/types.yaml#/definitions/flag
+        description:
+          Channel calibration type.
+          If this property is specified VADC will use the VDD reference
+          (1.875V) and GND for channel calibration. If property is not found,
+          channel will be calibrated with 0V and 1.25V reference channels,
+          also known as absolute calibration.
+
+      qcom,hw-settle-time-us:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description: Time between AMUX getting configured and the ADC starting conversion.
+        enum: [15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000]
+
+      qcom,pre-scaling:
+        $ref: /schemas/types.yaml#/definitions/uint32-array
+        description: Used for scaling the channel input signal before the
+          signal is fed to VADC. The configuration for this node is to know the
+          pre-determined ratio and use it for post scaling. It is a pair of
+          integers, denoting the numerator and denominator of the fraction by
+          which input signal is multiplied. For example, <1 3> indicates the
+          signal is scaled down to 1/3 of its value before ADC measurement.  If
+          property is not found default value depending on chip will be used.
+        items:
+          - const: 1
+          - enum: [ 1, 3, 4, 6, 20, 8, 10 ]
+
+    required:
+      - reg
+      - io-channels
+
+    additionalProperties:
+      false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - "#address-cells"
+  - "#size-cells"
+  - "#thermal-sensor-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/iio/qcom,spmi-vadc.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    spmi_bus {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        pm8150b_adc: adc@3100 {
+            reg = <0x3100>;
+            compatible = "qcom,spmi-adc5";
+            #address-cells = <1>;
+            #size-cells = <0>;
+            #io-channel-cells = <1>;
+            io-channel-ranges;
+
+            /* Other propreties are omitted */
+            conn-therm@4f {
+                reg = <ADC5_AMUX_THM3_100K_PU>;
+                qcom,ratiometric;
+                qcom,hw-settle-time = <200>;
+            };
+        };
+
+        pm8150b_adc_tm: adc-tm@3500 {
+            compatible = "qcom,spmi-adc-tm5";
+            reg = <0x3500>;
+            interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+            #thermal-sensor-cells = <1>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            conn-therm@0 {
+                reg = <0>;
+                io-channels = <&pm8150b_adc ADC5_AMUX_THM3_100K_PU>;
+                qcom,ratiometric;
+                qcom,hw-settle-time-us = <200>;
+            };
+        };
+    };
+...
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 02/15] fixp-arith: add a linear interpolation function
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 03/15] iio: adc: qcom-vadc: move several adc5 functions to common file Dmitry Baryshkov
                   ` (13 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Craig Tatlor,
	Jonathan Cameron

From: Craig Tatlor <ctatlor97@gmail.com>

Adds a function to interpolate against two points,
this is carried arount as a helper function by tons of drivers.

Signed-off-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 include/linux/fixp-arith.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/include/linux/fixp-arith.h b/include/linux/fixp-arith.h
index 8396013785ef..281cb4f83dbe 100644
--- a/include/linux/fixp-arith.h
+++ b/include/linux/fixp-arith.h
@@ -141,4 +141,23 @@ static inline s32 fixp_sin32_rad(u32 radians, u32 twopi)
 #define fixp_cos32_rad(rad, twopi)	\
 	fixp_sin32_rad(rad + twopi / 4, twopi)
 
+/**
+ * fixp_linear_interpolate() - interpolates a value from two known points
+ *
+ * @x0: x value of point 0
+ * @y0: y value of point 0
+ * @x1: x value of point 1
+ * @y1: y value of point 1
+ * @x: the linear interpolant
+ */
+static inline int fixp_linear_interpolate(int x0, int y0, int x1, int y1, int x)
+{
+	if (y0 == y1 || x == x0)
+		return y0;
+	if (x1 == x0 || x == x1)
+		return y1;
+
+	return y0 + ((y1 - y0) * (x - x0) / (x1 - x0));
+}
+
 #endif
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 03/15] iio: adc: qcom-vadc: move several adc5 functions to common file
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 02/15] fixp-arith: add a linear interpolation function Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 04/15] iio: adc: qcom-vadc-common: use fixp_linear_interpolate Dmitry Baryshkov
                   ` (12 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Jonathan Cameron

ADC-TM5 driver will make use of several functions from ADC5 driver. Move
them to qcom-vadc-common driver.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/iio/adc/qcom-spmi-adc5.c   | 75 +++---------------------------
 drivers/iio/adc/qcom-vadc-common.c | 68 ++++++++++++++++++++++++++-
 drivers/iio/adc/qcom-vadc-common.h | 10 +++-
 3 files changed, 82 insertions(+), 71 deletions(-)

diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index c10aa28be70a..c2da8f068b87 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -154,18 +154,6 @@ struct adc5_chip {
 	const struct adc5_data	*data;
 };
 
-static const struct vadc_prescale_ratio adc5_prescale_ratios[] = {
-	{.num =  1, .den =  1},
-	{.num =  1, .den =  3},
-	{.num =  1, .den =  4},
-	{.num =  1, .den =  6},
-	{.num =  1, .den = 20},
-	{.num =  1, .den =  8},
-	{.num = 10, .den = 81},
-	{.num =  1, .den = 10},
-	{.num =  1, .den = 16}
-};
-
 static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len)
 {
 	return regmap_bulk_read(adc->regmap, adc->base + offset, data, len);
@@ -181,55 +169,6 @@ static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val)
 	return regmap_update_bits(adc->regmap, adc->base + offset, mask, val);
 }
 
-static int adc5_prescaling_from_dt(u32 num, u32 den)
-{
-	unsigned int pre;
-
-	for (pre = 0; pre < ARRAY_SIZE(adc5_prescale_ratios); pre++)
-		if (adc5_prescale_ratios[pre].num == num &&
-		    adc5_prescale_ratios[pre].den == den)
-			break;
-
-	if (pre == ARRAY_SIZE(adc5_prescale_ratios))
-		return -EINVAL;
-
-	return pre;
-}
-
-static int adc5_hw_settle_time_from_dt(u32 value,
-					const unsigned int *hw_settle)
-{
-	unsigned int i;
-
-	for (i = 0; i < VADC_HW_SETTLE_SAMPLES_MAX; i++) {
-		if (value == hw_settle[i])
-			return i;
-	}
-
-	return -EINVAL;
-}
-
-static int adc5_avg_samples_from_dt(u32 value)
-{
-	if (!is_power_of_2(value) || value > ADC5_AVG_SAMPLES_MAX)
-		return -EINVAL;
-
-	return __ffs(value);
-}
-
-static int adc5_decimation_from_dt(u32 value,
-					const unsigned int *decimation)
-{
-	unsigned int i;
-
-	for (i = 0; i < ADC5_DECIMATION_SAMPLES_MAX; i++) {
-		if (value == decimation[i])
-			return i;
-	}
-
-	return -EINVAL;
-}
-
 static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data)
 {
 	int ret;
@@ -511,7 +450,7 @@ static int adc_read_raw_common(struct iio_dev *indio_dev,
 			return ret;
 
 		ret = qcom_adc5_hw_scale(prop->scale_fn_type,
-			&adc5_prescale_ratios[prop->prescale],
+			prop->prescale,
 			adc->data,
 			adc_code_volt, val);
 		if (ret)
@@ -717,7 +656,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
 
 	ret = of_property_read_u32(node, "qcom,decimation", &value);
 	if (!ret) {
-		ret = adc5_decimation_from_dt(value, data->decimation);
+		ret = qcom_adc5_decimation_from_dt(value, data->decimation);
 		if (ret < 0) {
 			dev_err(dev, "%02x invalid decimation %d\n",
 				chan, value);
@@ -730,7 +669,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
 
 	ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2);
 	if (!ret) {
-		ret = adc5_prescaling_from_dt(varr[0], varr[1]);
+		ret = qcom_adc5_prescaling_from_dt(varr[0], varr[1]);
 		if (ret < 0) {
 			dev_err(dev, "%02x invalid pre-scaling <%d %d>\n",
 				chan, varr[0], varr[1]);
@@ -759,11 +698,9 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
 		if ((dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR &&
 			dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR) ||
 			adc->data->info == &adc7_info)
-			ret = adc5_hw_settle_time_from_dt(value,
-							data->hw_settle_2);
+			ret = qcom_adc5_hw_settle_time_from_dt(value, data->hw_settle_2);
 		else
-			ret = adc5_hw_settle_time_from_dt(value,
-							data->hw_settle_1);
+			ret = qcom_adc5_hw_settle_time_from_dt(value, data->hw_settle_1);
 
 		if (ret < 0) {
 			dev_err(dev, "%02x invalid hw-settle-time %d us\n",
@@ -777,7 +714,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
 
 	ret = of_property_read_u32(node, "qcom,avg-samples", &value);
 	if (!ret) {
-		ret = adc5_avg_samples_from_dt(value);
+		ret = qcom_adc5_avg_samples_from_dt(value);
 		if (ret < 0) {
 			dev_err(dev, "%02x invalid avg-samples %d\n",
 				chan, value);
diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 5113aaa6ba67..d11f3343ad52 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -278,6 +278,18 @@ static const struct vadc_map_pt adcmap7_100k[] = {
 	{ 2420, 130048 }
 };
 
+static const struct vadc_prescale_ratio adc5_prescale_ratios[] = {
+	{.num =  1, .den =  1},
+	{.num =  1, .den =  3},
+	{.num =  1, .den =  4},
+	{.num =  1, .den =  6},
+	{.num =  1, .den = 20},
+	{.num =  1, .den =  8},
+	{.num = 10, .den = 81},
+	{.num =  1, .den = 10},
+	{.num =  1, .den = 16}
+};
+
 static int qcom_vadc_scale_hw_calib_volt(
 				const struct vadc_prescale_ratio *prescale,
 				const struct adc5_data *data,
@@ -647,10 +659,12 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype,
 EXPORT_SYMBOL(qcom_vadc_scale);
 
 int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
-		    const struct vadc_prescale_ratio *prescale,
+		    unsigned int prescale_ratio,
 		    const struct adc5_data *data,
 		    u16 adc_code, int *result)
 {
+	const struct vadc_prescale_ratio *prescale = &adc5_prescale_ratios[prescale_ratio];
+
 	if (!(scaletype >= SCALE_HW_CALIB_DEFAULT &&
 		scaletype < SCALE_HW_CALIB_INVALID)) {
 		pr_err("Invalid scale type %d\n", scaletype);
@@ -662,6 +676,58 @@ int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
 }
 EXPORT_SYMBOL(qcom_adc5_hw_scale);
 
+int qcom_adc5_prescaling_from_dt(u32 num, u32 den)
+{
+	unsigned int pre;
+
+	for (pre = 0; pre < ARRAY_SIZE(adc5_prescale_ratios); pre++)
+		if (adc5_prescale_ratios[pre].num == num &&
+		    adc5_prescale_ratios[pre].den == den)
+			break;
+
+	if (pre == ARRAY_SIZE(adc5_prescale_ratios))
+		return -EINVAL;
+
+	return pre;
+}
+EXPORT_SYMBOL(qcom_adc5_prescaling_from_dt);
+
+int qcom_adc5_hw_settle_time_from_dt(u32 value,
+				     const unsigned int *hw_settle)
+{
+	unsigned int i;
+
+	for (i = 0; i < VADC_HW_SETTLE_SAMPLES_MAX; i++) {
+		if (value == hw_settle[i])
+			return i;
+	}
+
+	return -EINVAL;
+}
+EXPORT_SYMBOL(qcom_adc5_hw_settle_time_from_dt);
+
+int qcom_adc5_avg_samples_from_dt(u32 value)
+{
+	if (!is_power_of_2(value) || value > ADC5_AVG_SAMPLES_MAX)
+		return -EINVAL;
+
+	return __ffs(value);
+}
+EXPORT_SYMBOL(qcom_adc5_avg_samples_from_dt);
+
+int qcom_adc5_decimation_from_dt(u32 value, const unsigned int *decimation)
+{
+	unsigned int i;
+
+	for (i = 0; i < ADC5_DECIMATION_SAMPLES_MAX; i++) {
+		if (value == decimation[i])
+			return i;
+	}
+
+	return -EINVAL;
+}
+EXPORT_SYMBOL(qcom_adc5_decimation_from_dt);
+
 int qcom_vadc_decimation_from_dt(u32 value)
 {
 	if (!is_power_of_2(value) || value < VADC_DECIMATION_MIN ||
diff --git a/drivers/iio/adc/qcom-vadc-common.h b/drivers/iio/adc/qcom-vadc-common.h
index 17b2fc4d8bf2..7e5f6428e311 100644
--- a/drivers/iio/adc/qcom-vadc-common.h
+++ b/drivers/iio/adc/qcom-vadc-common.h
@@ -168,10 +168,18 @@ struct qcom_adc5_scale_type {
 };
 
 int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
-		    const struct vadc_prescale_ratio *prescale,
+		    unsigned int prescale_ratio,
 		    const struct adc5_data *data,
 		    u16 adc_code, int *result_mdec);
 
+int qcom_adc5_prescaling_from_dt(u32 num, u32 den);
+
+int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle);
+
+int qcom_adc5_avg_samples_from_dt(u32 value);
+
+int qcom_adc5_decimation_from_dt(u32 value, const unsigned int *decimation);
+
 int qcom_vadc_decimation_from_dt(u32 value);
 
 #endif /* QCOM_VADC_COMMON_H */
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 04/15] iio: adc: qcom-vadc-common: use fixp_linear_interpolate
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (2 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 03/15] iio: adc: qcom-vadc: move several adc5 functions to common file Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 05/15] iio: adc: move qcom-vadc-common.h to include dir Dmitry Baryshkov
                   ` (11 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Jonathan Cameron

Use new function fixp_linear_interpolate() instead of hand-coding the
linear interpolation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/iio/adc/qcom-vadc-common.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index d11f3343ad52..40d77b3af1bb 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -2,6 +2,7 @@
 #include <linux/bug.h>
 #include <linux/kernel.h>
 #include <linux/bitops.h>
+#include <linux/fixp-arith.h>
 #include <linux/math64.h>
 #include <linux/log2.h>
 #include <linux/err.h>
@@ -368,10 +369,9 @@ static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts,
 	} else {
 		/* result is between search_index and search_index-1 */
 		/* interpolate linearly */
-		*output = (((s32)((pts[i].y - pts[i - 1].y) *
-			(input - pts[i - 1].x)) /
-			(pts[i].x - pts[i - 1].x)) +
-			pts[i - 1].y);
+		*output = fixp_linear_interpolate(pts[i - 1].x, pts[i - 1].y,
+						  pts[i].x, pts[i].y,
+						  input);
 	}
 
 	return 0;
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 05/15] iio: adc: move qcom-vadc-common.h to include dir
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (3 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 04/15] iio: adc: qcom-vadc-common: use fixp_linear_interpolate Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 06/15] iio: adc: qcom-spmi-adc5: use of_device_get_match_data Dmitry Baryshkov
                   ` (10 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

qcom-vadc-common module will be used by ADC thermal monitoring driver,
so move it to global include dir.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-pm8xxx-xoadc.c                   | 3 +--
 drivers/iio/adc/qcom-spmi-adc5.c                      | 2 +-
 drivers/iio/adc/qcom-spmi-vadc.c                      | 3 +--
 drivers/iio/adc/qcom-vadc-common.c                    | 3 +--
 {drivers => include/linux}/iio/adc/qcom-vadc-common.h | 2 ++
 5 files changed, 6 insertions(+), 7 deletions(-)
 rename {drivers => include/linux}/iio/adc/qcom-vadc-common.h (99%)

diff --git a/drivers/iio/adc/qcom-pm8xxx-xoadc.c b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
index 7e108da7d255..0610bf254771 100644
--- a/drivers/iio/adc/qcom-pm8xxx-xoadc.c
+++ b/drivers/iio/adc/qcom-pm8xxx-xoadc.c
@@ -10,6 +10,7 @@
  * Author: Linus Walleij <linus.walleij@linaro.org>
  */
 
+#include <linux/iio/adc/qcom-vadc-common.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 #include <linux/module.h>
@@ -21,8 +22,6 @@
 #include <linux/interrupt.h>
 #include <linux/regulator/consumer.h>
 
-#include "qcom-vadc-common.h"
-
 /*
  * Definitions for the "user processor" registers lifted from the v3.4
  * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index c2da8f068b87..b10a0fcf09dc 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -7,6 +7,7 @@
 #include <linux/completion.h>
 #include <linux/delay.h>
 #include <linux/err.h>
+#include <linux/iio/adc/qcom-vadc-common.h>
 #include <linux/iio/iio.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -19,7 +20,6 @@
 #include <linux/slab.h>
 
 #include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include "qcom-vadc-common.h"
 
 #define ADC5_USR_REVISION1			0x0
 #define ADC5_USR_STATUS1			0x8
diff --git a/drivers/iio/adc/qcom-spmi-vadc.c b/drivers/iio/adc/qcom-spmi-vadc.c
index b0388f8a69f4..05ff948372b3 100644
--- a/drivers/iio/adc/qcom-spmi-vadc.c
+++ b/drivers/iio/adc/qcom-spmi-vadc.c
@@ -7,6 +7,7 @@
 #include <linux/completion.h>
 #include <linux/delay.h>
 #include <linux/err.h>
+#include <linux/iio/adc/qcom-vadc-common.h>
 #include <linux/iio/iio.h>
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
@@ -20,8 +21,6 @@
 
 #include <dt-bindings/iio/qcom,spmi-vadc.h>
 
-#include "qcom-vadc-common.h"
-
 /* VADC register and bit definitions */
 #define VADC_REVISION2				0x1
 #define VADC_REVISION2_SUPPORTED_VADC		1
diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 40d77b3af1bb..ee94774b72e6 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -3,14 +3,13 @@
 #include <linux/kernel.h>
 #include <linux/bitops.h>
 #include <linux/fixp-arith.h>
+#include <linux/iio/adc/qcom-vadc-common.h>
 #include <linux/math64.h>
 #include <linux/log2.h>
 #include <linux/err.h>
 #include <linux/module.h>
 #include <linux/units.h>
 
-#include "qcom-vadc-common.h"
-
 /* Voltage to temperature */
 static const struct vadc_map_pt adcmap_100k_104ef_104fb[] = {
 	{1758,	-40},
diff --git a/drivers/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
similarity index 99%
rename from drivers/iio/adc/qcom-vadc-common.h
rename to include/linux/iio/adc/qcom-vadc-common.h
index 7e5f6428e311..03a9119edc71 100644
--- a/drivers/iio/adc/qcom-vadc-common.h
+++ b/include/linux/iio/adc/qcom-vadc-common.h
@@ -6,6 +6,8 @@
 #ifndef QCOM_VADC_COMMON_H
 #define QCOM_VADC_COMMON_H
 
+#include <linux/types.h>
+
 #define VADC_CONV_TIME_MIN_US			2000
 #define VADC_CONV_TIME_MAX_US			2100
 
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 06/15] iio: adc: qcom-spmi-adc5: use of_device_get_match_data
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (4 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 05/15] iio: adc: move qcom-vadc-common.h to include dir Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 07/15] iio: provide of_iio_channel_get_by_name() and devm_ version it Dmitry Baryshkov
                   ` (9 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Jonathan Cameron

Use of_device_get_match_data() instead of hand-coding it manually.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/iio/adc/qcom-spmi-adc5.c | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index b10a0fcf09dc..87438d1e5c0b 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -15,6 +15,7 @@
 #include <linux/math64.h>
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
 #include <linux/slab.h>
@@ -807,8 +808,6 @@ static int adc5_get_dt_data(struct adc5_chip *adc, struct device_node *node)
 	struct adc5_channel_prop prop, *chan_props;
 	struct device_node *child;
 	unsigned int index = 0;
-	const struct of_device_id *id;
-	const struct adc5_data *data;
 	int ret;
 
 	adc->nchannels = of_get_available_child_count(node);
@@ -827,24 +826,21 @@ static int adc5_get_dt_data(struct adc5_chip *adc, struct device_node *node)
 
 	chan_props = adc->chan_props;
 	iio_chan = adc->iio_chans;
-	id = of_match_node(adc5_match_table, node);
-	if (id)
-		data = id->data;
-	else
-		data = &adc5_data_pmic;
-	adc->data = data;
+	adc->data = of_device_get_match_data(adc->dev);
+	if (!adc->data)
+		adc->data = &adc5_data_pmic;
 
 	for_each_available_child_of_node(node, child) {
-		ret = adc5_get_dt_channel_data(adc, &prop, child, data);
+		ret = adc5_get_dt_channel_data(adc, &prop, child, adc->data);
 		if (ret) {
 			of_node_put(child);
 			return ret;
 		}
 
 		prop.scale_fn_type =
-			data->adc_chans[prop.channel].scale_fn_type;
+			adc->data->adc_chans[prop.channel].scale_fn_type;
 		*chan_props = prop;
-		adc_chan = &data->adc_chans[prop.channel];
+		adc_chan = &adc->data->adc_chans[prop.channel];
 
 		iio_chan->channel = prop.channel;
 		iio_chan->datasheet_name = prop.datasheet_name;
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 07/15] iio: provide of_iio_channel_get_by_name() and devm_ version it
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (5 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 06/15] iio: adc: qcom-spmi-adc5: use of_device_get_match_data Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 08/15] iio: adc: move vadc_map_pt from header to the source file Dmitry Baryshkov
                   ` (8 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash, Jonathan Cameron

There might be cases when the IIO channel is attached to the device
subnode instead of being attached to the main device node. Allow drivers
to query IIO channels by using device tree nodes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
 drivers/iio/inkern.c         | 34 ++++++++++++++++++++++++++--------
 include/linux/iio/consumer.h | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 62 insertions(+), 8 deletions(-)

diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
index ede99e0d5371..8ff0ac472de3 100644
--- a/drivers/iio/inkern.c
+++ b/drivers/iio/inkern.c
@@ -180,8 +180,8 @@ static struct iio_channel *of_iio_channel_get(struct device_node *np, int index)
 	return ERR_PTR(err);
 }
 
-static struct iio_channel *of_iio_channel_get_by_name(struct device_node *np,
-						      const char *name)
+struct iio_channel *of_iio_channel_get_by_name(struct device_node *np,
+					       const char *name)
 {
 	struct iio_channel *chan = NULL;
 
@@ -219,6 +219,7 @@ static struct iio_channel *of_iio_channel_get_by_name(struct device_node *np,
 
 	return chan;
 }
+EXPORT_SYMBOL_GPL(of_iio_channel_get_by_name);
 
 static struct iio_channel *of_iio_channel_get_all(struct device *dev)
 {
@@ -261,12 +262,6 @@ static struct iio_channel *of_iio_channel_get_all(struct device *dev)
 
 #else /* CONFIG_OF */
 
-static inline struct iio_channel *
-of_iio_channel_get_by_name(struct device_node *np, const char *name)
-{
-	return NULL;
-}
-
 static inline struct iio_channel *of_iio_channel_get_all(struct device *dev)
 {
 	return NULL;
@@ -382,6 +377,29 @@ struct iio_channel *devm_iio_channel_get(struct device *dev,
 }
 EXPORT_SYMBOL_GPL(devm_iio_channel_get);
 
+struct iio_channel *devm_of_iio_channel_get_by_name(struct device *dev,
+						    struct device_node *np,
+						    const char *channel_name)
+{
+	struct iio_channel **ptr, *channel;
+
+	ptr = devres_alloc(devm_iio_channel_free, sizeof(*ptr), GFP_KERNEL);
+	if (!ptr)
+		return ERR_PTR(-ENOMEM);
+
+	channel = of_iio_channel_get_by_name(np, channel_name);
+	if (IS_ERR(channel)) {
+		devres_free(ptr);
+		return channel;
+	}
+
+	*ptr = channel;
+	devres_add(dev, ptr);
+
+	return channel;
+}
+EXPORT_SYMBOL_GPL(devm_of_iio_channel_get_by_name);
+
 struct iio_channel *iio_channel_get_all(struct device *dev)
 {
 	const char *name;
diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
index c4118dcb8e05..0a90ba8fa1bb 100644
--- a/include/linux/iio/consumer.h
+++ b/include/linux/iio/consumer.h
@@ -13,6 +13,7 @@
 struct iio_dev;
 struct iio_chan_spec;
 struct device;
+struct device_node;
 
 /**
  * struct iio_channel - everything needed for a consumer to use a channel
@@ -97,6 +98,41 @@ void iio_channel_release_all(struct iio_channel *chan);
  */
 struct iio_channel *devm_iio_channel_get_all(struct device *dev);
 
+/**
+ * of_iio_channel_get_by_name() - get description of all that is needed to access channel.
+ * @np:			Pointer to consumer device tree node
+ * @consumer_channel:	Unique name to identify the channel on the consumer
+ *			side. This typically describes the channels use within
+ *			the consumer. E.g. 'battery_voltage'
+ */
+#ifdef CONFIG_OF
+struct iio_channel *of_iio_channel_get_by_name(struct device_node *np, const char *name);
+#else
+static inline struct iio_channel *
+of_iio_channel_get_by_name(struct device_node *np, const char *name)
+{
+	return NULL;
+}
+#endif
+
+/**
+ * devm_of_iio_channel_get_by_name() - Resource managed version of of_iio_channel_get_by_name().
+ * @dev:		Pointer to consumer device.
+ * @np:			Pointer to consumer device tree node
+ * @consumer_channel:	Unique name to identify the channel on the consumer
+ *			side. This typically describes the channels use within
+ *			the consumer. E.g. 'battery_voltage'
+ *
+ * Returns a pointer to negative errno if it is not able to get the iio channel
+ * otherwise returns valid pointer for iio channel.
+ *
+ * The allocated iio channel is automatically released when the device is
+ * unbound.
+ */
+struct iio_channel *devm_of_iio_channel_get_by_name(struct device *dev,
+						    struct device_node *np,
+						    const char *consumer_channel);
+
 struct iio_cb_buffer;
 /**
  * iio_channel_get_all_cb() - register callback for triggered capture
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 08/15] iio: adc: move vadc_map_pt from header to the source file
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (6 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 07/15] iio: provide of_iio_channel_get_by_name() and devm_ version it Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 09/15] iio: adc: qcom-vadc-common: rewrite vadc7 die temp calculation Dmitry Baryshkov
                   ` (7 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

struct vadc_map_pt is not used outside of qcom-vadc-common.c, so move it
there from the global header file.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-vadc-common.c       | 11 +++++++++++
 include/linux/iio/adc/qcom-vadc-common.h | 11 -----------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index ee94774b72e6..45a38602f66a 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -10,6 +10,17 @@
 #include <linux/module.h>
 #include <linux/units.h>
 
+/**
+ * struct vadc_map_pt - Map the graph representation for ADC channel
+ * @x: Represent the ADC digitized code.
+ * @y: Represent the physical data which can be temperature, voltage,
+ *     resistance.
+ */
+struct vadc_map_pt {
+	s32 x;
+	s32 y;
+};
+
 /* Voltage to temperature */
 static const struct vadc_map_pt adcmap_100k_104ef_104fb[] = {
 	{1758,	-40},
diff --git a/include/linux/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
index 03a9119edc71..1d337dd9e3dc 100644
--- a/include/linux/iio/adc/qcom-vadc-common.h
+++ b/include/linux/iio/adc/qcom-vadc-common.h
@@ -59,17 +59,6 @@
 #define DIE_TEMP_ADC7_SCALE_FACTOR		1000
 #define DIE_TEMP_ADC7_MAX			160000
 
-/**
- * struct vadc_map_pt - Map the graph representation for ADC channel
- * @x: Represent the ADC digitized code.
- * @y: Represent the physical data which can be temperature, voltage,
- *     resistance.
- */
-struct vadc_map_pt {
-	s32 x;
-	s32 y;
-};
-
 /*
  * VADC_CALIB_ABSOLUTE: uses the 625mV and 1.25V as reference channels.
  * VADC_CALIB_RATIOMETRIC: uses the reference voltage (1.8V) and GND for
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 09/15] iio: adc: qcom-vadc-common: rewrite vadc7 die temp calculation
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (7 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 08/15] iio: adc: move vadc_map_pt from header to the source file Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 10/15] iio: adc: qcom-vadc-common: simplify qcom_vadc_map_voltage_temp Dmitry Baryshkov
                   ` (6 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

qcom_vadc7_scale_hw_calib_die_temp() uses a table format different from
the rest of volt/temp conversion functions in this file. Also the
conversion functions results in non-monothonic values conversion, which
seems wrong.

Rewrite qcom_vadc7_scale_hw_calib_die_temp() to use
qcom_vadc_map_voltage_temp() directly, like the rest of conversion
functions do.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-vadc-common.c       | 50 +++++++-----------------
 include/linux/iio/adc/qcom-vadc-common.h |  5 ---
 2 files changed, 15 insertions(+), 40 deletions(-)

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 45a38602f66a..0c705bb473fe 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -101,18 +101,18 @@ static const struct vadc_map_pt adcmap_100k_104ef_104fb_1875_vref[] = {
 };
 
 static const struct vadc_map_pt adcmap7_die_temp[] = {
-	{ 433700, 1967},
-	{ 473100, 1964},
-	{ 512400, 1957},
-	{ 551500, 1949},
-	{ 590500, 1940},
-	{ 629300, 1930},
-	{ 667900, 1921},
-	{ 706400, 1910},
-	{ 744600, 1896},
-	{ 782500, 1878},
-	{ 820100, 1859},
-	{ 857300, 0},
+	{ 857300, 160000 },
+	{ 820100, 140000 },
+	{ 782500, 120000 },
+	{ 744600, 100000 },
+	{ 706400, 80000 },
+	{ 667900, 60000 },
+	{ 629300, 40000 },
+	{ 590500, 20000 },
+	{ 551500, 0 },
+	{ 512400, -20000 },
+	{ 473100, -40000 },
+	{ 433700, -60000 },
 };
 
 /*
@@ -585,33 +585,13 @@ static int qcom_vadc7_scale_hw_calib_die_temp(
 				u16 adc_code, int *result_mdec)
 {
 
-	int voltage, vtemp0, temp, i;
+	int voltage;
 
 	voltage = qcom_vadc_scale_code_voltage_factor(adc_code,
 				prescale, data, 1);
 
-	if (adcmap7_die_temp[0].x > voltage) {
-		*result_mdec = DIE_TEMP_ADC7_SCALE_1;
-		return 0;
-	}
-
-	if (adcmap7_die_temp[ARRAY_SIZE(adcmap7_die_temp) - 1].x <= voltage) {
-		*result_mdec = DIE_TEMP_ADC7_MAX;
-		return 0;
-	}
-
-	for (i = 0; i < ARRAY_SIZE(adcmap7_die_temp); i++)
-		if (adcmap7_die_temp[i].x > voltage)
-			break;
-
-	vtemp0 = adcmap7_die_temp[i - 1].x;
-	voltage = voltage - vtemp0;
-	temp = div64_s64(voltage * DIE_TEMP_ADC7_SCALE_FACTOR,
-		adcmap7_die_temp[i - 1].y);
-	temp += DIE_TEMP_ADC7_SCALE_1 + (DIE_TEMP_ADC7_SCALE_2 * (i - 1));
-	*result_mdec = temp;
-
-	return 0;
+	return qcom_vadc_map_voltage_temp(adcmap7_die_temp, ARRAY_SIZE(adcmap7_die_temp),
+			voltage, result_mdec);
 }
 
 static int qcom_vadc_scale_hw_smb_temp(
diff --git a/include/linux/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
index 1d337dd9e3dc..58216124d89d 100644
--- a/include/linux/iio/adc/qcom-vadc-common.h
+++ b/include/linux/iio/adc/qcom-vadc-common.h
@@ -54,11 +54,6 @@
 #define R_PU_100K				100000
 #define RATIO_MAX_ADC7				BIT(14)
 
-#define DIE_TEMP_ADC7_SCALE_1			-60000
-#define DIE_TEMP_ADC7_SCALE_2			20000
-#define DIE_TEMP_ADC7_SCALE_FACTOR		1000
-#define DIE_TEMP_ADC7_MAX			160000
-
 /*
  * VADC_CALIB_ABSOLUTE: uses the 625mV and 1.25V as reference channels.
  * VADC_CALIB_RATIOMETRIC: uses the reference voltage (1.8V) and GND for
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 10/15] iio: adc: qcom-vadc-common: simplify qcom_vadc_map_voltage_temp
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (8 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 09/15] iio: adc: qcom-vadc-common: rewrite vadc7 die temp calculation Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 11/15] iio: adc: qcom-vadc-common: scale adcmap_100k_104ef_104fb Dmitry Baryshkov
                   ` (5 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

All volt-temp tables here are sorted in descending order. There is no
need to accout for (unused) ascending table sorting case, so simplify
the conversion function.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-vadc-common.c | 21 +--------------------
 1 file changed, 1 insertion(+), 20 deletions(-)

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 0c705bb473fe..441843827f05 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -346,38 +346,19 @@ static struct qcom_adc5_scale_type scale_adc5_fn[] = {
 static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts,
 				      u32 tablesize, s32 input, int *output)
 {
-	bool descending = 1;
 	u32 i = 0;
 
 	if (!pts)
 		return -EINVAL;
 
-	/* Check if table is descending or ascending */
-	if (tablesize > 1) {
-		if (pts[0].x < pts[1].x)
-			descending = 0;
-	}
-
-	while (i < tablesize) {
-		if ((descending) && (pts[i].x < input)) {
-			/* table entry is less than measured*/
-			 /* value and table is descending, stop */
-			break;
-		} else if ((!descending) &&
-				(pts[i].x > input)) {
-			/* table entry is greater than measured*/
-			/*value and table is ascending, stop */
-			break;
-		}
+	while (i < tablesize && pts[i].x > input)
 		i++;
-	}
 
 	if (i == 0) {
 		*output = pts[0].y;
 	} else if (i == tablesize) {
 		*output = pts[tablesize - 1].y;
 	} else {
-		/* result is between search_index and search_index-1 */
 		/* interpolate linearly */
 		*output = fixp_linear_interpolate(pts[i - 1].x, pts[i - 1].y,
 						  pts[i].x, pts[i].y,
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 11/15] iio: adc: qcom-vadc-common: scale adcmap_100k_104ef_104fb
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (9 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 10/15] iio: adc: qcom-vadc-common: simplify qcom_vadc_map_voltage_temp Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor Dmitry Baryshkov
                   ` (4 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

Scale adcmap_100k_104ef_104fb temp values by the factor of 1000 to
remove extra multiplication in qcom_vadc_scale_therm().

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-vadc-common.c | 70 +++++++++++++++---------------
 1 file changed, 34 insertions(+), 36 deletions(-)

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 441843827f05..8682cf1e213f 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -23,40 +23,40 @@ struct vadc_map_pt {
 
 /* Voltage to temperature */
 static const struct vadc_map_pt adcmap_100k_104ef_104fb[] = {
-	{1758,	-40},
-	{1742,	-35},
-	{1719,	-30},
-	{1691,	-25},
-	{1654,	-20},
-	{1608,	-15},
-	{1551,	-10},
-	{1483,	-5},
-	{1404,	0},
-	{1315,	5},
-	{1218,	10},
-	{1114,	15},
-	{1007,	20},
-	{900,	25},
-	{795,	30},
-	{696,	35},
-	{605,	40},
-	{522,	45},
-	{448,	50},
-	{383,	55},
-	{327,	60},
-	{278,	65},
-	{237,	70},
-	{202,	75},
-	{172,	80},
-	{146,	85},
-	{125,	90},
-	{107,	95},
-	{92,	100},
-	{79,	105},
-	{68,	110},
-	{59,	115},
-	{51,	120},
-	{44,	125}
+	{1758,	-40000 },
+	{1742,	-35000 },
+	{1719,	-30000 },
+	{1691,	-25000 },
+	{1654,	-20000 },
+	{1608,	-15000 },
+	{1551,	-10000 },
+	{1483,	-5000 },
+	{1404,	0 },
+	{1315,	5000 },
+	{1218,	10000 },
+	{1114,	15000 },
+	{1007,	20000 },
+	{900,	25000 },
+	{795,	30000 },
+	{696,	35000 },
+	{605,	40000 },
+	{522,	45000 },
+	{448,	50000 },
+	{383,	55000 },
+	{327,	60000 },
+	{278,	65000 },
+	{237,	70000 },
+	{202,	75000 },
+	{172,	80000 },
+	{146,	85000 },
+	{125,	90000 },
+	{107,	95000 },
+	{92,	100000 },
+	{79,	105000 },
+	{68,	110000 },
+	{59,	115000 },
+	{51,	120000 },
+	{44,	125000 }
 };
 
 /*
@@ -418,8 +418,6 @@ static int qcom_vadc_scale_therm(const struct vadc_linear_graph *calib_graph,
 	if (ret)
 		return ret;
 
-	*result_mdec *= 1000;
-
 	return 0;
 }
 
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (10 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 11/15] iio: adc: qcom-vadc-common: scale adcmap_100k_104ef_104fb Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-19 15:33   ` Daniel Lezcano
  2020-11-02 17:49 ` [PATCH v9 13/15] arm64: dts: qcom: pm8150x: add definitions for adc-tm5 part Dmitry Baryshkov
                   ` (3 subsequent siblings)
  15 siblings, 1 reply; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

Add support for Thermal Monitoring part of PMIC5. This part is closely
coupled with ADC, using it's channels directly. ADC-TM support
generating interrupts on ADC value crossing low or high voltage bounds,
which is used to support thermal trip points.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iio/adc/qcom-vadc-common.c       |  44 ++
 drivers/thermal/qcom/Kconfig             |  11 +
 drivers/thermal/qcom/Makefile            |   1 +
 drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 604 +++++++++++++++++++++++
 include/linux/iio/adc/qcom-vadc-common.h |   3 +
 5 files changed, 663 insertions(+)
 create mode 100644 drivers/thermal/qcom/qcom-spmi-adc-tm5.c

diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
index 8682cf1e213f..da2f2afc26ee 100644
--- a/drivers/iio/adc/qcom-vadc-common.c
+++ b/drivers/iio/adc/qcom-vadc-common.c
@@ -368,6 +368,23 @@ static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts,
 	return 0;
 }
 
+static s32 qcom_vadc_map_temp_voltage(const struct vadc_map_pt *pts,
+				      u32 tablesize, int input)
+{
+	u32 i = 0;
+
+	while (i < tablesize && pts[i].y < input)
+		i++;
+
+	if (i == 0)
+		return pts[0].x;
+	if (i == tablesize)
+		return pts[tablesize - 1].x;
+
+	return fixp_linear_interpolate(pts[i - 1].y, pts[i - 1].x,
+			pts[i].y, pts[i].x, input);
+}
+
 static void qcom_vadc_scale_calib(const struct vadc_linear_graph *calib_graph,
 				  u16 adc_code,
 				  bool absolute,
@@ -463,6 +480,20 @@ static int qcom_vadc_scale_chg_temp(const struct vadc_linear_graph *calib_graph,
 	return 0;
 }
 
+static u16 qcom_vadc_scale_voltage_code(int voltage,
+					const struct vadc_prescale_ratio *prescale,
+					const u32 full_scale_code_volt,
+					unsigned int factor)
+{
+	s64 volt = voltage;
+	s64 adc_vdd_ref_mv = 1875;
+
+	volt *= prescale->num * factor * full_scale_code_volt;
+	volt = div64_s64(volt, (s64)prescale->den * adc_vdd_ref_mv * 1000);
+
+	return volt;
+}
+
 static int qcom_vadc_scale_code_voltage_factor(u16 adc_code,
 				const struct vadc_prescale_ratio *prescale,
 				const struct adc5_data *data,
@@ -627,6 +658,19 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype,
 }
 EXPORT_SYMBOL(qcom_vadc_scale);
 
+u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
+				 u32 full_scale_code_volt, int temp)
+{
+	const struct vadc_prescale_ratio *prescale = &adc5_prescale_ratios[prescale_ratio];
+	s32 voltage;
+
+	voltage = qcom_vadc_map_temp_voltage(adcmap_100k_104ef_104fb_1875_vref,
+					     ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
+					     temp);
+	return qcom_vadc_scale_voltage_code(voltage, prescale, full_scale_code_volt, 1000);
+}
+EXPORT_SYMBOL(qcom_adc_tm5_temp_volt_scale);
+
 int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
 		    unsigned int prescale_ratio,
 		    const struct adc5_data *data,
diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig
index aa9c1d80fae4..8d5ac2df26dc 100644
--- a/drivers/thermal/qcom/Kconfig
+++ b/drivers/thermal/qcom/Kconfig
@@ -10,6 +10,17 @@ config QCOM_TSENS
 	  Also able to set threshold temperature for both hot and cold and update
 	  when a threshold is reached.
 
+config QCOM_SPMI_ADC_TM5
+	tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5"
+	depends on OF && SPMI && IIO
+	select REGMAP_SPMI
+	select QCOM_VADC_COMMON
+	help
+	  This enables the thermal driver for the ADC thermal monitoring
+	  device. It shows up as a thermal zone with multiple trip points.
+	  Thermal client sets threshold temperature for both warm and cool and
+	  gets updated when a threshold is reached.
+
 config QCOM_SPMI_TEMP_ALARM
 	tristate "Qualcomm SPMI PMIC Temperature Alarm"
 	depends on OF && SPMI && IIO
diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
index ec86eef7f6a6..252ea7d9da0b 100644
--- a/drivers/thermal/qcom/Makefile
+++ b/drivers/thermal/qcom/Makefile
@@ -3,4 +3,5 @@ obj-$(CONFIG_QCOM_TSENS)	+= qcom_tsens.o
 
 qcom_tsens-y			+= tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \
 				   tsens-8960.o
+obj-$(CONFIG_QCOM_SPMI_ADC_TM5)	+= qcom-spmi-adc-tm5.o
 obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM)	+= qcom-spmi-temp-alarm.o
diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
new file mode 100644
index 000000000000..eda3f2d1697e
--- /dev/null
+++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
@@ -0,0 +1,604 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020 Linaro Limited
+ */
+
+#include <linux/bitfield.h>
+#include <linux/iio/adc/qcom-vadc-common.h>
+#include <linux/iio/consumer.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/thermal.h>
+
+#define ADC5_MAX_CHANNEL                        0xc0
+#define ADC_TM5_NUM_CHANNELS		8
+
+#define ADC_TM5_STATUS_LOW			0x0a
+
+#define ADC_TM5_STATUS_HIGH			0x0b
+
+#define ADC_TM5_NUM_BTM				0x0f
+
+#define ADC_TM5_ADC_DIG_PARAM			0x42
+
+#define ADC_TM5_FAST_AVG_CTL			(ADC_TM5_ADC_DIG_PARAM + 1)
+#define ADC_TM5_FAST_AVG_EN				BIT(7)
+
+#define ADC_TM5_MEAS_INTERVAL_CTL		(ADC_TM5_ADC_DIG_PARAM + 2)
+#define ADC_TM5_TIMER1					3 /* 3.9ms */
+
+#define ADC_TM5_MEAS_INTERVAL_CTL2		(ADC_TM5_ADC_DIG_PARAM + 3)
+#define ADC_TM5_MEAS_INTERVAL_CTL2_MASK			0xf0
+#define ADC_TM5_TIMER2					10 /* 1 second */
+#define ADC_TM5_MEAS_INTERVAL_CTL3_MASK			0xf
+#define ADC_TM5_TIMER3					4 /* 4 second */
+
+#define ADC_TM_EN_CTL1				0x46
+#define ADC_TM_EN					BIT(7)
+#define ADC_TM_CONV_REQ				0x47
+#define ADC_TM_CONV_REQ_EN				BIT(7)
+
+#define ADC_TM5_M_CHAN_BASE			0x60
+
+#define ADC_TM5_M_ADC_CH_SEL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 0)
+#define ADC_TM5_M_LOW_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 1)
+#define ADC_TM5_M_LOW_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 2)
+#define ADC_TM5_M_HIGH_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 3)
+#define ADC_TM5_M_HIGH_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 4)
+#define ADC_TM5_M_MEAS_INTERVAL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 5)
+#define ADC_TM5_M_CTL(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 6)
+#define ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK		0xf
+#define ADC_TM5_M_CTL_CAL_SEL_MASK			0x30
+#define ADC_TM5_M_CTL_CAL_VAL				0x40
+#define ADC_TM5_M_EN(n)				(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 7)
+#define ADC_TM5_M_MEAS_EN				BIT(7)
+#define ADC_TM5_M_HIGH_THR_INT_EN			BIT(1)
+#define ADC_TM5_M_LOW_THR_INT_EN			BIT(0)
+
+enum adc5_timer_select {
+	ADC5_TIMER_SEL_1 = 0,
+	ADC5_TIMER_SEL_2,
+	ADC5_TIMER_SEL_3,
+	ADC5_TIMER_SEL_NONE,
+};
+
+struct adc_tm5_data {
+	const u32	full_scale_code_volt;
+	unsigned int	*decimation;
+	unsigned int	*hw_settle;
+};
+
+enum adc_tm5_cal_method {
+	ADC_TM5_NO_CAL = 0,
+	ADC_TM5_RATIOMETRIC_CAL,
+	ADC_TM5_ABSOLUTE_CAL
+};
+
+struct adc_tm5_chip;
+
+/**
+ * struct adc_tm5_channel - ADC Thermal Monitoring channel data.
+ * @channel: channel number.
+ * @adc_channel: corresponding ADC channel number.
+ * @cal_method: calibration method.
+ * @prescale: channel scaling performed on the input signal.
+ * @hw_settle_time: the time between AMUX being configured and the
+ *	start of conversion.
+ * @iio: IIO channel instance used by this channel.
+ * @chip: ADC TM chip instance.
+ * @tzd: thermal zone device used by this channel.
+ */
+struct adc_tm5_channel {
+	unsigned int		channel;
+	unsigned int		adc_channel;
+	enum adc_tm5_cal_method	cal_method;
+	unsigned int		prescale;
+	unsigned int		hw_settle_time;
+	struct iio_channel	*iio;
+	struct adc_tm5_chip	*chip;
+	struct thermal_zone_device *tzd;
+};
+
+/**
+ * struct adc_tm5_chip - ADC Thermal Monitoring properties
+ * @regmap: SPMI ADC5 Thermal Monitoring  peripheral register map field.
+ * @dev: SPMI ADC5 device.
+ * @data: software configuration data.
+ * @channels: array of ADC TM channel data.
+ * @nchannels: amount of channels defined/allocated
+ * @decimation: sampling rate supported for the channel.
+ * @avg_samples: ability to provide single result from the ADC
+ *	that is an average of multiple measurements.
+ * @base: base address of TM registers.
+ */
+struct adc_tm5_chip {
+	struct regmap		*regmap;
+	struct device		*dev;
+	const struct adc_tm5_data	*data;
+	struct adc_tm5_channel	*channels;
+	unsigned int		nchannels;
+	unsigned int		decimation;
+	unsigned int		avg_samples;
+	u16			base;
+};
+
+static const struct adc_tm5_data adc_tm5_data_pmic = {
+	.full_scale_code_volt = 0x70e4,
+	.decimation = (unsigned int []) { 250, 420, 840 },
+	.hw_settle = (unsigned int []) { 15, 100, 200, 300, 400, 500, 600, 700,
+					 1000, 2000, 4000, 8000, 16000, 32000,
+					 64000, 128000 },
+};
+
+static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
+{
+	return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len);
+}
+
+static int adc_tm5_write(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
+{
+	return regmap_bulk_write(adc_tm->regmap, adc_tm->base + offset, data, len);
+}
+
+static int adc_tm5_reg_update(struct adc_tm5_chip *adc_tm, u16 offset, u8 mask, u8 val)
+{
+	return regmap_write_bits(adc_tm->regmap, adc_tm->base + offset, mask, val);
+}
+
+static irqreturn_t adc_tm5_isr(int irq, void *data)
+{
+	struct adc_tm5_chip *chip = data;
+	u8 status_low, status_high, ctl;
+	int ret, i;
+
+	ret = adc_tm5_read(chip, ADC_TM5_STATUS_LOW, &status_low, sizeof(status_low));
+	if (unlikely(ret)) {
+		dev_err(chip->dev, "read status low failed: %d\n", ret);
+		return IRQ_HANDLED;
+	}
+
+	ret = adc_tm5_read(chip, ADC_TM5_STATUS_HIGH, &status_high, sizeof(status_high));
+	if (unlikely(ret)) {
+		dev_err(chip->dev, "read status high failed: %d\n", ret);
+		return IRQ_HANDLED;
+	}
+
+	for (i = 0; i < chip->nchannels; i++) {
+		bool upper_set = false, lower_set = false;
+		unsigned int ch = chip->channels[i].channel;
+
+		/* No TZD, we warned at the boot time */
+		if (!chip->channels[i].tzd)
+			continue;
+
+		ret = adc_tm5_read(chip, ADC_TM5_M_EN(ch), &ctl, sizeof(ctl));
+		if (unlikely(ret)) {
+			dev_err(chip->dev, "ctl read failed: %d, channel %d\n", ret, i);
+			continue;
+		}
+
+		if (!(ctl & ADC_TM5_M_MEAS_EN))
+			continue;
+
+		lower_set = (status_low & BIT(ch)) &&
+			(ctl & ADC_TM5_M_LOW_THR_INT_EN);
+
+		upper_set = (status_high & BIT(ch)) &&
+			(ctl & ADC_TM5_M_HIGH_THR_INT_EN);
+
+		if (upper_set || lower_set)
+			thermal_zone_device_update(chip->channels[i].tzd,
+						   THERMAL_EVENT_UNSPECIFIED);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int adc_tm5_get_temp(void *data, int *temp)
+{
+	struct adc_tm5_channel *channel = data;
+
+	if (!channel || !channel->iio)
+		return -EINVAL;
+
+	return iio_read_channel_processed(channel->iio, temp);
+}
+
+static int adc_tm5_disable_channel(struct adc_tm5_channel *channel)
+{
+	struct adc_tm5_chip *chip = channel->chip;
+	unsigned int reg = ADC_TM5_M_EN(channel->channel);
+
+	return adc_tm5_reg_update(chip, reg,
+				  ADC_TM5_M_MEAS_EN |
+				  ADC_TM5_M_HIGH_THR_INT_EN |
+				  ADC_TM5_M_LOW_THR_INT_EN,
+				  0);
+}
+
+static int adc_tm5_enable(struct adc_tm5_chip *chip)
+{
+	int ret;
+	u8 data;
+
+	data = ADC_TM_EN;
+	ret = adc_tm5_write(chip, ADC_TM_EN_CTL1, &data, sizeof(data));
+	if (ret < 0) {
+		dev_err(chip->dev, "adc-tm enable failed\n");
+		return ret;
+	}
+
+	data = ADC_TM_CONV_REQ_EN;
+	ret = adc_tm5_write(chip, ADC_TM_CONV_REQ, &data, sizeof(data));
+	if (ret < 0) {
+		dev_err(chip->dev, "adc-tm request conversion failed\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int adc_tm5_configure(struct adc_tm5_channel *channel, int low, int high)
+{
+	struct adc_tm5_chip *chip = channel->chip;
+	u8 buf[8];
+	u16 reg = ADC_TM5_M_ADC_CH_SEL_CTL(channel->channel);
+	int ret;
+
+	ret = adc_tm5_read(chip, reg, buf, sizeof(buf));
+	if (ret) {
+		dev_err(chip->dev, "channel %d params read failed: %d\n", channel->channel, ret);
+		return ret;
+	}
+
+	buf[0] = channel->adc_channel;
+
+	/* High temperature corresponds to low voltage threshold */
+	if (high != INT_MAX) {
+		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
+				chip->data->full_scale_code_volt, high);
+
+		buf[1] = adc_code & 0xff;
+		buf[2] = adc_code >> 8;
+		buf[7] |= ADC_TM5_M_LOW_THR_INT_EN;
+	} else {
+		buf[7] &= ~ADC_TM5_M_LOW_THR_INT_EN;
+	}
+
+	/* Low temperature corresponds to high voltage threshold */
+	if (low != -INT_MAX) {
+		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
+				chip->data->full_scale_code_volt, low);
+
+		buf[3] = adc_code & 0xff;
+		buf[4] = adc_code >> 8;
+		buf[7] |= ADC_TM5_M_HIGH_THR_INT_EN;
+	} else {
+		buf[7] &= ~ADC_TM5_M_HIGH_THR_INT_EN;
+	}
+
+	buf[5] = ADC5_TIMER_SEL_2;
+
+	/* Set calibration select, hw_settle delay */
+	buf[6] &= ~ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK;
+	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK, channel->hw_settle_time);
+	buf[6] &= ~ADC_TM5_M_CTL_CAL_SEL_MASK;
+	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_CAL_SEL_MASK, channel->cal_method);
+
+	buf[7] |= ADC_TM5_M_MEAS_EN;
+
+	ret = adc_tm5_write(chip, reg, buf, sizeof(buf));
+	if (ret) {
+		dev_err(chip->dev, "channel %d params write failed: %d\n", channel->channel, ret);
+		return ret;
+	}
+
+	return adc_tm5_enable(chip);
+}
+
+static int adc_tm5_set_trips(void *data, int low, int high)
+{
+	struct adc_tm5_channel *channel = data;
+	struct adc_tm5_chip *chip;
+	int ret;
+
+	if (!channel)
+		return -EINVAL;
+
+	chip = channel->chip;
+	dev_dbg(chip->dev, "%d:low(mdegC):%d, high(mdegC):%d\n",
+		channel->channel, low, high);
+
+	if (high == INT_MAX && low <= -INT_MAX)
+		ret = adc_tm5_disable_channel(channel);
+	else
+		ret = adc_tm5_configure(channel, low, high);
+
+	return ret;
+}
+
+static struct thermal_zone_of_device_ops adc_tm5_ops = {
+	.get_temp = adc_tm5_get_temp,
+	.set_trips = adc_tm5_set_trips,
+};
+
+static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm)
+{
+	unsigned int i;
+	struct thermal_zone_device *tzd;
+
+	for (i = 0; i < adc_tm->nchannels; i++) {
+		adc_tm->channels[i].chip = adc_tm;
+
+		tzd = devm_thermal_zone_of_sensor_register(adc_tm->dev,
+							   adc_tm->channels[i].channel,
+							   &adc_tm->channels[i],
+							   &adc_tm5_ops);
+		if (IS_ERR(tzd)) {
+			dev_err(adc_tm->dev, "Error registering TZ zone for channel %d: %ld\n",
+				adc_tm->channels[i].channel, PTR_ERR(tzd));
+			return PTR_ERR(tzd);
+		}
+		adc_tm->channels[i].tzd = tzd;
+	}
+
+	return 0;
+}
+
+static int adc_tm5_init(struct adc_tm5_chip *chip)
+{
+	u8 buf[4], channels_available;
+	int ret;
+	unsigned int i;
+
+	for (i = 0; i < chip->nchannels; i++) {
+		if (chip->channels[i].channel >= channels_available) {
+			dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
+			return -EINVAL;
+		}
+	}
+
+	ret = adc_tm5_read(chip, ADC_TM5_NUM_BTM,
+			   &channels_available, sizeof(channels_available));
+	if (ret) {
+		dev_err(chip->dev, "read failed for BTM channels\n");
+		return ret;
+	}
+
+	buf[0] = chip->decimation;
+	buf[1] = chip->avg_samples | ADC_TM5_FAST_AVG_EN;
+	buf[2] = ADC_TM5_TIMER1;
+	buf[3] = FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL2_MASK, ADC_TM5_TIMER2) |
+		 FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL3_MASK, ADC_TM5_TIMER3);
+
+	ret = adc_tm5_write(chip, ADC_TM5_ADC_DIG_PARAM, buf, sizeof(buf));
+	if (ret) {
+		dev_err(chip->dev, "block write failed: %d\n", ret);
+		return ret;
+	}
+
+	return ret;
+}
+
+static int adc_tm5_get_dt_channel_data(struct adc_tm5_chip *adc_tm,
+				       struct adc_tm5_channel *channel,
+				       struct device_node *node)
+{
+	const char *name = node->name;
+	u32 chan, value, varr[2];
+	int ret;
+	struct device *dev = adc_tm->dev;
+	struct of_phandle_args args;
+
+	ret = of_property_read_u32(node, "reg", &chan);
+	if (ret) {
+		dev_err(dev, "%s: invalid channel number %d\n", name, ret);
+		return ret;
+	}
+
+	if (chan >= ADC_TM5_NUM_CHANNELS) {
+		dev_err(dev, "%s: channel number too big: %d\n", name, chan);
+		return -EINVAL;
+	}
+
+	channel->channel = chan;
+
+	/*
+	 * We are tied to PMIC's ADC controller, which always use single
+	 * argument for channel number.  So don't bother parsing
+	 * #io-channel-cells, just enforce cell_count = 1.
+	 */
+	ret = of_parse_phandle_with_fixed_args(node, "io-channels", 1, 0, &args);
+	if (ret < 0) {
+		dev_err(dev, "%s: error parsing ADC channel number %d: %d\n", name, chan, ret);
+		return ret;
+	}
+	of_node_put(args.np);
+
+	if (args.args_count != 1 || args.args[0] >= ADC5_MAX_CHANNEL) {
+		dev_err(dev, "%s: invalid ADC channel number %d\n", name, chan);
+		return ret;
+	}
+	channel->adc_channel = args.args[0];
+
+	channel->iio = devm_of_iio_channel_get_by_name(adc_tm->dev, node, NULL);
+	if (IS_ERR(channel->iio)) {
+		ret = PTR_ERR(channel->iio);
+		if (ret != -EPROBE_DEFER)
+			dev_err(dev, "%s: error getting channel: %d\n", name, ret);
+		return ret;
+	}
+
+	ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2);
+	if (!ret) {
+		ret = qcom_adc5_prescaling_from_dt(varr[0], varr[1]);
+		if (ret < 0) {
+			dev_err(dev, "%s: invalid pre-scaling <%d %d>\n",
+				name, varr[0], varr[1]);
+			return ret;
+		}
+		channel->prescale = ret;
+	} else {
+		/* 1:1 prescale is index 0 */
+		channel->prescale = 0;
+	}
+
+	ret = of_property_read_u32(node, "qcom,hw-settle-time-us", &value);
+	if (!ret) {
+		ret = qcom_adc5_hw_settle_time_from_dt(value, adc_tm->data->hw_settle);
+		if (ret < 0) {
+			dev_err(dev, "%s invalid hw-settle-time-us %d us\n",
+				name, value);
+			return ret;
+		}
+		channel->hw_settle_time = ret;
+	} else {
+		channel->hw_settle_time = VADC_DEF_HW_SETTLE_TIME;
+	}
+
+	if (of_property_read_bool(node, "qcom,ratiometric"))
+		channel->cal_method = ADC_TM5_RATIOMETRIC_CAL;
+	else
+		channel->cal_method = ADC_TM5_ABSOLUTE_CAL;
+
+	return 0;
+}
+
+static int adc_tm5_get_dt_data(struct adc_tm5_chip *adc_tm, struct device_node *node)
+{
+	struct adc_tm5_channel *channels;
+	struct device_node *child;
+	u32 value;
+	int ret;
+	struct device *dev = adc_tm->dev;
+
+	adc_tm->nchannels = of_get_available_child_count(node);
+	if (!adc_tm->nchannels)
+		return -EINVAL;
+
+	adc_tm->channels = devm_kcalloc(dev, adc_tm->nchannels,
+					sizeof(*adc_tm->channels), GFP_KERNEL);
+	if (!adc_tm->channels)
+		return -ENOMEM;
+
+	channels = adc_tm->channels;
+
+	adc_tm->data = of_device_get_match_data(dev);
+	if (!adc_tm->data)
+		adc_tm->data = &adc_tm5_data_pmic;
+
+	ret = of_property_read_u32(node, "qcom,decimation", &value);
+	if (!ret) {
+		ret = qcom_adc5_decimation_from_dt(value, adc_tm->data->decimation);
+		if (ret < 0) {
+			dev_err(dev, "invalid decimation %d\n", value);
+			return ret;
+		}
+		adc_tm->decimation = ret;
+	} else {
+		adc_tm->decimation = ADC5_DECIMATION_DEFAULT;
+	}
+
+	ret = of_property_read_u32(node, "qcom,avg-samples", &value);
+	if (!ret) {
+		ret = qcom_adc5_avg_samples_from_dt(value);
+		if (ret < 0) {
+			dev_err(dev, "invalid avg-samples %d\n", value);
+			return ret;
+		}
+		adc_tm->avg_samples = ret;
+	} else {
+		adc_tm->avg_samples = VADC_DEF_AVG_SAMPLES;
+	}
+
+	for_each_available_child_of_node(node, child) {
+		ret = adc_tm5_get_dt_channel_data(adc_tm, channels, child);
+		if (ret) {
+			of_node_put(child);
+			return ret;
+		}
+
+		channels++;
+	}
+
+	return 0;
+}
+
+static int adc_tm5_probe(struct platform_device *pdev)
+{
+	struct device_node *node = pdev->dev.of_node;
+	struct device *dev = &pdev->dev;
+	struct adc_tm5_chip *adc_tm;
+	struct regmap *regmap;
+	int ret, irq;
+	u32 reg;
+
+	regmap = dev_get_regmap(dev->parent, NULL);
+	if (!regmap)
+		return -ENODEV;
+
+	ret = of_property_read_u32(node, "reg", &reg);
+	if (ret)
+		return ret;
+
+	adc_tm = devm_kzalloc(&pdev->dev, sizeof(*adc_tm), GFP_KERNEL);
+	if (!adc_tm)
+		return -ENOMEM;
+
+	adc_tm->regmap = regmap;
+	adc_tm->dev = dev;
+	adc_tm->base = reg;
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(dev, "get_irq failed: %d\n", irq);
+		return irq;
+	}
+
+	ret = adc_tm5_get_dt_data(adc_tm, node);
+	if (ret) {
+		dev_err(dev, "get dt data failed: %d\n", ret);
+		return ret;
+	}
+
+	ret = adc_tm5_init(adc_tm);
+	if (ret) {
+		dev_err(dev, "adc-tm init failed\n");
+		return ret;
+	}
+
+	ret = adc_tm5_register_tzd(adc_tm);
+	if (ret) {
+		dev_err(dev, "tzd register failed\n");
+		return ret;
+	}
+
+	return devm_request_threaded_irq(dev, irq, NULL, adc_tm5_isr,
+					 IRQF_ONESHOT, "pm-adc-tm5", adc_tm);
+}
+
+static const struct of_device_id adc_tm5_match_table[] = {
+	{
+		.compatible = "qcom,spmi-adc-tm5",
+		.data = &adc_tm5_data_pmic,
+	},
+	{ }
+};
+MODULE_DEVICE_TABLE(of, adc_tm5_match_table);
+
+static struct platform_driver adc_tm5_driver = {
+	.driver = {
+		.name = "qcom-spmi-adc-tm5",
+		.of_match_table = adc_tm5_match_table,
+	},
+	.probe = adc_tm5_probe,
+};
+module_platform_driver(adc_tm5_driver);
+
+MODULE_DESCRIPTION("SPMI PMIC Thermal Monitor ADC driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
index 58216124d89d..33f60f43e1aa 100644
--- a/include/linux/iio/adc/qcom-vadc-common.h
+++ b/include/linux/iio/adc/qcom-vadc-common.h
@@ -158,6 +158,9 @@ int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
 		    const struct adc5_data *data,
 		    u16 adc_code, int *result_mdec);
 
+u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
+				 u32 full_scale_code_volt, int temp);
+
 int qcom_adc5_prescaling_from_dt(u32 num, u32 den);
 
 int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle);
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 13/15] arm64: dts: qcom: pm8150x: add definitions for adc-tm5 part
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (11 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 14/15] arm64: dts: sm8250-mtp: add thermal zones using pmic's adc-tm5 Dmitry Baryshkov
                   ` (2 subsequent siblings)
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

Define adc-tm5 thermal monitoring part. Individual channes and thermal
zones are to be configured in per-device dts files.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 arch/arm64/boot/dts/qcom/pm8150.dtsi  | 10 ++++++++++
 arch/arm64/boot/dts/qcom/pm8150b.dtsi | 10 ++++++++++
 arch/arm64/boot/dts/qcom/pm8150l.dtsi | 10 ++++++++++
 3 files changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi
index 1b6406927509..b1b518c6a2c9 100644
--- a/arch/arm64/boot/dts/qcom/pm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi
@@ -97,6 +97,16 @@ die-temp@6 {
 			};
 		};
 
+		pm8150_adc_tm: adc-tm@3500 {
+			compatible = "qcom,spmi-adc-tm5";
+			reg = <0x3500>;
+			interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+			#thermal-sensor-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		rtc@6000 {
 			compatible = "qcom,pm8941-rtc";
 			reg = <0x6000>;
diff --git a/arch/arm64/boot/dts/qcom/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
index e112e8876db6..8e2f3250c914 100644
--- a/arch/arm64/boot/dts/qcom/pm8150b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150b.dtsi
@@ -95,6 +95,16 @@ chg-temp@9 {
 			};
 		};
 
+		pm8150b_adc_tm: adc-tm@3500 {
+			compatible = "qcom,spmi-adc-tm5";
+			reg = <0x3500>;
+			interrupts = <0x2 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+			#thermal-sensor-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		pm8150b_gpios: gpio@c000 {
 			compatible = "qcom,pm8150b-gpio";
 			reg = <0xc000>;
diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
index 62139538b7d9..9f214ceec2b7 100644
--- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi
@@ -89,6 +89,16 @@ die-temp@6 {
 			};
 		};
 
+		pm8150l_adc_tm: adc-tm@3500 {
+			compatible = "qcom,spmi-adc-tm5";
+			reg = <0x3500>;
+			interrupts = <0x4 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+			#thermal-sensor-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		pm8150l_gpios: gpio@c000 {
 			compatible = "qcom,pm8150l-gpio";
 			reg = <0xc000>;
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 14/15] arm64: dts: sm8250-mtp: add thermal zones using pmic's adc-tm5
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (12 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 13/15] arm64: dts: qcom: pm8150x: add definitions for adc-tm5 part Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-02 17:49 ` [PATCH v9 15/15] arm64: dts: qrb5165-rb5: port thermal zone definitions Dmitry Baryshkov
  2020-11-12 11:39 ` [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Daniel Lezcano
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

Port thermal zones definitions from msm-4.19 tree. Enable and add
channel configuration to PMIC's ADC-TM definitions. Declare thermal
zones and respective trip points.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250-mtp.dts | 207 ++++++++++++++++++++++++
 1 file changed, 207 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
index 98675e1f8204..95050f7d11f2 100644
--- a/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8250-mtp.dts
@@ -24,6 +24,104 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	thermal-zones {
+		xo-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150_adc_tm 0>;
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		skin-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150_adc_tm 1>;
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		mmw-pa1 {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150_adc_tm 2>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		conn-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150b_adc_tm 0>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		camera-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150l_adc_tm 0>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		skin-msm-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150l_adc_tm 1>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+
+		mmw-pa2 {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150l_adc_tm 2>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+		};
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -378,6 +476,115 @@ &i2c15 {
 	/* rtc6226 @ 64 */
 };
 
+&pm8150_adc {
+	xo-therm@4c {
+		reg = <ADC5_XO_THERM_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	skin-therm@4d {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pa-therm1@4e {
+		reg = <ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150b_adc {
+	conn-therm@4f {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150l_adc {
+	camera-flash-therm@4d {
+		reg = <ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	skin-msm-therm@4e {
+		reg = <ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pa-therm2@4f {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150_adc_tm {
+	status = "okay";
+
+	xo-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150_adc ADC5_XO_THERM_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	skin-therm@1 {
+		reg = <1>;
+		io-channels = <&pm8150_adc ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	pa-therm1@2 {
+		reg = <2>;
+		io-channels = <&pm8150_adc ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
+&pm8150b_adc_tm {
+	status = "okay";
+
+	conn-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150b_adc ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
+&pm8150l_adc_tm {
+	status = "okay";
+
+	camera-flash-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150l_adc ADC5_AMUX_THM1_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	skin-msm-therm@1 {
+		reg = <1>;
+		io-channels = <&pm8150l_adc ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	pa-therm2@2 {
+		reg = <2>;
+		io-channels = <&pm8150l_adc ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH v9 15/15] arm64: dts: qrb5165-rb5: port thermal zone definitions
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (13 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 14/15] arm64: dts: sm8250-mtp: add thermal zones using pmic's adc-tm5 Dmitry Baryshkov
@ 2020-11-02 17:49 ` Dmitry Baryshkov
  2020-11-12 11:39 ` [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Daniel Lezcano
  15 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-02 17:49 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Daniel Lezcano, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

Add thermal zones definitions basing on the downstream kernel.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 154 +++++++++++++++++++++++
 1 file changed, 154 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 1528a865f1f8..6cb8688910a2 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -58,6 +58,77 @@ bt {
 
 	};
 
+	thermal-zones {
+		xo-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150_adc_tm 0>;
+			trips {
+				active-config0 {
+					temperature = <50000>;
+					hysteresis = <4000>;
+					type = "passive";
+				};
+			};
+		};
+
+		wifi-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150_adc_tm 1>;
+			trips {
+				active-config0 {
+					temperature = <52000>;
+					hysteresis = <4000>;
+					type = "passive";
+				};
+			};
+		};
+
+		conn-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150b_adc_tm 0>;
+
+			trips {
+				active-config0 {
+					temperature = <125000>;
+					hysteresis = <1000>;
+					type = "critical";
+				};
+			};
+		};
+
+		skin-msm-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150l_adc_tm 0>;
+
+			trips {
+				active-config0 {
+					temperature = <50000>;
+					hysteresis = <4000>;
+					type = "passive";
+				};
+			};
+		};
+
+		pm8150l-therm {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&pm8150l_adc_tm 1>;
+
+			trips {
+				active-config0 {
+					temperature = <50000>;
+					hysteresis = <4000>;
+					type = "passive";
+				};
+			};
+		};
+
+	};
+
 	vbat: vbat-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "VBAT";
@@ -412,6 +483,89 @@ &i2c15 {
 	status = "okay";
 };
 
+&pm8150_adc {
+	xo-therm@4c {
+		reg = <ADC5_XO_THERM_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	wifi-therm@4e {
+		reg = <ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150b_adc {
+	conn-therm@4f {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150l_adc {
+	skin-msm-therm@4e {
+		reg = <ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+
+	pm8150l-therm@4f {
+		reg = <ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+	};
+};
+
+&pm8150_adc_tm {
+	status = "okay";
+
+	xo-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150_adc ADC5_XO_THERM_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	wifi-therm@1 {
+		reg = <1>;
+		io-channels = <&pm8150_adc ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
+&pm8150b_adc_tm {
+	status = "okay";
+
+	conn-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150b_adc ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
+&pm8150l_adc_tm {
+	status = "okay";
+
+	skin-msm-therm@0 {
+		reg = <0>;
+		io-channels = <&pm8150l_adc ADC5_AMUX_THM2_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+
+	pm8150l-therm@1 {
+		reg = <1>;
+		io-channels = <&pm8150l_adc ADC5_AMUX_THM3_100K_PU>;
+		qcom,ratiometric;
+		qcom,hw-settle-time-us = <200>;
+	};
+};
+
 &pm8150_gpios {
 	gpio-reserved-ranges = <1 1>, <3 2>, <7 1>;
 	gpio-line-names =
-- 
2.28.0


^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings
  2020-11-02 17:49 ` [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings Dmitry Baryshkov
@ 2020-11-04 18:32   ` Rob Herring
  2020-11-08 15:52     ` Jonathan Cameron
  0 siblings, 1 reply; 24+ messages in thread
From: Rob Herring @ 2020-11-04 18:32 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Jishnu Prakash, Zhang Rui, Bjorn Andersson, Amit Kucheria,
	linux-arm-msm, linux-pm, Rob Herring, Hartmut Knaack, Andy Gross,
	Manivannan Sadhasivam, devicetree, Lars-Peter Clausen,
	Jonathan Cameron, Peter Meerwald-Stadler, linux-iio,
	Daniel Lezcano

On Mon, 02 Nov 2020 20:49:36 +0300, Dmitry Baryshkov wrote:
> Add bindings for thermal monitor, part of Qualcomm PMIC5 chips. It is a
> close counterpart of VADC part of those PMICs.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../bindings/thermal/qcom-spmi-adc-tm5.yaml   | 154 ++++++++++++++++++
>  1 file changed, 154 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.example.dt.yaml: adc@3100: 'io-channels' is a dependency of 'io-channel-ranges'
	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/iio/iio-consumer.yaml


See https://patchwork.ozlabs.org/patch/1392425

The base for the patch is generally the last rc1. Any dependencies
should be noted.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.


^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings
  2020-11-04 18:32   ` Rob Herring
@ 2020-11-08 15:52     ` Jonathan Cameron
  0 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron @ 2020-11-08 15:52 UTC (permalink / raw)
  To: Rob Herring
  Cc: Dmitry Baryshkov, Jishnu Prakash, Zhang Rui, Bjorn Andersson,
	Amit Kucheria, linux-arm-msm, linux-pm, Rob Herring,
	Hartmut Knaack, Andy Gross, Manivannan Sadhasivam, devicetree,
	Lars-Peter Clausen, Peter Meerwald-Stadler, linux-iio,
	Daniel Lezcano

On Wed, 4 Nov 2020 12:32:30 -0600
Rob Herring <robh@kernel.org> wrote:

> On Mon, 02 Nov 2020 20:49:36 +0300, Dmitry Baryshkov wrote:
> > Add bindings for thermal monitor, part of Qualcomm PMIC5 chips. It is a
> > close counterpart of VADC part of those PMICs.
> > 
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > Reviewed-by: Rob Herring <robh@kernel.org>

Ah, this got picked up by the additions I made to dt-schema the other day.

So there are a few existing places where io-channel-ranges is miss provided
in dtsi files for io-channel providers (it's being ignored in most the places
it is specified!)

What it means is that the child nodes may use io-channel entries of their parent.
Hence it should only be specified on the consumer side.
Here we don't actually need it for the consumer either as the io-channels
entry is in the child node, not the parent.

I'm kind of assuming that I'll eventually do the immutable branch for this
series. If so I can clean this up whilst applying if everything else is fine
with v9.

Thanks,

Jonathan


> > ---
> >  .../bindings/thermal/qcom-spmi-adc-tm5.yaml   | 154 ++++++++++++++++++
> >  1 file changed, 154 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml
> >   
> 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.example.dt.yaml: adc@3100: 'io-channels' is a dependency of 'io-channel-ranges'
> 	From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/iio/iio-consumer.yaml
> 
> 
> See https://patchwork.ozlabs.org/patch/1392425
> 
> The base for the patch is generally the last rc1. Any dependencies
> should be noted.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.
> 


^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring
  2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
                   ` (14 preceding siblings ...)
  2020-11-02 17:49 ` [PATCH v9 15/15] arm64: dts: qrb5165-rb5: port thermal zone definitions Dmitry Baryshkov
@ 2020-11-12 11:39 ` Daniel Lezcano
  2020-11-12 12:41   ` Dmitry Baryshkov
  15 siblings, 1 reply; 24+ messages in thread
From: Daniel Lezcano @ 2020-11-12 11:39 UTC (permalink / raw)
  To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
	Zhang Rui, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash


Shall I take patch 1/15 and 12/15 ?



On 02/11/2020 18:49, Dmitry Baryshkov wrote:
> This patch serie adds support for thermal monitoring block on Qualcomm's
> PMIC5 chips. PM8150{,b,l} and sm8250-mtp board device trees are extended
> to support thermal zones provided by this thermal monitoring block.
> Unlike the rest of PMIC thermal senses, these thermal zones describe
> particular thermistors, which differ between from board to board.
> 
> Changes since v8:
>  - Simplified qcom_vadc_map_voltage_temp() code by removing ascending
>    tables support
>  - Simplified qcom-vadc-common volt/temp mapping code
>  - Implement suggestions by Matthias Kaehlcke: message formatting,
>    rewrite comments, remove unused variable initialization.
> 
> Changes since v7:
>  - Move qcom-vadc-common.h header to include/linux/iio/adc/ dir.
>  - Use explicit sizeof(var) instead of hand-coding 1 when accessing
>    adc-tm registers.
>  - Remove buffer read from adc_tm5_init().
>  - Remove extra on-stack var from adc_tm5_get_temp().
>  - Minor formatting changes as suggested Daniel.
> 
> Changes since v6:
>  - Added include <linux/bitfield.h> as noted by Jishnu Prakash.
> 
> Changes since v5:
>  - Reworked DT bindings:
>    * Removed qcom,adc-channel, instead it is parsed from io-channels
>    * Renamed qcom,hw-settle-time to include -us suffix
>  - Re-added monitor enabling which got lost during refactored. Noted by
>    Jishnu Prakash.
>  - Use threaded IRQ handler as susggested by Jishnu.
> 
> Changes since v4:
>  - Added kernel-doc comments to ADC-TM structures
>  - Used several sizeof(buf) instead of hand-conding register size
> 
> Changes since v3:
>  - Fix DT description to spell "thermal monitoring" instead of just TM
>  - Fix warnings in DT example
>  - Add EXPORT_SYMBOL_GPL(of_iio_channel_get_by_name)
>  - Fixed whitespace chanes in qcom-vadc-common.c
>  - Removed error message if IIO chanel get returns -EPROBE_DEFER
> 
> Changes since v2:
>  - IIO: export of_iio_channel_get_by_name() function
>  - dt-bindings: move individual io-channels to each thermal monitoring
>    channel rather than listing them all in device node
>  - added fallback defaults to of_device_get_match_data calls in
>    qcom-spmi-adc5 and qcom-spmi-adc-tm5 drivers
>  - minor typo fixes
> 
> Changes since v1:
>  - Introduce fixp_linear_interpolate() by Craig Tatlor
>  - Lots of syntax/whitespace changes
>  - Cleaned up register definitions per Jonathan's suggestion
>  - Implemented most of the suggestions from Bjorn's and Jonathan's
>    review
> 
> 


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring
  2020-11-12 11:39 ` [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Daniel Lezcano
@ 2020-11-12 12:41   ` Dmitry Baryshkov
  2020-11-12 13:13     ` Daniel Lezcano
  0 siblings, 1 reply; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-12 12:41 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler,
	open list:DRM DRIVER FOR MSM ADRENO GPU, linux-pm,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	linux-iio, Manivannan Sadhasivam, Jishnu Prakash

On Thu, 12 Nov 2020 at 14:39, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>
>
> Shall I take patch 1/15 and 12/15 ?

12/15 will not compile without several previous patches, so it might
be better to take all of them through the single tree.

>
>
>
> On 02/11/2020 18:49, Dmitry Baryshkov wrote:
> > This patch serie adds support for thermal monitoring block on Qualcomm's
> > PMIC5 chips. PM8150{,b,l} and sm8250-mtp board device trees are extended
> > to support thermal zones provided by this thermal monitoring block.
> > Unlike the rest of PMIC thermal senses, these thermal zones describe
> > particular thermistors, which differ between from board to board.
> >
> > Changes since v8:
> >  - Simplified qcom_vadc_map_voltage_temp() code by removing ascending
> >    tables support
> >  - Simplified qcom-vadc-common volt/temp mapping code
> >  - Implement suggestions by Matthias Kaehlcke: message formatting,
> >    rewrite comments, remove unused variable initialization.
> >
> > Changes since v7:
> >  - Move qcom-vadc-common.h header to include/linux/iio/adc/ dir.
> >  - Use explicit sizeof(var) instead of hand-coding 1 when accessing
> >    adc-tm registers.
> >  - Remove buffer read from adc_tm5_init().
> >  - Remove extra on-stack var from adc_tm5_get_temp().
> >  - Minor formatting changes as suggested Daniel.
> >
> > Changes since v6:
> >  - Added include <linux/bitfield.h> as noted by Jishnu Prakash.
> >
> > Changes since v5:
> >  - Reworked DT bindings:
> >    * Removed qcom,adc-channel, instead it is parsed from io-channels
> >    * Renamed qcom,hw-settle-time to include -us suffix
> >  - Re-added monitor enabling which got lost during refactored. Noted by
> >    Jishnu Prakash.
> >  - Use threaded IRQ handler as susggested by Jishnu.
> >
> > Changes since v4:
> >  - Added kernel-doc comments to ADC-TM structures
> >  - Used several sizeof(buf) instead of hand-conding register size
> >
> > Changes since v3:
> >  - Fix DT description to spell "thermal monitoring" instead of just TM
> >  - Fix warnings in DT example
> >  - Add EXPORT_SYMBOL_GPL(of_iio_channel_get_by_name)
> >  - Fixed whitespace chanes in qcom-vadc-common.c
> >  - Removed error message if IIO chanel get returns -EPROBE_DEFER
> >
> > Changes since v2:
> >  - IIO: export of_iio_channel_get_by_name() function
> >  - dt-bindings: move individual io-channels to each thermal monitoring
> >    channel rather than listing them all in device node
> >  - added fallback defaults to of_device_get_match_data calls in
> >    qcom-spmi-adc5 and qcom-spmi-adc-tm5 drivers
> >  - minor typo fixes
> >
> > Changes since v1:
> >  - Introduce fixp_linear_interpolate() by Craig Tatlor
> >  - Lots of syntax/whitespace changes
> >  - Cleaned up register definitions per Jonathan's suggestion
> >  - Implemented most of the suggestions from Bjorn's and Jonathan's
> >    review
> >
> >
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog



-- 
With best wishes
Dmitry

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring
  2020-11-12 12:41   ` Dmitry Baryshkov
@ 2020-11-12 13:13     ` Daniel Lezcano
  2020-11-19 14:42       ` Dmitry Baryshkov
  0 siblings, 1 reply; 24+ messages in thread
From: Daniel Lezcano @ 2020-11-12 13:13 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler,
	open list:DRM DRIVER FOR MSM ADRENO GPU, linux-pm,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	linux-iio, Manivannan Sadhasivam, Jishnu Prakash

On 12/11/2020 13:41, Dmitry Baryshkov wrote:
> On Thu, 12 Nov 2020 at 14:39, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>>
>>
>> Shall I take patch 1/15 and 12/15 ?
> 
> 12/15 will not compile without several previous patches, so it might
> be better to take all of them through the single tree.

Ok, I will take some time to review the driver and ack it, so it can be
merged through the iio tree.


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring
  2020-11-12 13:13     ` Daniel Lezcano
@ 2020-11-19 14:42       ` Dmitry Baryshkov
  0 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-19 14:42 UTC (permalink / raw)
  To: Daniel Lezcano
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Zhang Rui,
	Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler,
	open list:DRM DRIVER FOR MSM ADRENO GPU, linux-pm,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	linux-iio, Manivannan Sadhasivam, Jishnu Prakash

On 12/11/2020 16:13, Daniel Lezcano wrote:
> On 12/11/2020 13:41, Dmitry Baryshkov wrote:
>> On Thu, 12 Nov 2020 at 14:39, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
>>>
>>>
>>> Shall I take patch 1/15 and 12/15 ?
>>
>> 12/15 will not compile without several previous patches, so it might
>> be better to take all of them through the single tree.
> 
> Ok, I will take some time to review the driver and ack it, so it can be
> merged through the iio tree.

Daniel, I'm sorry. Is there any update on this patchset review?


-- 
With best wishes
Dmitry

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor
  2020-11-02 17:49 ` [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor Dmitry Baryshkov
@ 2020-11-19 15:33   ` Daniel Lezcano
  2020-11-20 22:35     ` Dmitry Baryshkov
  0 siblings, 1 reply; 24+ messages in thread
From: Daniel Lezcano @ 2020-11-19 15:33 UTC (permalink / raw)
  To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
	Zhang Rui, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

On 02/11/2020 18:49, Dmitry Baryshkov wrote:
> Add support for Thermal Monitoring part of PMIC5. This part is closely
> coupled with ADC, using it's channels directly. ADC-TM support
> generating interrupts on ADC value crossing low or high voltage bounds,
> which is used to support thermal trip points.

Please, document the driver, so the review will be easier.

Some comments in the code would help also.


> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  drivers/iio/adc/qcom-vadc-common.c       |  44 ++
>  drivers/thermal/qcom/Kconfig             |  11 +
>  drivers/thermal/qcom/Makefile            |   1 +
>  drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 604 +++++++++++++++++++++++
>  include/linux/iio/adc/qcom-vadc-common.h |   3 +
>  5 files changed, 663 insertions(+)
>  create mode 100644 drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> 
> diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
> index 8682cf1e213f..da2f2afc26ee 100644
> --- a/drivers/iio/adc/qcom-vadc-common.c
> +++ b/drivers/iio/adc/qcom-vadc-common.c
> @@ -368,6 +368,23 @@ static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts,
>  	return 0;
>  }
>  
> +static s32 qcom_vadc_map_temp_voltage(const struct vadc_map_pt *pts,
> +				      u32 tablesize, int input)
> +{
> +	u32 i = 0;
> +
> +	while (i < tablesize && pts[i].y < input)
> +		i++;
> +

Comment

> +	if (i == 0)
> +		return pts[0].x;
> +	if (i == tablesize)
> +		return pts[tablesize - 1].x;
> +
> +	return fixp_linear_interpolate(pts[i - 1].y, pts[i - 1].x,
> +			pts[i].y, pts[i].x, input);
> +}
>  static void qcom_vadc_scale_calib(const struct vadc_linear_graph *calib_graph,
>  				  u16 adc_code,
>  				  bool absolute,
> @@ -463,6 +480,20 @@ static int qcom_vadc_scale_chg_temp(const struct vadc_linear_graph *calib_graph,
>  	return 0;
>  }
>  
> +static u16 qcom_vadc_scale_voltage_code(int voltage,
> +					const struct vadc_prescale_ratio *prescale,
> +					const u32 full_scale_code_volt,
> +					unsigned int factor)
> +{
> +	s64 volt = voltage;
> +	s64 adc_vdd_ref_mv = 1875;

Comment to explain

> +	volt *= prescale->num * factor * full_scale_code_volt;
> +	volt = div64_s64(volt, (s64)prescale->den * adc_vdd_ref_mv * 1000);
> +	return volt;
> +}

The function returns u16 but volt is s64.

> +
>  static int qcom_vadc_scale_code_voltage_factor(u16 adc_code,
>  				const struct vadc_prescale_ratio *prescale,
>  				const struct adc5_data *data,
> @@ -627,6 +658,19 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype,
>  }
>  EXPORT_SYMBOL(qcom_vadc_scale);
>  
> +u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
> +				 u32 full_scale_code_volt, int temp)
> +{
> +	const struct vadc_prescale_ratio *prescale = &adc5_prescale_ratios[prescale_ratio];
> +	s32 voltage;
> +
> +	voltage = qcom_vadc_map_temp_voltage(adcmap_100k_104ef_104fb_1875_vref,
> +					     ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
> +					     temp);

voltage is s32, parameter is int below

> +	return qcom_vadc_scale_voltage_code(voltage, prescale, full_scale_code_volt, 1000);
> +}
> +EXPORT_SYMBOL(qcom_adc_tm5_temp_volt_scale);
> +
>  int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
>  		    unsigned int prescale_ratio,
>  		    const struct adc5_data *data,
> diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig
> index aa9c1d80fae4..8d5ac2df26dc 100644
> --- a/drivers/thermal/qcom/Kconfig
> +++ b/drivers/thermal/qcom/Kconfig
> @@ -10,6 +10,17 @@ config QCOM_TSENS
>  	  Also able to set threshold temperature for both hot and cold and update
>  	  when a threshold is reached.
>  
> +config QCOM_SPMI_ADC_TM5
> +	tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5"
> +	depends on OF && SPMI && IIO
> +	select REGMAP_SPMI
> +	select QCOM_VADC_COMMON
> +	help
> +	  This enables the thermal driver for the ADC thermal monitoring
> +	  device. It shows up as a thermal zone with multiple trip points.
> +	  Thermal client sets threshold temperature for both warm and cool and
> +	  gets updated when a threshold is reached.
> +
>  config QCOM_SPMI_TEMP_ALARM
>  	tristate "Qualcomm SPMI PMIC Temperature Alarm"
>  	depends on OF && SPMI && IIO
> diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
> index ec86eef7f6a6..252ea7d9da0b 100644
> --- a/drivers/thermal/qcom/Makefile
> +++ b/drivers/thermal/qcom/Makefile
> @@ -3,4 +3,5 @@ obj-$(CONFIG_QCOM_TSENS)	+= qcom_tsens.o
>  
>  qcom_tsens-y			+= tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \
>  				   tsens-8960.o
> +obj-$(CONFIG_QCOM_SPMI_ADC_TM5)	+= qcom-spmi-adc-tm5.o
>  obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM)	+= qcom-spmi-temp-alarm.o
> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> new file mode 100644
> index 000000000000..eda3f2d1697e
> --- /dev/null
> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
> @@ -0,0 +1,604 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.

Why adding the copyright above ?

> + * Copyright (c) 2020 Linaro Limited
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/iio/adc/qcom-vadc-common.h>
> +#include <linux/iio/consumer.h>
> +#include <linux/interrupt.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/thermal.h>
> +
> +#define ADC5_MAX_CHANNEL                        0xc0
> +#define ADC_TM5_NUM_CHANNELS		8
> +
> +#define ADC_TM5_STATUS_LOW			0x0a
> +
> +#define ADC_TM5_STATUS_HIGH			0x0b
> +
> +#define ADC_TM5_NUM_BTM				0x0f
> +
> +#define ADC_TM5_ADC_DIG_PARAM			0x42
> +
> +#define ADC_TM5_FAST_AVG_CTL			(ADC_TM5_ADC_DIG_PARAM + 1)
> +#define ADC_TM5_FAST_AVG_EN				BIT(7)
> +
> +#define ADC_TM5_MEAS_INTERVAL_CTL		(ADC_TM5_ADC_DIG_PARAM + 2)
> +#define ADC_TM5_TIMER1					3 /* 3.9ms */
> +
> +#define ADC_TM5_MEAS_INTERVAL_CTL2		(ADC_TM5_ADC_DIG_PARAM + 3)
> +#define ADC_TM5_MEAS_INTERVAL_CTL2_MASK			0xf0
> +#define ADC_TM5_TIMER2					10 /* 1 second */
> +#define ADC_TM5_MEAS_INTERVAL_CTL3_MASK			0xf
> +#define ADC_TM5_TIMER3					4 /* 4 second */

Should it be 40 ?


> +#define ADC_TM_EN_CTL1				0x46
> +#define ADC_TM_EN					BIT(7)
> +#define ADC_TM_CONV_REQ				0x47
> +#define ADC_TM_CONV_REQ_EN				BIT(7)
> +
> +#define ADC_TM5_M_CHAN_BASE			0x60
> +
> +#define ADC_TM5_M_ADC_CH_SEL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 0)
> +#define ADC_TM5_M_LOW_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 1)
> +#define ADC_TM5_M_LOW_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 2)
> +#define ADC_TM5_M_HIGH_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 3)
> +#define ADC_TM5_M_HIGH_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 4)
> +#define ADC_TM5_M_MEAS_INTERVAL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 5)
> +#define ADC_TM5_M_CTL(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 6)
> +#define ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK		0xf
> +#define ADC_TM5_M_CTL_CAL_SEL_MASK			0x30
> +#define ADC_TM5_M_CTL_CAL_VAL				0x40
> +#define ADC_TM5_M_EN(n)				(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 7)
> +#define ADC_TM5_M_MEAS_EN				BIT(7)
> +#define ADC_TM5_M_HIGH_THR_INT_EN			BIT(1)
> +#define ADC_TM5_M_LOW_THR_INT_EN			BIT(0)
> +
> +enum adc5_timer_select {
> +	ADC5_TIMER_SEL_1 = 0,
> +	ADC5_TIMER_SEL_2,
> +	ADC5_TIMER_SEL_3,
> +	ADC5_TIMER_SEL_NONE,
> +};
> +
> +struct adc_tm5_data {
> +	const u32	full_scale_code_volt;
> +	unsigned int	*decimation;
> +	unsigned int	*hw_settle;
> +};
> +
> +enum adc_tm5_cal_method {
> +	ADC_TM5_NO_CAL = 0,
> +	ADC_TM5_RATIOMETRIC_CAL,
> +	ADC_TM5_ABSOLUTE_CAL
> +};
> +
> +struct adc_tm5_chip;
> +
> +/**
> + * struct adc_tm5_channel - ADC Thermal Monitoring channel data.
> + * @channel: channel number.
> + * @adc_channel: corresponding ADC channel number.
> + * @cal_method: calibration method.
> + * @prescale: channel scaling performed on the input signal.
> + * @hw_settle_time: the time between AMUX being configured and the
> + *	start of conversion.
> + * @iio: IIO channel instance used by this channel.
> + * @chip: ADC TM chip instance.
> + * @tzd: thermal zone device used by this channel.
> + */
> +struct adc_tm5_channel {
> +	unsigned int		channel;
> +	unsigned int		adc_channel;
> +	enum adc_tm5_cal_method	cal_method;
> +	unsigned int		prescale;
> +	unsigned int		hw_settle_time;
> +	struct iio_channel	*iio;
> +	struct adc_tm5_chip	*chip;
> +	struct thermal_zone_device *tzd;
> +};
> +
> +/**
> + * struct adc_tm5_chip - ADC Thermal Monitoring properties
> + * @regmap: SPMI ADC5 Thermal Monitoring  peripheral register map field.
> + * @dev: SPMI ADC5 device.
> + * @data: software configuration data.
> + * @channels: array of ADC TM channel data.
> + * @nchannels: amount of channels defined/allocated
> + * @decimation: sampling rate supported for the channel.
> + * @avg_samples: ability to provide single result from the ADC
> + *	that is an average of multiple measurements.
> + * @base: base address of TM registers.
> + */
> +struct adc_tm5_chip {
> +	struct regmap		*regmap;
> +	struct device		*dev;
> +	const struct adc_tm5_data	*data;
> +	struct adc_tm5_channel	*channels;
> +	unsigned int		nchannels;
> +	unsigned int		decimation;
> +	unsigned int		avg_samples;
> +	u16			base;
> +};
> +
> +static const struct adc_tm5_data adc_tm5_data_pmic = {
> +	.full_scale_code_volt = 0x70e4,
> +	.decimation = (unsigned int []) { 250, 420, 840 },
> +	.hw_settle = (unsigned int []) { 15, 100, 200, 300, 400, 500, 600, 700,
> +					 1000, 2000, 4000, 8000, 16000, 32000,
> +					 64000, 128000 },
> +};
> +
> +static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
> +{
> +	return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len);
> +}
> +
> +static int adc_tm5_write(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
> +{
> +	return regmap_bulk_write(adc_tm->regmap, adc_tm->base + offset, data, len);
> +}
> +
> +static int adc_tm5_reg_update(struct adc_tm5_chip *adc_tm, u16 offset, u8 mask, u8 val)
> +{
> +	return regmap_write_bits(adc_tm->regmap, adc_tm->base + offset, mask, val);
> +}
> +
> +static irqreturn_t adc_tm5_isr(int irq, void *data)
> +{
> +	struct adc_tm5_chip *chip = data;
> +	u8 status_low, status_high, ctl;
> +	int ret, i;
> +
> +	ret = adc_tm5_read(chip, ADC_TM5_STATUS_LOW, &status_low, sizeof(status_low));
> +	if (unlikely(ret)) {
> +		dev_err(chip->dev, "read status low failed: %d\n", ret);
> +		return IRQ_HANDLED;
> +	}

I suspect there is a deadlock here. If any routine calling adc_tm5_read
/ adc_tm5_write which holds the regmap lock is interrupted by this isr,
it will try to acquire the lock again and block.

> +	ret = adc_tm5_read(chip, ADC_TM5_STATUS_HIGH, &status_high, sizeof(status_high));
> +	if (unlikely(ret)) {
> +		dev_err(chip->dev, "read status high failed: %d\n", ret);
> +		return IRQ_HANDLED;
> +	}
> +
> +	for (i = 0; i < chip->nchannels; i++) {
> +		bool upper_set = false, lower_set = false;
> +		unsigned int ch = chip->channels[i].channel;
> +
> +		/* No TZD, we warned at the boot time */
> +		if (!chip->channels[i].tzd)
> +			continue;
> +
> +		ret = adc_tm5_read(chip, ADC_TM5_M_EN(ch), &ctl, sizeof(ctl));
> +		if (unlikely(ret)) {
> +			dev_err(chip->dev, "ctl read failed: %d, channel %d\n", ret, i);
> +			continue;
> +		}
> +
> +		if (!(ctl & ADC_TM5_M_MEAS_EN))
> +			continue;
> +
> +		lower_set = (status_low & BIT(ch)) &&
> +			(ctl & ADC_TM5_M_LOW_THR_INT_EN);
> +
> +		upper_set = (status_high & BIT(ch)) &&
> +			(ctl & ADC_TM5_M_HIGH_THR_INT_EN);
> +
> +		if (upper_set || lower_set)
> +			thermal_zone_device_update(chip->channels[i].tzd,
> +						   THERMAL_EVENT_UNSPECIFIED);
> +	}
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int adc_tm5_get_temp(void *data, int *temp)
> +{
> +	struct adc_tm5_channel *channel = data;
> +
> +	if (!channel || !channel->iio)
> +		return -EINVAL;
> +
> +	return iio_read_channel_processed(channel->iio, temp);
> +}
> +
> +static int adc_tm5_disable_channel(struct adc_tm5_channel *channel)
> +{
> +	struct adc_tm5_chip *chip = channel->chip;
> +	unsigned int reg = ADC_TM5_M_EN(channel->channel);
> +
> +	return adc_tm5_reg_update(chip, reg,
> +				  ADC_TM5_M_MEAS_EN |
> +				  ADC_TM5_M_HIGH_THR_INT_EN |
> +				  ADC_TM5_M_LOW_THR_INT_EN,
> +				  0);
> +}
> +
> +static int adc_tm5_enable(struct adc_tm5_chip *chip)
> +{
> +	int ret;
> +	u8 data;
> +
> +	data = ADC_TM_EN;
> +	ret = adc_tm5_write(chip, ADC_TM_EN_CTL1, &data, sizeof(data));
> +	if (ret < 0) {
> +		dev_err(chip->dev, "adc-tm enable failed\n");
> +		return ret;
> +	}
> +
> +	data = ADC_TM_CONV_REQ_EN;
> +	ret = adc_tm5_write(chip, ADC_TM_CONV_REQ, &data, sizeof(data));
> +	if (ret < 0) {
> +		dev_err(chip->dev, "adc-tm request conversion failed\n");
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static int adc_tm5_configure(struct adc_tm5_channel *channel, int low, int high)
> +{
> +	struct adc_tm5_chip *chip = channel->chip;
> +	u8 buf[8];
> +	u16 reg = ADC_TM5_M_ADC_CH_SEL_CTL(channel->channel);
> +	int ret;
> +
> +	ret = adc_tm5_read(chip, reg, buf, sizeof(buf));
> +	if (ret) {
> +		dev_err(chip->dev, "channel %d params read failed: %d\n", channel->channel, ret);
> +		return ret;
> +	}
> +
> +	buf[0] = channel->adc_channel;
> +
> +	/* High temperature corresponds to low voltage threshold */
> +	if (high != INT_MAX) {
> +		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
> +				chip->data->full_scale_code_volt, high);
> +
> +		buf[1] = adc_code & 0xff;
> +		buf[2] = adc_code >> 8;
> +		buf[7] |= ADC_TM5_M_LOW_THR_INT_EN;
> +	} else {
> +		buf[7] &= ~ADC_TM5_M_LOW_THR_INT_EN;
> +	}
> +
> +	/* Low temperature corresponds to high voltage threshold */
> +	if (low != -INT_MAX) {
> +		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
> +				chip->data->full_scale_code_volt, low);
> +
> +		buf[3] = adc_code & 0xff;
> +		buf[4] = adc_code >> 8;
> +		buf[7] |= ADC_TM5_M_HIGH_THR_INT_EN;
> +	} else {
> +		buf[7] &= ~ADC_TM5_M_HIGH_THR_INT_EN;
> +	}
> +
> +	buf[5] = ADC5_TIMER_SEL_2;
> +
> +	/* Set calibration select, hw_settle delay */
> +	buf[6] &= ~ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK;
> +	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK, channel->hw_settle_time);
> +	buf[6] &= ~ADC_TM5_M_CTL_CAL_SEL_MASK;
> +	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_CAL_SEL_MASK, channel->cal_method);
> +
> +	buf[7] |= ADC_TM5_M_MEAS_EN;
> +
> +	ret = adc_tm5_write(chip, reg, buf, sizeof(buf));
> +	if (ret) {
> +		dev_err(chip->dev, "channel %d params write failed: %d\n", channel->channel, ret);
> +		return ret;
> +	}
> +
> +	return adc_tm5_enable(chip);
> +}
> +
> +static int adc_tm5_set_trips(void *data, int low, int high)
> +{
> +	struct adc_tm5_channel *channel = data;
> +	struct adc_tm5_chip *chip;
> +	int ret;
> +
> +	if (!channel)
> +		return -EINVAL;
> +
> +	chip = channel->chip;
> +	dev_dbg(chip->dev, "%d:low(mdegC):%d, high(mdegC):%d\n",
> +		channel->channel, low, high);
> +
> +	if (high == INT_MAX && low <= -INT_MAX)
> +		ret = adc_tm5_disable_channel(channel);
> +	else
> +		ret = adc_tm5_configure(channel, low, high);
> +
> +	return ret;
> +}
> +
> +static struct thermal_zone_of_device_ops adc_tm5_ops = {
> +	.get_temp = adc_tm5_get_temp,
> +	.set_trips = adc_tm5_set_trips,
> +};
> +
> +static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm)
> +{
> +	unsigned int i;
> +	struct thermal_zone_device *tzd;
> +
> +	for (i = 0; i < adc_tm->nchannels; i++) {
> +		adc_tm->channels[i].chip = adc_tm;
> +
> +		tzd = devm_thermal_zone_of_sensor_register(adc_tm->dev,
> +							   adc_tm->channels[i].channel,
> +							   &adc_tm->channels[i],
> +							   &adc_tm5_ops);
> +		if (IS_ERR(tzd)) {
> +			dev_err(adc_tm->dev, "Error registering TZ zone for channel %d: %ld\n",
> +				adc_tm->channels[i].channel, PTR_ERR(tzd));
> +			return PTR_ERR(tzd);
> +		}
> +		adc_tm->channels[i].tzd = tzd;
> +	}
> +
> +	return 0;
> +}
> +
> +static int adc_tm5_init(struct adc_tm5_chip *chip)
> +{
> +	u8 buf[4], channels_available;
> +	int ret;
> +	unsigned int i;
> +
> +	for (i = 0; i < chip->nchannels; i++) {
> +		if (chip->channels[i].channel >= channels_available) {
> +			dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
> +			return -EINVAL;
> +		}
> +	}
> +
> +	ret = adc_tm5_read(chip, ADC_TM5_NUM_BTM,
> +			   &channels_available, sizeof(channels_available));
> +	if (ret) {
> +		dev_err(chip->dev, "read failed for BTM channels\n");
> +		return ret;
> +	}
> +
> +	buf[0] = chip->decimation;
> +	buf[1] = chip->avg_samples | ADC_TM5_FAST_AVG_EN;
> +	buf[2] = ADC_TM5_TIMER1;
> +	buf[3] = FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL2_MASK, ADC_TM5_TIMER2) |
> +		 FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL3_MASK, ADC_TM5_TIMER3);
> +
> +	ret = adc_tm5_write(chip, ADC_TM5_ADC_DIG_PARAM, buf, sizeof(buf));
> +	if (ret) {
> +		dev_err(chip->dev, "block write failed: %d\n", ret);
> +		return ret;
> +	}
> +
> +	return ret;
> +}
> +
> +static int adc_tm5_get_dt_channel_data(struct adc_tm5_chip *adc_tm,
> +				       struct adc_tm5_channel *channel,
> +				       struct device_node *node)
> +{
> +	const char *name = node->name;
> +	u32 chan, value, varr[2];
> +	int ret;
> +	struct device *dev = adc_tm->dev;
> +	struct of_phandle_args args;
> +
> +	ret = of_property_read_u32(node, "reg", &chan);
> +	if (ret) {
> +		dev_err(dev, "%s: invalid channel number %d\n", name, ret);
> +		return ret;
> +	}
> +
> +	if (chan >= ADC_TM5_NUM_CHANNELS) {
> +		dev_err(dev, "%s: channel number too big: %d\n", name, chan);
> +		return -EINVAL;
> +	}
> +
> +	channel->channel = chan;
> +
> +	/*
> +	 * We are tied to PMIC's ADC controller, which always use single
> +	 * argument for channel number.  So don't bother parsing
> +	 * #io-channel-cells, just enforce cell_count = 1.
> +	 */
> +	ret = of_parse_phandle_with_fixed_args(node, "io-channels", 1, 0, &args);
> +	if (ret < 0) {
> +		dev_err(dev, "%s: error parsing ADC channel number %d: %d\n", name, chan, ret);
> +		return ret;
> +	}
> +	of_node_put(args.np);
> +
> +	if (args.args_count != 1 || args.args[0] >= ADC5_MAX_CHANNEL) {
> +		dev_err(dev, "%s: invalid ADC channel number %d\n", name, chan);
> +		return ret;
> +	}
> +	channel->adc_channel = args.args[0];
> +
> +	channel->iio = devm_of_iio_channel_get_by_name(adc_tm->dev, node, NULL);
> +	if (IS_ERR(channel->iio)) {
> +		ret = PTR_ERR(channel->iio);
> +		if (ret != -EPROBE_DEFER)
> +			dev_err(dev, "%s: error getting channel: %d\n", name, ret);
> +		return ret;
> +	}
> +
> +	ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2);
> +	if (!ret) {
> +		ret = qcom_adc5_prescaling_from_dt(varr[0], varr[1]);
> +		if (ret < 0) {
> +			dev_err(dev, "%s: invalid pre-scaling <%d %d>\n",
> +				name, varr[0], varr[1]);
> +			return ret;
> +		}
> +		channel->prescale = ret;
> +	} else {
> +		/* 1:1 prescale is index 0 */
> +		channel->prescale = 0;
> +	}
> +
> +	ret = of_property_read_u32(node, "qcom,hw-settle-time-us", &value);
> +	if (!ret) {
> +		ret = qcom_adc5_hw_settle_time_from_dt(value, adc_tm->data->hw_settle);
> +		if (ret < 0) {
> +			dev_err(dev, "%s invalid hw-settle-time-us %d us\n",
> +				name, value);
> +			return ret;
> +		}
> +		channel->hw_settle_time = ret;
> +	} else {
> +		channel->hw_settle_time = VADC_DEF_HW_SETTLE_TIME;
> +	}
> +
> +	if (of_property_read_bool(node, "qcom,ratiometric"))
> +		channel->cal_method = ADC_TM5_RATIOMETRIC_CAL;
> +	else
> +		channel->cal_method = ADC_TM5_ABSOLUTE_CAL;
> +
> +	return 0;
> +}
> +
> +static int adc_tm5_get_dt_data(struct adc_tm5_chip *adc_tm, struct device_node *node)
> +{
> +	struct adc_tm5_channel *channels;
> +	struct device_node *child;
> +	u32 value;
> +	int ret;
> +	struct device *dev = adc_tm->dev;
> +
> +	adc_tm->nchannels = of_get_available_child_count(node);
> +	if (!adc_tm->nchannels)
> +		return -EINVAL;
> +
> +	adc_tm->channels = devm_kcalloc(dev, adc_tm->nchannels,
> +					sizeof(*adc_tm->channels), GFP_KERNEL);
> +	if (!adc_tm->channels)
> +		return -ENOMEM;
> +
> +	channels = adc_tm->channels;
> +
> +	adc_tm->data = of_device_get_match_data(dev);
> +	if (!adc_tm->data)
> +		adc_tm->data = &adc_tm5_data_pmic;
> +
> +	ret = of_property_read_u32(node, "qcom,decimation", &value);
> +	if (!ret) {
> +		ret = qcom_adc5_decimation_from_dt(value, adc_tm->data->decimation);
> +		if (ret < 0) {
> +			dev_err(dev, "invalid decimation %d\n", value);
> +			return ret;
> +		}
> +		adc_tm->decimation = ret;
> +	} else {
> +		adc_tm->decimation = ADC5_DECIMATION_DEFAULT;
> +	}
> +
> +	ret = of_property_read_u32(node, "qcom,avg-samples", &value);
> +	if (!ret) {
> +		ret = qcom_adc5_avg_samples_from_dt(value);
> +		if (ret < 0) {
> +			dev_err(dev, "invalid avg-samples %d\n", value);
> +			return ret;
> +		}
> +		adc_tm->avg_samples = ret;
> +	} else {
> +		adc_tm->avg_samples = VADC_DEF_AVG_SAMPLES;
> +	}
> +
> +	for_each_available_child_of_node(node, child) {
> +		ret = adc_tm5_get_dt_channel_data(adc_tm, channels, child);
> +		if (ret) {
> +			of_node_put(child);
> +			return ret;
> +		}
> +
> +		channels++;
> +	}
> +
> +	return 0;
> +}
> +
> +static int adc_tm5_probe(struct platform_device *pdev)
> +{
> +	struct device_node *node = pdev->dev.of_node;
> +	struct device *dev = &pdev->dev;
> +	struct adc_tm5_chip *adc_tm;
> +	struct regmap *regmap;
> +	int ret, irq;
> +	u32 reg;
> +
> +	regmap = dev_get_regmap(dev->parent, NULL);
> +	if (!regmap)
> +		return -ENODEV;
> +
> +	ret = of_property_read_u32(node, "reg", &reg);
> +	if (ret)
> +		return ret;
> +
> +	adc_tm = devm_kzalloc(&pdev->dev, sizeof(*adc_tm), GFP_KERNEL);
> +	if (!adc_tm)
> +		return -ENOMEM;
> +
> +	adc_tm->regmap = regmap;
> +	adc_tm->dev = dev;
> +	adc_tm->base = reg;
> +
> +	irq = platform_get_irq(pdev, 0);
> +	if (irq < 0) {
> +		dev_err(dev, "get_irq failed: %d\n", irq);
> +		return irq;
> +	}
> +
> +	ret = adc_tm5_get_dt_data(adc_tm, node);
> +	if (ret) {
> +		dev_err(dev, "get dt data failed: %d\n", ret);
> +		return ret;
> +	}
> +
> +	ret = adc_tm5_init(adc_tm);
> +	if (ret) {
> +		dev_err(dev, "adc-tm init failed\n");
> +		return ret;
> +	}
> +
> +	ret = adc_tm5_register_tzd(adc_tm);
> +	if (ret) {
> +		dev_err(dev, "tzd register failed\n");
> +		return ret;
> +	}
> +
> +	return devm_request_threaded_irq(dev, irq, NULL, adc_tm5_isr,
> +					 IRQF_ONESHOT, "pm-adc-tm5", adc_tm);
> +}
> +
> +static const struct of_device_id adc_tm5_match_table[] = {
> +	{
> +		.compatible = "qcom,spmi-adc-tm5",
> +		.data = &adc_tm5_data_pmic,
> +	},
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, adc_tm5_match_table);
> +
> +static struct platform_driver adc_tm5_driver = {
> +	.driver = {
> +		.name = "qcom-spmi-adc-tm5",
> +		.of_match_table = adc_tm5_match_table,
> +	},
> +	.probe = adc_tm5_probe,
> +};
> +module_platform_driver(adc_tm5_driver);
> +
> +MODULE_DESCRIPTION("SPMI PMIC Thermal Monitor ADC driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
> index 58216124d89d..33f60f43e1aa 100644
> --- a/include/linux/iio/adc/qcom-vadc-common.h
> +++ b/include/linux/iio/adc/qcom-vadc-common.h
> @@ -158,6 +158,9 @@ int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
>  		    const struct adc5_data *data,
>  		    u16 adc_code, int *result_mdec);
>  
> +u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
> +				 u32 full_scale_code_volt, int temp);
> +
>  int qcom_adc5_prescaling_from_dt(u32 num, u32 den);
>  
>  int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle);
> 


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^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor
  2020-11-19 15:33   ` Daniel Lezcano
@ 2020-11-20 22:35     ` Dmitry Baryshkov
  0 siblings, 0 replies; 24+ messages in thread
From: Dmitry Baryshkov @ 2020-11-20 22:35 UTC (permalink / raw)
  To: Daniel Lezcano, Andy Gross, Bjorn Andersson, Rob Herring,
	Zhang Rui, Amit Kucheria, Jonathan Cameron, Hartmut Knaack,
	Lars-Peter Clausen, Peter Meerwald-Stadler
  Cc: linux-arm-msm, linux-pm, devicetree, linux-iio,
	Manivannan Sadhasivam, Jishnu Prakash

On 19/11/2020 18:33, Daniel Lezcano wrote:
> On 02/11/2020 18:49, Dmitry Baryshkov wrote:
>> Add support for Thermal Monitoring part of PMIC5. This part is closely
>> coupled with ADC, using it's channels directly. ADC-TM support
>> generating interrupts on ADC value crossing low or high voltage bounds,
>> which is used to support thermal trip points.
> 
> Please, document the driver, so the review will be easier.
> 
> Some comments in the code would help also.

OK, I'll try.

> 
> 
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>>   drivers/iio/adc/qcom-vadc-common.c       |  44 ++
>>   drivers/thermal/qcom/Kconfig             |  11 +
>>   drivers/thermal/qcom/Makefile            |   1 +
>>   drivers/thermal/qcom/qcom-spmi-adc-tm5.c | 604 +++++++++++++++++++++++
>>   include/linux/iio/adc/qcom-vadc-common.h |   3 +
>>   5 files changed, 663 insertions(+)
>>   create mode 100644 drivers/thermal/qcom/qcom-spmi-adc-tm5.c
>>
>> diff --git a/drivers/iio/adc/qcom-vadc-common.c b/drivers/iio/adc/qcom-vadc-common.c
>> index 8682cf1e213f..da2f2afc26ee 100644
>> --- a/drivers/iio/adc/qcom-vadc-common.c
>> +++ b/drivers/iio/adc/qcom-vadc-common.c
>> @@ -368,6 +368,23 @@ static int qcom_vadc_map_voltage_temp(const struct vadc_map_pt *pts,
>>   	return 0;
>>   }
>>   
>> +static s32 qcom_vadc_map_temp_voltage(const struct vadc_map_pt *pts,
>> +				      u32 tablesize, int input)
>> +{
>> +	u32 i = 0;
>> +
>> +	while (i < tablesize && pts[i].y < input)
>> +		i++;
>> +
> 
> Comment

Find the first entry that is greater than the temp provided?

> 
>> +	if (i == 0)
>> +		return pts[0].x;
>> +	if (i == tablesize)
>> +		return pts[tablesize - 1].x;
>> +
>> +	return fixp_linear_interpolate(pts[i - 1].y, pts[i - 1].x,
>> +			pts[i].y, pts[i].x, input);
>> +}
>>   static void qcom_vadc_scale_calib(const struct vadc_linear_graph *calib_graph,
>>   				  u16 adc_code,
>>   				  bool absolute,
>> @@ -463,6 +480,20 @@ static int qcom_vadc_scale_chg_temp(const struct vadc_linear_graph *calib_graph,
>>   	return 0;
>>   }
>>   
>> +static u16 qcom_vadc_scale_voltage_code(int voltage,
>> +					const struct vadc_prescale_ratio *prescale,
>> +					const u32 full_scale_code_volt,
>> +					unsigned int factor)
>> +{
>> +	s64 volt = voltage;
>> +	s64 adc_vdd_ref_mv = 1875;
> 
> Comment to explain

1.875V is an ADC reference voltage.

> 
>> +	volt *= prescale->num * factor * full_scale_code_volt;
>> +	volt = div64_s64(volt, (s64)prescale->den * adc_vdd_ref_mv * 1000);
>> +	return volt;
>> +}
> 
> The function returns u16 but  volt is s64.

The function returns the value to be programmed into comparator.

> 
>> +
>>   static int qcom_vadc_scale_code_voltage_factor(u16 adc_code,
>>   				const struct vadc_prescale_ratio *prescale,
>>   				const struct adc5_data *data,
>> @@ -627,6 +658,19 @@ int qcom_vadc_scale(enum vadc_scale_fn_type scaletype,
>>   }
>>   EXPORT_SYMBOL(qcom_vadc_scale);
>>   
>> +u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
>> +				 u32 full_scale_code_volt, int temp)
>> +{
>> +	const struct vadc_prescale_ratio *prescale = &adc5_prescale_ratios[prescale_ratio];
>> +	s32 voltage;
>> +
>> +	voltage = qcom_vadc_map_temp_voltage(adcmap_100k_104ef_104fb_1875_vref,
>> +					     ARRAY_SIZE(adcmap_100k_104ef_104fb_1875_vref),
>> +					     temp);
> 
> voltage is s32, parameter is int below.

I'll fix this.

> 
>> +	return qcom_vadc_scale_voltage_code(voltage, prescale, full_scale_code_volt, 1000);
>> +}
>> +EXPORT_SYMBOL(qcom_adc_tm5_temp_volt_scale);
>> +
>>   int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
>>   		    unsigned int prescale_ratio,
>>   		    const struct adc5_data *data,
>> diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig
>> index aa9c1d80fae4..8d5ac2df26dc 100644
>> --- a/drivers/thermal/qcom/Kconfig
>> +++ b/drivers/thermal/qcom/Kconfig
>> @@ -10,6 +10,17 @@ config QCOM_TSENS
>>   	  Also able to set threshold temperature for both hot and cold and update
>>   	  when a threshold is reached.
>>   
>> +config QCOM_SPMI_ADC_TM5
>> +	tristate "Qualcomm SPMI PMIC Thermal Monitor ADC5"
>> +	depends on OF && SPMI && IIO
>> +	select REGMAP_SPMI
>> +	select QCOM_VADC_COMMON
>> +	help
>> +	  This enables the thermal driver for the ADC thermal monitoring
>> +	  device. It shows up as a thermal zone with multiple trip points.
>> +	  Thermal client sets threshold temperature for both warm and cool and
>> +	  gets updated when a threshold is reached.
>> +
>>   config QCOM_SPMI_TEMP_ALARM
>>   	tristate "Qualcomm SPMI PMIC Temperature Alarm"
>>   	depends on OF && SPMI && IIO
>> diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
>> index ec86eef7f6a6..252ea7d9da0b 100644
>> --- a/drivers/thermal/qcom/Makefile
>> +++ b/drivers/thermal/qcom/Makefile
>> @@ -3,4 +3,5 @@ obj-$(CONFIG_QCOM_TSENS)	+= qcom_tsens.o
>>   
>>   qcom_tsens-y			+= tsens.o tsens-v2.o tsens-v1.o tsens-v0_1.o \
>>   				   tsens-8960.o
>> +obj-$(CONFIG_QCOM_SPMI_ADC_TM5)	+= qcom-spmi-adc-tm5.o
>>   obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM)	+= qcom-spmi-temp-alarm.o
>> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
>> new file mode 100644
>> index 000000000000..eda3f2d1697e
>> --- /dev/null
>> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5.c
>> @@ -0,0 +1,604 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
> 
> Why adding the copyright above ?

LF (CAF) is the author of original code, heavily reworked by me.

> 
>> + * Copyright (c) 2020 Linaro Limited
>> + */
>> +
>> +#include <linux/bitfield.h>
>> +#include <linux/iio/adc/qcom-vadc-common.h>
>> +#include <linux/iio/consumer.h>
>> +#include <linux/interrupt.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_device.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/regmap.h>
>> +#include <linux/thermal.h>
>> +
>> +#define ADC5_MAX_CHANNEL                        0xc0
>> +#define ADC_TM5_NUM_CHANNELS		8
>> +
>> +#define ADC_TM5_STATUS_LOW			0x0a
>> +
>> +#define ADC_TM5_STATUS_HIGH			0x0b
>> +
>> +#define ADC_TM5_NUM_BTM				0x0f
>> +
>> +#define ADC_TM5_ADC_DIG_PARAM			0x42
>> +
>> +#define ADC_TM5_FAST_AVG_CTL			(ADC_TM5_ADC_DIG_PARAM + 1)
>> +#define ADC_TM5_FAST_AVG_EN				BIT(7)
>> +
>> +#define ADC_TM5_MEAS_INTERVAL_CTL		(ADC_TM5_ADC_DIG_PARAM + 2)
>> +#define ADC_TM5_TIMER1					3 /* 3.9ms */
>> +
>> +#define ADC_TM5_MEAS_INTERVAL_CTL2		(ADC_TM5_ADC_DIG_PARAM + 3)
>> +#define ADC_TM5_MEAS_INTERVAL_CTL2_MASK			0xf0
>> +#define ADC_TM5_TIMER2					10 /* 1 second */
>> +#define ADC_TM5_MEAS_INTERVAL_CTL3_MASK			0xf
>> +#define ADC_TM5_TIMER3					4 /* 4 second */
> 
> Should it be 40 ?

Verifyed register description. No, these values are correct.

> 
> 
>> +#define ADC_TM_EN_CTL1				0x46
>> +#define ADC_TM_EN					BIT(7)
>> +#define ADC_TM_CONV_REQ				0x47
>> +#define ADC_TM_CONV_REQ_EN				BIT(7)
>> +
>> +#define ADC_TM5_M_CHAN_BASE			0x60
>> +
>> +#define ADC_TM5_M_ADC_CH_SEL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 0)
>> +#define ADC_TM5_M_LOW_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 1)
>> +#define ADC_TM5_M_LOW_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 2)
>> +#define ADC_TM5_M_HIGH_THR0(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 3)
>> +#define ADC_TM5_M_HIGH_THR1(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 4)
>> +#define ADC_TM5_M_MEAS_INTERVAL_CTL(n)		(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 5)
>> +#define ADC_TM5_M_CTL(n)			(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 6)
>> +#define ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK		0xf
>> +#define ADC_TM5_M_CTL_CAL_SEL_MASK			0x30
>> +#define ADC_TM5_M_CTL_CAL_VAL				0x40
>> +#define ADC_TM5_M_EN(n)				(ADC_TM5_M_CHAN_BASE + ((n) * 8) + 7)
>> +#define ADC_TM5_M_MEAS_EN				BIT(7)
>> +#define ADC_TM5_M_HIGH_THR_INT_EN			BIT(1)
>> +#define ADC_TM5_M_LOW_THR_INT_EN			BIT(0)
>> +
>> +enum adc5_timer_select {
>> +	ADC5_TIMER_SEL_1 = 0,
>> +	ADC5_TIMER_SEL_2,
>> +	ADC5_TIMER_SEL_3,
>> +	ADC5_TIMER_SEL_NONE,
>> +};
>> +
>> +struct adc_tm5_data {
>> +	const u32	full_scale_code_volt;
>> +	unsigned int	*decimation;
>> +	unsigned int	*hw_settle;
>> +};
>> +
>> +enum adc_tm5_cal_method {
>> +	ADC_TM5_NO_CAL = 0,
>> +	ADC_TM5_RATIOMETRIC_CAL,
>> +	ADC_TM5_ABSOLUTE_CAL
>> +};
>> +
>> +struct adc_tm5_chip;
>> +
>> +/**
>> + * struct adc_tm5_channel - ADC Thermal Monitoring channel data.
>> + * @channel: channel number.
>> + * @adc_channel: corresponding ADC channel number.
>> + * @cal_method: calibration method.
>> + * @prescale: channel scaling performed on the input signal.
>> + * @hw_settle_time: the time between AMUX being configured and the
>> + *	start of conversion.
>> + * @iio: IIO channel instance used by this channel.
>> + * @chip: ADC TM chip instance.
>> + * @tzd: thermal zone device used by this channel.
>> + */
>> +struct adc_tm5_channel {
>> +	unsigned int		channel;
>> +	unsigned int		adc_channel;
>> +	enum adc_tm5_cal_method	cal_method;
>> +	unsigned int		prescale;
>> +	unsigned int		hw_settle_time;
>> +	struct iio_channel	*iio;
>> +	struct adc_tm5_chip	*chip;
>> +	struct thermal_zone_device *tzd;
>> +};
>> +
>> +/**
>> + * struct adc_tm5_chip - ADC Thermal Monitoring properties
>> + * @regmap: SPMI ADC5 Thermal Monitoring  peripheral register map field.
>> + * @dev: SPMI ADC5 device.
>> + * @data: software configuration data.
>> + * @channels: array of ADC TM channel data.
>> + * @nchannels: amount of channels defined/allocated
>> + * @decimation: sampling rate supported for the channel.
>> + * @avg_samples: ability to provide single result from the ADC
>> + *	that is an average of multiple measurements.
>> + * @base: base address of TM registers.
>> + */
>> +struct adc_tm5_chip {
>> +	struct regmap		*regmap;
>> +	struct device		*dev;
>> +	const struct adc_tm5_data	*data;
>> +	struct adc_tm5_channel	*channels;
>> +	unsigned int		nchannels;
>> +	unsigned int		decimation;
>> +	unsigned int		avg_samples;
>> +	u16			base;
>> +};
>> +
>> +static const struct adc_tm5_data adc_tm5_data_pmic = {
>> +	.full_scale_code_volt = 0x70e4,
>> +	.decimation = (unsigned int []) { 250, 420, 840 },
>> +	.hw_settle = (unsigned int []) { 15, 100, 200, 300, 400, 500, 600, 700,
>> +					 1000, 2000, 4000, 8000, 16000, 32000,
>> +					 64000, 128000 },
>> +};
>> +
>> +static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
>> +{
>> +	return regmap_bulk_read(adc_tm->regmap, adc_tm->base + offset, data, len);
>> +}
>> +
>> +static int adc_tm5_write(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len)
>> +{
>> +	return regmap_bulk_write(adc_tm->regmap, adc_tm->base + offset, data, len);
>> +}
>> +
>> +static int adc_tm5_reg_update(struct adc_tm5_chip *adc_tm, u16 offset, u8 mask, u8 val)
>> +{
>> +	return regmap_write_bits(adc_tm->regmap, adc_tm->base + offset, mask, val);
>> +}
>> +
>> +static irqreturn_t adc_tm5_isr(int irq, void *data)
>> +{
>> +	struct adc_tm5_chip *chip = data;
>> +	u8 status_low, status_high, ctl;
>> +	int ret, i;
>> +
>> +	ret = adc_tm5_read(chip, ADC_TM5_STATUS_LOW, &status_low, sizeof(status_low));
>> +	if (unlikely(ret)) {
>> +		dev_err(chip->dev, "read status low failed: %d\n", ret);
>> +		return IRQ_HANDLED;
>> +	}
> 
> I suspect there is a deadlock here. If any routine calling adc_tm5_read
> / adc_tm5_write which holds the regmap lock is interrupted by this isr,
> it will try to acquire the lock again and block.

isr is a threaded IRQ, so it won't deadlock here.

> 
>> +	ret = adc_tm5_read(chip, ADC_TM5_STATUS_HIGH, &status_high, sizeof(status_high));
>> +	if (unlikely(ret)) {
>> +		dev_err(chip->dev, "read status high failed: %d\n", ret);
>> +		return IRQ_HANDLED;
>> +	}
>> +
>> +	for (i = 0; i < chip->nchannels; i++) {
>> +		bool upper_set = false, lower_set = false;
>> +		unsigned int ch = chip->channels[i].channel;
>> +
>> +		/* No TZD, we warned at the boot time */
>> +		if (!chip->channels[i].tzd)
>> +			continue;
>> +
>> +		ret = adc_tm5_read(chip, ADC_TM5_M_EN(ch), &ctl, sizeof(ctl));
>> +		if (unlikely(ret)) {
>> +			dev_err(chip->dev, "ctl read failed: %d, channel %d\n", ret, i);
>> +			continue;
>> +		}
>> +
>> +		if (!(ctl & ADC_TM5_M_MEAS_EN))
>> +			continue;
>> +
>> +		lower_set = (status_low & BIT(ch)) &&
>> +			(ctl & ADC_TM5_M_LOW_THR_INT_EN);
>> +
>> +		upper_set = (status_high & BIT(ch)) &&
>> +			(ctl & ADC_TM5_M_HIGH_THR_INT_EN);
>> +
>> +		if (upper_set || lower_set)
>> +			thermal_zone_device_update(chip->channels[i].tzd,
>> +						   THERMAL_EVENT_UNSPECIFIED);
>> +	}
>> +
>> +	return IRQ_HANDLED;
>> +}
>> +
>> +static int adc_tm5_get_temp(void *data, int *temp)
>> +{
>> +	struct adc_tm5_channel *channel = data;
>> +
>> +	if (!channel || !channel->iio)
>> +		return -EINVAL;
>> +
>> +	return iio_read_channel_processed(channel->iio, temp);
>> +}
>> +
>> +static int adc_tm5_disable_channel(struct adc_tm5_channel *channel)
>> +{
>> +	struct adc_tm5_chip *chip = channel->chip;
>> +	unsigned int reg = ADC_TM5_M_EN(channel->channel);
>> +
>> +	return adc_tm5_reg_update(chip, reg,
>> +				  ADC_TM5_M_MEAS_EN |
>> +				  ADC_TM5_M_HIGH_THR_INT_EN |
>> +				  ADC_TM5_M_LOW_THR_INT_EN,
>> +				  0);
>> +}
>> +
>> +static int adc_tm5_enable(struct adc_tm5_chip *chip)
>> +{
>> +	int ret;
>> +	u8 data;
>> +
>> +	data = ADC_TM_EN;
>> +	ret = adc_tm5_write(chip, ADC_TM_EN_CTL1, &data, sizeof(data));
>> +	if (ret < 0) {
>> +		dev_err(chip->dev, "adc-tm enable failed\n");
>> +		return ret;
>> +	}
>> +
>> +	data = ADC_TM_CONV_REQ_EN;
>> +	ret = adc_tm5_write(chip, ADC_TM_CONV_REQ, &data, sizeof(data));
>> +	if (ret < 0) {
>> +		dev_err(chip->dev, "adc-tm request conversion failed\n");
>> +		return ret;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int adc_tm5_configure(struct adc_tm5_channel *channel, int low, int high)
>> +{
>> +	struct adc_tm5_chip *chip = channel->chip;
>> +	u8 buf[8];
>> +	u16 reg = ADC_TM5_M_ADC_CH_SEL_CTL(channel->channel);
>> +	int ret;
>> +
>> +	ret = adc_tm5_read(chip, reg, buf, sizeof(buf));
>> +	if (ret) {
>> +		dev_err(chip->dev, "channel %d params read failed: %d\n", channel->channel, ret);
>> +		return ret;
>> +	}
>> +
>> +	buf[0] = channel->adc_channel;
>> +
>> +	/* High temperature corresponds to low voltage threshold */
>> +	if (high != INT_MAX) {
>> +		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
>> +				chip->data->full_scale_code_volt, high);
>> +
>> +		buf[1] = adc_code & 0xff;
>> +		buf[2] = adc_code >> 8;
>> +		buf[7] |= ADC_TM5_M_LOW_THR_INT_EN;
>> +	} else {
>> +		buf[7] &= ~ADC_TM5_M_LOW_THR_INT_EN;
>> +	}
>> +
>> +	/* Low temperature corresponds to high voltage threshold */
>> +	if (low != -INT_MAX) {
>> +		u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale,
>> +				chip->data->full_scale_code_volt, low);
>> +
>> +		buf[3] = adc_code & 0xff;
>> +		buf[4] = adc_code >> 8;
>> +		buf[7] |= ADC_TM5_M_HIGH_THR_INT_EN;
>> +	} else {
>> +		buf[7] &= ~ADC_TM5_M_HIGH_THR_INT_EN;
>> +	}
>> +
>> +	buf[5] = ADC5_TIMER_SEL_2;
>> +
>> +	/* Set calibration select, hw_settle delay */
>> +	buf[6] &= ~ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK;
>> +	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK, channel->hw_settle_time);
>> +	buf[6] &= ~ADC_TM5_M_CTL_CAL_SEL_MASK;
>> +	buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_CAL_SEL_MASK, channel->cal_method);
>> +
>> +	buf[7] |= ADC_TM5_M_MEAS_EN;
>> +
>> +	ret = adc_tm5_write(chip, reg, buf, sizeof(buf));
>> +	if (ret) {
>> +		dev_err(chip->dev, "channel %d params write failed: %d\n", channel->channel, ret);
>> +		return ret;
>> +	}
>> +
>> +	return adc_tm5_enable(chip);
>> +}
>> +
>> +static int adc_tm5_set_trips(void *data, int low, int high)
>> +{
>> +	struct adc_tm5_channel *channel = data;
>> +	struct adc_tm5_chip *chip;
>> +	int ret;
>> +
>> +	if (!channel)
>> +		return -EINVAL;
>> +
>> +	chip = channel->chip;
>> +	dev_dbg(chip->dev, "%d:low(mdegC):%d, high(mdegC):%d\n",
>> +		channel->channel, low, high);
>> +
>> +	if (high == INT_MAX && low <= -INT_MAX)
>> +		ret = adc_tm5_disable_channel(channel);
>> +	else
>> +		ret = adc_tm5_configure(channel, low, high);
>> +
>> +	return ret;
>> +}
>> +
>> +static struct thermal_zone_of_device_ops adc_tm5_ops = {
>> +	.get_temp = adc_tm5_get_temp,
>> +	.set_trips = adc_tm5_set_trips,
>> +};
>> +
>> +static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm)
>> +{
>> +	unsigned int i;
>> +	struct thermal_zone_device *tzd;
>> +
>> +	for (i = 0; i < adc_tm->nchannels; i++) {
>> +		adc_tm->channels[i].chip = adc_tm;
>> +
>> +		tzd = devm_thermal_zone_of_sensor_register(adc_tm->dev,
>> +							   adc_tm->channels[i].channel,
>> +							   &adc_tm->channels[i],
>> +							   &adc_tm5_ops);
>> +		if (IS_ERR(tzd)) {
>> +			dev_err(adc_tm->dev, "Error registering TZ zone for channel %d: %ld\n",
>> +				adc_tm->channels[i].channel, PTR_ERR(tzd));
>> +			return PTR_ERR(tzd);
>> +		}
>> +		adc_tm->channels[i].tzd = tzd;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int adc_tm5_init(struct adc_tm5_chip *chip)
>> +{
>> +	u8 buf[4], channels_available;
>> +	int ret;
>> +	unsigned int i;
>> +
>> +	for (i = 0; i < chip->nchannels; i++) {
>> +		if (chip->channels[i].channel >= channels_available) {
>> +			dev_err(chip->dev, "Invalid channel %d\n", chip->channels[i].channel);
>> +			return -EINVAL;
>> +		}
>> +	}
>> +
>> +	ret = adc_tm5_read(chip, ADC_TM5_NUM_BTM,
>> +			   &channels_available, sizeof(channels_available));
>> +	if (ret) {
>> +		dev_err(chip->dev, "read failed for BTM channels\n");
>> +		return ret;
>> +	}
>> +
>> +	buf[0] = chip->decimation;
>> +	buf[1] = chip->avg_samples | ADC_TM5_FAST_AVG_EN;
>> +	buf[2] = ADC_TM5_TIMER1;
>> +	buf[3] = FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL2_MASK, ADC_TM5_TIMER2) |
>> +		 FIELD_PREP(ADC_TM5_MEAS_INTERVAL_CTL3_MASK, ADC_TM5_TIMER3);
>> +
>> +	ret = adc_tm5_write(chip, ADC_TM5_ADC_DIG_PARAM, buf, sizeof(buf));
>> +	if (ret) {
>> +		dev_err(chip->dev, "block write failed: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	return ret;
>> +}
>> +
>> +static int adc_tm5_get_dt_channel_data(struct adc_tm5_chip *adc_tm,
>> +				       struct adc_tm5_channel *channel,
>> +				       struct device_node *node)
>> +{
>> +	const char *name = node->name;
>> +	u32 chan, value, varr[2];
>> +	int ret;
>> +	struct device *dev = adc_tm->dev;
>> +	struct of_phandle_args args;
>> +
>> +	ret = of_property_read_u32(node, "reg", &chan);
>> +	if (ret) {
>> +		dev_err(dev, "%s: invalid channel number %d\n", name, ret);
>> +		return ret;
>> +	}
>> +
>> +	if (chan >= ADC_TM5_NUM_CHANNELS) {
>> +		dev_err(dev, "%s: channel number too big: %d\n", name, chan);
>> +		return -EINVAL;
>> +	}
>> +
>> +	channel->channel = chan;
>> +
>> +	/*
>> +	 * We are tied to PMIC's ADC controller, which always use single
>> +	 * argument for channel number.  So don't bother parsing
>> +	 * #io-channel-cells, just enforce cell_count = 1.
>> +	 */
>> +	ret = of_parse_phandle_with_fixed_args(node, "io-channels", 1, 0, &args);
>> +	if (ret < 0) {
>> +		dev_err(dev, "%s: error parsing ADC channel number %d: %d\n", name, chan, ret);
>> +		return ret;
>> +	}
>> +	of_node_put(args.np);
>> +
>> +	if (args.args_count != 1 || args.args[0] >= ADC5_MAX_CHANNEL) {
>> +		dev_err(dev, "%s: invalid ADC channel number %d\n", name, chan);
>> +		return ret;
>> +	}
>> +	channel->adc_channel = args.args[0];
>> +
>> +	channel->iio = devm_of_iio_channel_get_by_name(adc_tm->dev, node, NULL);
>> +	if (IS_ERR(channel->iio)) {
>> +		ret = PTR_ERR(channel->iio);
>> +		if (ret != -EPROBE_DEFER)
>> +			dev_err(dev, "%s: error getting channel: %d\n", name, ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = of_property_read_u32_array(node, "qcom,pre-scaling", varr, 2);
>> +	if (!ret) {
>> +		ret = qcom_adc5_prescaling_from_dt(varr[0], varr[1]);
>> +		if (ret < 0) {
>> +			dev_err(dev, "%s: invalid pre-scaling <%d %d>\n",
>> +				name, varr[0], varr[1]);
>> +			return ret;
>> +		}
>> +		channel->prescale = ret;
>> +	} else {
>> +		/* 1:1 prescale is index 0 */
>> +		channel->prescale = 0;
>> +	}
>> +
>> +	ret = of_property_read_u32(node, "qcom,hw-settle-time-us", &value);
>> +	if (!ret) {
>> +		ret = qcom_adc5_hw_settle_time_from_dt(value, adc_tm->data->hw_settle);
>> +		if (ret < 0) {
>> +			dev_err(dev, "%s invalid hw-settle-time-us %d us\n",
>> +				name, value);
>> +			return ret;
>> +		}
>> +		channel->hw_settle_time = ret;
>> +	} else {
>> +		channel->hw_settle_time = VADC_DEF_HW_SETTLE_TIME;
>> +	}
>> +
>> +	if (of_property_read_bool(node, "qcom,ratiometric"))
>> +		channel->cal_method = ADC_TM5_RATIOMETRIC_CAL;
>> +	else
>> +		channel->cal_method = ADC_TM5_ABSOLUTE_CAL;
>> +
>> +	return 0;
>> +}
>> +
>> +static int adc_tm5_get_dt_data(struct adc_tm5_chip *adc_tm, struct device_node *node)
>> +{
>> +	struct adc_tm5_channel *channels;
>> +	struct device_node *child;
>> +	u32 value;
>> +	int ret;
>> +	struct device *dev = adc_tm->dev;
>> +
>> +	adc_tm->nchannels = of_get_available_child_count(node);
>> +	if (!adc_tm->nchannels)
>> +		return -EINVAL;
>> +
>> +	adc_tm->channels = devm_kcalloc(dev, adc_tm->nchannels,
>> +					sizeof(*adc_tm->channels), GFP_KERNEL);
>> +	if (!adc_tm->channels)
>> +		return -ENOMEM;
>> +
>> +	channels = adc_tm->channels;
>> +
>> +	adc_tm->data = of_device_get_match_data(dev);
>> +	if (!adc_tm->data)
>> +		adc_tm->data = &adc_tm5_data_pmic;
>> +
>> +	ret = of_property_read_u32(node, "qcom,decimation", &value);
>> +	if (!ret) {
>> +		ret = qcom_adc5_decimation_from_dt(value, adc_tm->data->decimation);
>> +		if (ret < 0) {
>> +			dev_err(dev, "invalid decimation %d\n", value);
>> +			return ret;
>> +		}
>> +		adc_tm->decimation = ret;
>> +	} else {
>> +		adc_tm->decimation = ADC5_DECIMATION_DEFAULT;
>> +	}
>> +
>> +	ret = of_property_read_u32(node, "qcom,avg-samples", &value);
>> +	if (!ret) {
>> +		ret = qcom_adc5_avg_samples_from_dt(value);
>> +		if (ret < 0) {
>> +			dev_err(dev, "invalid avg-samples %d\n", value);
>> +			return ret;
>> +		}
>> +		adc_tm->avg_samples = ret;
>> +	} else {
>> +		adc_tm->avg_samples = VADC_DEF_AVG_SAMPLES;
>> +	}
>> +
>> +	for_each_available_child_of_node(node, child) {
>> +		ret = adc_tm5_get_dt_channel_data(adc_tm, channels, child);
>> +		if (ret) {
>> +			of_node_put(child);
>> +			return ret;
>> +		}
>> +
>> +		channels++;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int adc_tm5_probe(struct platform_device *pdev)
>> +{
>> +	struct device_node *node = pdev->dev.of_node;
>> +	struct device *dev = &pdev->dev;
>> +	struct adc_tm5_chip *adc_tm;
>> +	struct regmap *regmap;
>> +	int ret, irq;
>> +	u32 reg;
>> +
>> +	regmap = dev_get_regmap(dev->parent, NULL);
>> +	if (!regmap)
>> +		return -ENODEV;
>> +
>> +	ret = of_property_read_u32(node, "reg", &reg);
>> +	if (ret)
>> +		return ret;
>> +
>> +	adc_tm = devm_kzalloc(&pdev->dev, sizeof(*adc_tm), GFP_KERNEL);
>> +	if (!adc_tm)
>> +		return -ENOMEM;
>> +
>> +	adc_tm->regmap = regmap;
>> +	adc_tm->dev = dev;
>> +	adc_tm->base = reg;
>> +
>> +	irq = platform_get_irq(pdev, 0);
>> +	if (irq < 0) {
>> +		dev_err(dev, "get_irq failed: %d\n", irq);
>> +		return irq;
>> +	}
>> +
>> +	ret = adc_tm5_get_dt_data(adc_tm, node);
>> +	if (ret) {
>> +		dev_err(dev, "get dt data failed: %d\n", ret);
>> +		return ret;
>> +	}
>> +
>> +	ret = adc_tm5_init(adc_tm);
>> +	if (ret) {
>> +		dev_err(dev, "adc-tm init failed\n");
>> +		return ret;
>> +	}
>> +
>> +	ret = adc_tm5_register_tzd(adc_tm);
>> +	if (ret) {
>> +		dev_err(dev, "tzd register failed\n");
>> +		return ret;
>> +	}
>> +
>> +	return devm_request_threaded_irq(dev, irq, NULL, adc_tm5_isr,
>> +					 IRQF_ONESHOT, "pm-adc-tm5", adc_tm);
>> +}
>> +
>> +static const struct of_device_id adc_tm5_match_table[] = {
>> +	{
>> +		.compatible = "qcom,spmi-adc-tm5",
>> +		.data = &adc_tm5_data_pmic,
>> +	},
>> +	{ }
>> +};
>> +MODULE_DEVICE_TABLE(of, adc_tm5_match_table);
>> +
>> +static struct platform_driver adc_tm5_driver = {
>> +	.driver = {
>> +		.name = "qcom-spmi-adc-tm5",
>> +		.of_match_table = adc_tm5_match_table,
>> +	},
>> +	.probe = adc_tm5_probe,
>> +};
>> +module_platform_driver(adc_tm5_driver);
>> +
>> +MODULE_DESCRIPTION("SPMI PMIC Thermal Monitor ADC driver");
>> +MODULE_LICENSE("GPL v2");
>> diff --git a/include/linux/iio/adc/qcom-vadc-common.h b/include/linux/iio/adc/qcom-vadc-common.h
>> index 58216124d89d..33f60f43e1aa 100644
>> --- a/include/linux/iio/adc/qcom-vadc-common.h
>> +++ b/include/linux/iio/adc/qcom-vadc-common.h
>> @@ -158,6 +158,9 @@ int qcom_adc5_hw_scale(enum vadc_scale_fn_type scaletype,
>>   		    const struct adc5_data *data,
>>   		    u16 adc_code, int *result_mdec);
>>   
>> +u16 qcom_adc_tm5_temp_volt_scale(unsigned int prescale_ratio,
>> +				 u32 full_scale_code_volt, int temp);
>> +
>>   int qcom_adc5_prescaling_from_dt(u32 num, u32 den);
>>   
>>   int qcom_adc5_hw_settle_time_from_dt(u32 value, const unsigned int *hw_settle);
>>
> 
> 


-- 
With best wishes
Dmitry

^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, back to index

Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-02 17:49 [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 01/15] dt-bindings: thermal: qcom: add adc-thermal monitor bindings Dmitry Baryshkov
2020-11-04 18:32   ` Rob Herring
2020-11-08 15:52     ` Jonathan Cameron
2020-11-02 17:49 ` [PATCH v9 02/15] fixp-arith: add a linear interpolation function Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 03/15] iio: adc: qcom-vadc: move several adc5 functions to common file Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 04/15] iio: adc: qcom-vadc-common: use fixp_linear_interpolate Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 05/15] iio: adc: move qcom-vadc-common.h to include dir Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 06/15] iio: adc: qcom-spmi-adc5: use of_device_get_match_data Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 07/15] iio: provide of_iio_channel_get_by_name() and devm_ version it Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 08/15] iio: adc: move vadc_map_pt from header to the source file Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 09/15] iio: adc: qcom-vadc-common: rewrite vadc7 die temp calculation Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 10/15] iio: adc: qcom-vadc-common: simplify qcom_vadc_map_voltage_temp Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 11/15] iio: adc: qcom-vadc-common: scale adcmap_100k_104ef_104fb Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 12/15] thermal: qcom: add support for adc-tm5 PMIC thermal monitor Dmitry Baryshkov
2020-11-19 15:33   ` Daniel Lezcano
2020-11-20 22:35     ` Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 13/15] arm64: dts: qcom: pm8150x: add definitions for adc-tm5 part Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 14/15] arm64: dts: sm8250-mtp: add thermal zones using pmic's adc-tm5 Dmitry Baryshkov
2020-11-02 17:49 ` [PATCH v9 15/15] arm64: dts: qrb5165-rb5: port thermal zone definitions Dmitry Baryshkov
2020-11-12 11:39 ` [PATCH v9 00/15] qcom: pm8150: add support for thermal monitoring Daniel Lezcano
2020-11-12 12:41   ` Dmitry Baryshkov
2020-11-12 13:13     ` Daniel Lezcano
2020-11-19 14:42       ` Dmitry Baryshkov

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