[PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[AngeloGioacchino Del Regno]

Hey all!

This time around I thought that it would be nice to get some modem
action going on. We have it, it's working (ish), so just.. why not.

This series adds support for IPA v3.1 (featuring GSI v1.0) and also
takes account for some bits that are shared with other unimplemented
IPA v3 variants and it is specifically targeting MSM8998, for which
support is added.

Since the userspace isn't entirely ready (as far as I can see) for
data connection (3g/lte/whatever) through the modem, it was possible
to only partially test this series.
Specifically, loading the IPA firmware and setting up the interface
went just fine, along with a basic setup of the network interface
that got exposed by this driver.

With this series, the benefits that I see are:
 1. The modem doesn't crash anymore when trying to setup a data
    connection, as now the modem firmware seems to be happy with
    having IPA initialized and ready;
 2. Other random modem crashes while picking up LTE home network
    signal (even just for calling, nothing fancy) seem to be gone.

These are the reasons why I think that this series is ready for
upstream action. It's *at least* stabilizing the platform when
the modem is up.

This was tested on the F(x)Tec Pro 1 (MSM8998) smartphone.

AngeloGioacchino Del Regno (7):
  net: ipa: Add support for IPA v3.1 with GSI v1.0
  net: ipa: endpoint: Don't read unexistant register on IPAv3.1
  net: ipa: gsi: Avoid some writes during irq setup for older IPA
  net: ipa: gsi: Use right masks for GSI v1.0 channels hw param
  net: ipa: Add support for IPA on MSM8998
  dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible
  dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible

 .../devicetree/bindings/net/qcom,ipa.yaml     |   7 +-
 drivers/net/ipa/Makefile                      |   3 +-
 drivers/net/ipa/gsi.c                         |  33 +-
 drivers/net/ipa/gsi_reg.h                     |   5 +
 drivers/net/ipa/ipa_data-msm8998.c            | 407 ++++++++++++++++++
 drivers/net/ipa/ipa_data.h                    |   5 +
 drivers/net/ipa/ipa_endpoint.c                |  26 +-
 drivers/net/ipa/ipa_main.c                    |  12 +-
 drivers/net/ipa/ipa_reg.h                     |   3 +
 drivers/net/ipa/ipa_version.h                 |   1 +
 10 files changed, 480 insertions(+), 22 deletions(-)
 create mode 100644 drivers/net/ipa/ipa_data-msm8998.c

-- 
2.30.0

[PATCH v1 1/7] net: ipa: Add support for IPA v3.1 with GSI v1.0

[AngeloGioacchino Del Regno]

In preparation for adding support for the MSM8998 SoC's IPA,
add the necessary bits for IPA version 3.1 featuring GSI 1.0,
found on at least MSM8998.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/net/ipa/gsi.c          |  8 ++++----
 drivers/net/ipa/ipa_endpoint.c | 17 +++++++++--------
 drivers/net/ipa/ipa_main.c     |  8 ++++++--
 drivers/net/ipa/ipa_reg.h      |  3 +++
 drivers/net/ipa/ipa_version.h  |  1 +
 5 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
index 14d9a791924b..6315336b3ca8 100644
--- a/drivers/net/ipa/gsi.c
+++ b/drivers/net/ipa/gsi.c
@@ -794,14 +794,14 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell)
 
 	/* Max prefetch is 1 segment (do not set MAX_PREFETCH_FMASK) */
 
-	/* We enable the doorbell engine for IPA v3.5.1 */
-	if (gsi->version == IPA_VERSION_3_5_1 && doorbell)
+	/* We enable the doorbell engine for IPA v3.x */
+	if (gsi->version < IPA_VERSION_4_0 && doorbell)
 		val |= USE_DB_ENG_FMASK;
 
 	/* v4.0 introduces an escape buffer for prefetch.  We use it
 	 * on all but the AP command channel.
 	 */
-	if (gsi->version != IPA_VERSION_3_5_1 && !channel->command) {
+	if (gsi->version >= IPA_VERSION_4_0 && !channel->command) {
 		/* If not otherwise set, prefetch buffers are used */
 		if (gsi->version < IPA_VERSION_4_5)
 			val |= USE_ESCAPE_BUF_ONLY_FMASK;
@@ -899,7 +899,7 @@ void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool doorbell)
 
 	gsi_channel_reset_command(channel);
 	/* Due to a hardware quirk we may need to reset RX channels twice. */
-	if (gsi->version == IPA_VERSION_3_5_1 && !channel->toward_ipa)
+	if (gsi->version <= IPA_VERSION_3_5_1 && !channel->toward_ipa)
 		gsi_channel_reset_command(channel);
 
 	gsi_channel_program(channel, doorbell);
diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
index 9f4be9812a1f..06d8aa34276e 100644
--- a/drivers/net/ipa/ipa_endpoint.c
+++ b/drivers/net/ipa/ipa_endpoint.c
@@ -347,7 +347,7 @@ ipa_endpoint_program_suspend(struct ipa_endpoint *endpoint, bool enable)
 {
 	bool suspended;
 
-	if (endpoint->ipa->version != IPA_VERSION_3_5_1)
+	if (endpoint->ipa->version >= IPA_VERSION_4_0)
 		return enable;	/* For IPA v4.0+, no change made */
 
 	/* assert(!endpoint->toward_ipa); */
@@ -1422,11 +1422,12 @@ static void ipa_endpoint_reset(struct ipa_endpoint *endpoint)
 	bool special;
 	int ret = 0;
 
-	/* On IPA v3.5.1, if an RX endpoint is reset while aggregation
-	 * is active, we need to handle things specially to recover.
+	/* On IPA v3.5.1 and older, if an RX endpoint is reset while
+	 * aggregation is active, we need to handle things in a special
+	 * way in order to recover.
 	 * All other cases just need to reset the underlying GSI channel.
 	 */
-	special = ipa->version == IPA_VERSION_3_5_1 &&
+	special = ipa->version <= IPA_VERSION_3_5_1 &&
 			!endpoint->toward_ipa &&
 			endpoint->data->aggregation;
 	if (special && ipa_endpoint_aggr_active(endpoint))
@@ -1525,8 +1526,8 @@ void ipa_endpoint_suspend_one(struct ipa_endpoint *endpoint)
 		(void)ipa_endpoint_program_suspend(endpoint, true);
 	}
 
-	/* IPA v3.5.1 doesn't use channel stop for suspend */
-	stop_channel = endpoint->ipa->version != IPA_VERSION_3_5_1;
+	/* IPA v3.x doesn't use channel stop for suspend */
+	stop_channel = endpoint->ipa->version >= IPA_VERSION_4_0;
 	ret = gsi_channel_suspend(gsi, endpoint->channel_id, stop_channel);
 	if (ret)
 		dev_err(dev, "error %d suspending channel %u\n", ret,
@@ -1546,8 +1547,8 @@ void ipa_endpoint_resume_one(struct ipa_endpoint *endpoint)
 	if (!endpoint->toward_ipa)
 		(void)ipa_endpoint_program_suspend(endpoint, false);
 
-	/* IPA v3.5.1 doesn't use channel start for resume */
-	start_channel = endpoint->ipa->version != IPA_VERSION_3_5_1;
+	/* IPA v3.x doesn't use channel start for resume */
+	start_channel = endpoint->ipa->version >= IPA_VERSION_4_0;
 	ret = gsi_channel_resume(gsi, endpoint->channel_id, start_channel);
 	if (ret)
 		dev_err(dev, "error %d resuming channel %u\n", ret,
diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
index 84bb8ae92725..be191993fbec 100644
--- a/drivers/net/ipa/ipa_main.c
+++ b/drivers/net/ipa/ipa_main.c
@@ -228,8 +228,8 @@ static void ipa_hardware_config_comp(struct ipa *ipa)
 {
 	u32 val;
 
-	/* Nothing to configure for IPA v3.5.1 */
-	if (ipa->version == IPA_VERSION_3_5_1)
+	/* Nothing to configure for IPA v3.5.1 and below */
+	if (ipa->version <= IPA_VERSION_3_5_1)
 		return;
 
 	val = ioread32(ipa->reg_virt + IPA_REG_COMP_CFG_OFFSET);
@@ -276,6 +276,7 @@ static void ipa_hardware_config_qsb(struct ipa *ipa)
 
 	max1 = 12;
 	switch (version) {
+	case IPA_VERSION_3_1:
 	case IPA_VERSION_3_5_1:
 		max0 = 8;
 		break;
@@ -404,6 +405,9 @@ static void ipa_hardware_config(struct ipa *ipa)
 		/* Enable open global clocks (not needed for IPA v4.5) */
 		val = GLOBAL_FMASK;
 		val |= GLOBAL_2X_CLK_FMASK;
+		if (version == IPA_VERSION_3_1)
+			val |= MISC_FMASK;
+
 		iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET);
 
 		/* Disable PA mask to allow HOLB drop */
diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h
index e6b0827a244e..9b9d6e0397bb 100644
--- a/drivers/net/ipa/ipa_reg.h
+++ b/drivers/net/ipa/ipa_reg.h
@@ -199,6 +199,9 @@ static inline u32 ipa_reg_state_aggr_active_offset(enum ipa_version version)
 /* Backward compatibility register value to use for each version */
 static inline u32 ipa_reg_bcr_val(enum ipa_version version)
 {
+	if (version == IPA_VERSION_3_1)
+		return BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK;
+
 	if (version == IPA_VERSION_3_5_1)
 		return BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK |
 			BCR_TX_NOT_USING_BRESP_FMASK |
diff --git a/drivers/net/ipa/ipa_version.h b/drivers/net/ipa/ipa_version.h
index 2944e2a89023..47f68975d576 100644
--- a/drivers/net/ipa/ipa_version.h
+++ b/drivers/net/ipa/ipa_version.h
@@ -14,6 +14,7 @@
  * it where it's needed.
  */
 enum ipa_version {
+	IPA_VERSION_3_1,	/* GSI version 1.0 */
 	IPA_VERSION_3_5_1,	/* GSI version 1.3.0 */
 	IPA_VERSION_4_0,	/* GSI version 2.0 */
 	IPA_VERSION_4_1,	/* GSI version 2.1 */
-- 
2.30.0

Re: [PATCH v1 1/7] net: ipa: Add support for IPA v3.1 with GSI v1.0

[Jakub Kicinski]

On Thu, 11 Feb 2021 18:50:09 +0100 AngeloGioacchino Del Regno wrote:
> In preparation for adding support for the MSM8998 SoC's IPA,
> add the necessary bits for IPA version 3.1 featuring GSI 1.0,
> found on at least MSM8998.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

please check your patches with ./scripts/kernel-doc for warnings:

drivers/net/ipa/ipa_version.h:24: warning: Enum value 'IPA_VERSION_3_1' not described in enum 'ipa_version'

Re: [PATCH v1 1/7] net: ipa: Add support for IPA v3.1 with GSI v1.0

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> In preparation for adding support for the MSM8998 SoC's IPA,
> add the necessary bits for IPA version 3.1 featuring GSI 1.0,
> found on at least MSM8998.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

Overall, this looks good.  As I mentioned, I've
implemented a very similar set of changes in my
private development tree.  It's part of a much
larger set of changes intended to allow many
IPA versions to be supported.

A few minor comments, below.

					-Alex

> ---
>  drivers/net/ipa/gsi.c          |  8 ++++----
>  drivers/net/ipa/ipa_endpoint.c | 17 +++++++++--------
>  drivers/net/ipa/ipa_main.c     |  8 ++++++--
>  drivers/net/ipa/ipa_reg.h      |  3 +++
>  drivers/net/ipa/ipa_version.h  |  1 +
>  5 files changed, 23 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index 14d9a791924b..6315336b3ca8 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -794,14 +794,14 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell)
>  
>  	/* Max prefetch is 1 segment (do not set MAX_PREFETCH_FMASK) */
>  
> -	/* We enable the doorbell engine for IPA v3.5.1 */
> -	if (gsi->version == IPA_VERSION_3_5_1 && doorbell)
> +	/* We enable the doorbell engine for IPA v3.x */
> +	if (gsi->version < IPA_VERSION_4_0 && doorbell)

My version:
        if (gsi->version < IPA_VERSION_4_0 && doorbell)

So... You're doing the right thing.  Almost all changes I made
like this were identical to yours; others were (I think all)
equivalent.

>  		val |= USE_DB_ENG_FMASK;
>  
>  	/* v4.0 introduces an escape buffer for prefetch.  We use it
>  	 * on all but the AP command channel.
>  	 */
> -	if (gsi->version != IPA_VERSION_3_5_1 && !channel->command) {
> +	if (gsi->version >= IPA_VERSION_4_0 && !channel->command) {
>  		/* If not otherwise set, prefetch buffers are used */
>  		if (gsi->version < IPA_VERSION_4_5)
>  			val |= USE_ESCAPE_BUF_ONLY_FMASK;

. . .

> diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
> index 84bb8ae92725..be191993fbec 100644
> --- a/drivers/net/ipa/ipa_main.c
> +++ b/drivers/net/ipa/ipa_main.c

. . .

> @@ -276,6 +276,7 @@ static void ipa_hardware_config_qsb(struct ipa *ipa)
>  
>  	max1 = 12;
>  	switch (version) {
> +	case IPA_VERSION_3_1:

I do this a little differently now.  These values will be
found in the "ipa_data" file for the platform.

Also I think you'd need different values for IPA v3.1 than
for IPA v3.5.1.

>  	case IPA_VERSION_3_5_1:
>  		max0 = 8;
>  		break;
> @@ -404,6 +405,9 @@ static void ipa_hardware_config(struct ipa *ipa)
>  		/* Enable open global clocks (not needed for IPA v4.5) */
>  		val = GLOBAL_FMASK;
>  		val |= GLOBAL_2X_CLK_FMASK;
> +		if (version == IPA_VERSION_3_1)
> +			val |= MISC_FMASK;

I see this being set for a workaround or IPA v3.1 in the
msm-4.4 tree, but the other two flags aren't set in that
case.  So this might not be quite right.

> +
>  		iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET);
>  
>  		/* Disable PA mask to allow HOLB drop */

. . .

Re: [PATCH v1 1/7] net: ipa: Add support for IPA v3.1 with GSI v1.0

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> In preparation for adding support for the MSM8998 SoC's IPA,
> add the necessary bits for IPA version 3.1 featuring GSI 1.0,
> found on at least MSM8998.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

Almost everything in this patch is the same as what is
now in the upstream code.  There were minor differences,
such as using version < IPA_VERSION_4_0 rather than
version <= IPA_VERSION_3_5_1, and some comment changes.

In this patch there is one thing you had that I did not,
and I show it below.

> ---
>   drivers/net/ipa/gsi.c          |  8 ++++----
>   drivers/net/ipa/ipa_endpoint.c | 17 +++++++++--------
>   drivers/net/ipa/ipa_main.c     |  8 ++++++--
>   drivers/net/ipa/ipa_reg.h      |  3 +++
>   drivers/net/ipa/ipa_version.h  |  1 +
>   5 files changed, 23 insertions(+), 14 deletions(-)
. . .

> diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
> index 84bb8ae92725..be191993fbec 100644
> --- a/drivers/net/ipa/ipa_main.c
> +++ b/drivers/net/ipa/ipa_main.c

. . .

> @@ -404,6 +405,9 @@ static void ipa_hardware_config(struct ipa *ipa)
>   		/* Enable open global clocks (not needed for IPA v4.5) */
>   		val = GLOBAL_FMASK;
>   		val |= GLOBAL_2X_CLK_FMASK;
> +		if (version == IPA_VERSION_3_1)
> +			val |= MISC_FMASK;
> +

This block of code is conditional on:
	if (version >= IPA_VERSION_4_0 && version < IPA_VERSION_4_5)

Therefore adding the MISC_FMASK here won't ever happen.  (It's
possible the code you were working with had some different
logic.)

I do, however, see in the msm-4.4 code that IPA v3.1 enables
the CLKON_CFG CGC_OPEN_MISC bit (only), stating that it's a
workaround.  So I will update the logic and add this.

					-Alex

>   		iowrite32(val, ipa->reg_virt + IPA_REG_CLKON_CFG_OFFSET);
>   
>   		/* Disable PA mask to allow HOLB drop */

. . .

[PATCH v1 2/7] net: ipa: endpoint: Don't read unexistant register on IPAv3.1

[AngeloGioacchino Del Regno]

On IPAv3.1 there is no such FLAVOR_0 register so it is impossible
to read tx/rx channel masks and we have to rely on the correctness
on the provided configuration.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/net/ipa/ipa_endpoint.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
index 06d8aa34276e..10c477e1bb90 100644
--- a/drivers/net/ipa/ipa_endpoint.c
+++ b/drivers/net/ipa/ipa_endpoint.c
@@ -1659,6 +1659,15 @@ int ipa_endpoint_config(struct ipa *ipa)
 	u32 max;
 	u32 val;
 
+	/* Some IPA versions don't provide a FLAVOR register and we cannot
+	 * check the rx/tx masks hence we have to rely on the correctness
+	 * of the provided configuration.
+	 */
+	if (ipa->version == IPA_VERSION_3_1) {
+		ipa->available = U32_MAX;
+		return 0;
+	}
+
 	/* Find out about the endpoints supplied by the hardware, and ensure
 	 * the highest one doesn't exceed the number we support.
 	 */
-- 
2.30.0

Re: [PATCH v1 2/7] net: ipa: endpoint: Don't read unexistant register on IPAv3.1

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> On IPAv3.1 there is no such FLAVOR_0 register so it is impossible
> to read tx/rx channel masks and we have to rely on the correctness
> on the provided configuration.

This works, and is simple.

I think I would rather populate the available mask here
with a mask containing the actual version-specific available
endpoints.  On the other hand, looking at the downstream code,
it looks like almost any of these endpoints could be used.

So, while I don't know for sure the all-1's value here is
*correct*, it's more of a validation check anyway, so it's
probably fine

					-Alex

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  drivers/net/ipa/ipa_endpoint.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
> index 06d8aa34276e..10c477e1bb90 100644
> --- a/drivers/net/ipa/ipa_endpoint.c
> +++ b/drivers/net/ipa/ipa_endpoint.c
> @@ -1659,6 +1659,15 @@ int ipa_endpoint_config(struct ipa *ipa)
>  	u32 max;
>  	u32 val;
>  
> +	/* Some IPA versions don't provide a FLAVOR register and we cannot
> +	 * check the rx/tx masks hence we have to rely on the correctness
> +	 * of the provided configuration.
> +	 */
> +	if (ipa->version == IPA_VERSION_3_1) {
> +		ipa->available = U32_MAX;
> +		return 0;
> +	}
> +
>  	/* Find out about the endpoints supplied by the hardware, and ensure
>  	 * the highest one doesn't exceed the number we support.
>  	 */
> 

Re: [PATCH v1 2/7] net: ipa: endpoint: Don't read unexistant register on IPAv3.1

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> On IPAv3.1 there is no such FLAVOR_0 register so it is impossible
> to read tx/rx channel masks and we have to rely on the correctness
> on the provided configuration.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

What you do here is a very simple solution to the problem that
the FLAVOR_0 register is not available prior to IPA v3.5.

I wanted to try to do something that might allow the configured
endpoints to be checked, but for IPA v3.0 and IPA v3.1 they
just aren't laid out the same way, so it's not so simple.

I will post a patch that does essentially the same thing
you do, but which includes a little more complete explanation
in comments.  It will credit you for the suggestion and provide
a link to this original patch.

					-Alex

> ---
>   drivers/net/ipa/ipa_endpoint.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c
> index 06d8aa34276e..10c477e1bb90 100644
> --- a/drivers/net/ipa/ipa_endpoint.c
> +++ b/drivers/net/ipa/ipa_endpoint.c
> @@ -1659,6 +1659,15 @@ int ipa_endpoint_config(struct ipa *ipa)
>   	u32 max;
>   	u32 val;
>   
> +	/* Some IPA versions don't provide a FLAVOR register and we cannot
> +	 * check the rx/tx masks hence we have to rely on the correctness
> +	 * of the provided configuration.
> +	 */
> +	if (ipa->version == IPA_VERSION_3_1) {
> +		ipa->available = U32_MAX;
> +		return 0;
> +	}
> +
>   	/* Find out about the endpoints supplied by the hardware, and ensure
>   	 * the highest one doesn't exceed the number we support.
>   	 */
> 

[PATCH v1 3/7] net: ipa: gsi: Avoid some writes during irq setup for older IPA

[AngeloGioacchino Del Regno]

On some IPA versions (v3.1 and older), writing to registers
GSI_INTER_EE_SRC_CH_IRQ_OFFSET and GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET
will generate a fault and the SoC will lockup.

Avoid clearing CH and EV_CH interrupts on GSI probe to fix this bad
behavior: we are anyway not going to get spurious interrupts.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/net/ipa/gsi.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
index 6315336b3ca8..b5460cbb085c 100644
--- a/drivers/net/ipa/gsi.c
+++ b/drivers/net/ipa/gsi.c
@@ -207,11 +207,14 @@ static void gsi_irq_setup(struct gsi *gsi)
 	iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
 
 	/* Reverse the offset adjustment for inter-EE register offsets */
-	adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
-	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
-	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
+	if (gsi->version > IPA_VERSION_3_1) {
+		adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
+		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
+		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
+	}
 
 	iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);
+
 }
 
 /* Turn off all GSI interrupts when we're all done */
-- 
2.30.0

Re: [PATCH v1 3/7] net: ipa: gsi: Avoid some writes during irq setup for older IPA

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> On some IPA versions (v3.1 and older), writing to registers
> GSI_INTER_EE_SRC_CH_IRQ_OFFSET and GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET
> will generate a fault and the SoC will lockup.
> 
> Avoid clearing CH and EV_CH interrupts on GSI probe to fix this bad
> behavior: we are anyway not going to get spurious interrupts.

I think the reason for this might be that these registers
are located at a different offset for IPA v3.1.

I'd rather get it right and actively disable these
interrupts rather than assume they won't fire.

Also...  you included an extra blank line; avoid that.

					-Alex

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  drivers/net/ipa/gsi.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index 6315336b3ca8..b5460cbb085c 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -207,11 +207,14 @@ static void gsi_irq_setup(struct gsi *gsi)
>  	iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
>  
>  	/* Reverse the offset adjustment for inter-EE register offsets */
> -	adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
> -	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
> -	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
> +	if (gsi->version > IPA_VERSION_3_1) {
> +		adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
> +		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
> +		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
> +	}
>  
>  	iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);
> +
>  }
>  
>  /* Turn off all GSI interrupts when we're all done */
> 

Re: [PATCH v1 3/7] net: ipa: gsi: Avoid some writes during irq setup for older IPA

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> On some IPA versions (v3.1 and older), writing to registers
> GSI_INTER_EE_SRC_CH_IRQ_OFFSET and GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET
> will generate a fault and the SoC will lockup.
> 
> Avoid clearing CH and EV_CH interrupts on GSI probe to fix this bad
> behavior: we are anyway not going to get spurious interrupts.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

Looking at this more closely, I see that you have found
a *bug* that I will fix.  The bug is that these registers
are the IRQ status registers, not the IRQ mask registers.

I have posted a fix for this bug, and once fixed, and I would
like to know whether this fix makes the fault you were
observing go away.
   https://lore.kernel.org/netdev/20210505223636.232527-1-elder@linaro.org

					-Alex

> ---
>   drivers/net/ipa/gsi.c | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index 6315336b3ca8..b5460cbb085c 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -207,11 +207,14 @@ static void gsi_irq_setup(struct gsi *gsi)
>   	iowrite32(0, gsi->virt + GSI_CNTXT_SRC_IEOB_IRQ_MSK_OFFSET);
>   
>   	/* Reverse the offset adjustment for inter-EE register offsets */
> -	adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
> -	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
> -	iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
> +	if (gsi->version > IPA_VERSION_3_1) {
> +		adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST;
> +		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_CH_IRQ_OFFSET);
> +		iowrite32(0, gsi->virt + adjust + GSI_INTER_EE_SRC_EV_CH_IRQ_OFFSET);
> +	}
>   
>   	iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET);
> +
>   }
>   
>   /* Turn off all GSI interrupts when we're all done */
> 

[PATCH v1 4/7] net: ipa: gsi: Use right masks for GSI v1.0 channels hw param

[AngeloGioacchino Del Regno]

In GSI v1.0 the register GSI_HW_PARAM_2_OFFSET has different layout
so the number of channels and events per EE are, of course, laid out
in 8 bits each (0-7, 8-15 respectively).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/net/ipa/gsi.c     | 16 +++++++++++++---
 drivers/net/ipa/gsi_reg.h |  5 +++++
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
index b5460cbb085c..3311ffe514c9 100644
--- a/drivers/net/ipa/gsi.c
+++ b/drivers/net/ipa/gsi.c
@@ -1790,7 +1790,7 @@ static void gsi_channel_teardown(struct gsi *gsi)
 int gsi_setup(struct gsi *gsi)
 {
 	struct device *dev = gsi->dev;
-	u32 val;
+	u32 val, mask;
 	int ret;
 
 	/* Here is where we first touch the GSI hardware */
@@ -1804,7 +1804,12 @@ int gsi_setup(struct gsi *gsi)
 
 	val = ioread32(gsi->virt + GSI_GSI_HW_PARAM_2_OFFSET);
 
-	gsi->channel_count = u32_get_bits(val, NUM_CH_PER_EE_FMASK);
+	if (gsi->version == IPA_VERSION_3_1)
+		mask = GSIV1_NUM_CH_PER_EE_FMASK;
+	else
+		mask = NUM_CH_PER_EE_FMASK;
+
+	gsi->channel_count = u32_get_bits(val, mask);
 	if (!gsi->channel_count) {
 		dev_err(dev, "GSI reports zero channels supported\n");
 		return -EINVAL;
@@ -1816,7 +1821,12 @@ int gsi_setup(struct gsi *gsi)
 		gsi->channel_count = GSI_CHANNEL_COUNT_MAX;
 	}
 
-	gsi->evt_ring_count = u32_get_bits(val, NUM_EV_PER_EE_FMASK);
+	if (gsi->version == IPA_VERSION_3_1)
+		mask = GSIV1_NUM_EV_PER_EE_FMASK;
+	else
+		mask = NUM_EV_PER_EE_FMASK;
+
+	gsi->evt_ring_count = u32_get_bits(val, mask);
 	if (!gsi->evt_ring_count) {
 		dev_err(dev, "GSI reports zero event rings supported\n");
 		return -EINVAL;
diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h
index 0e138bbd8205..4ba579fa21c2 100644
--- a/drivers/net/ipa/gsi_reg.h
+++ b/drivers/net/ipa/gsi_reg.h
@@ -287,6 +287,11 @@ enum gsi_generic_cmd_opcode {
 			GSI_EE_N_GSI_HW_PARAM_2_OFFSET(GSI_EE_AP)
 #define GSI_EE_N_GSI_HW_PARAM_2_OFFSET(ee) \
 			(0x0001f040 + 0x4000 * (ee))
+
+/* Fields below are present for IPA v3.1 with GSI version 1 */
+#define GSIV1_NUM_EV_PER_EE_FMASK	GENMASK(8, 0)
+#define GSIV1_NUM_CH_PER_EE_FMASK	GENMASK(15, 8)
+/* Fields below are present for IPA v3.5.1 and above */
 #define IRAM_SIZE_FMASK			GENMASK(2, 0)
 #define NUM_CH_PER_EE_FMASK		GENMASK(7, 3)
 #define NUM_EV_PER_EE_FMASK		GENMASK(12, 8)
-- 
2.30.0

Re: [PATCH v1 4/7] net: ipa: gsi: Use right masks for GSI v1.0 channels hw param

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> In GSI v1.0 the register GSI_HW_PARAM_2_OFFSET has different layout
> so the number of channels and events per EE are, of course, laid out
> in 8 bits each (0-7, 8-15 respectively).
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  drivers/net/ipa/gsi.c     | 16 +++++++++++++---
>  drivers/net/ipa/gsi_reg.h |  5 +++++
>  2 files changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index b5460cbb085c..3311ffe514c9 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -1790,7 +1790,7 @@ static void gsi_channel_teardown(struct gsi *gsi)
>  int gsi_setup(struct gsi *gsi)
>  {
>  	struct device *dev = gsi->dev;
> -	u32 val;
> +	u32 val, mask;
>  	int ret;
>  
>  	/* Here is where we first touch the GSI hardware */
> @@ -1804,7 +1804,12 @@ int gsi_setup(struct gsi *gsi)
>  
>  	val = ioread32(gsi->virt + GSI_GSI_HW_PARAM_2_OFFSET);
>  
> -	gsi->channel_count = u32_get_bits(val, NUM_CH_PER_EE_FMASK);
> +	if (gsi->version == IPA_VERSION_3_1)
> +		mask = GSIV1_NUM_CH_PER_EE_FMASK;
> +	else
> +		mask = NUM_CH_PER_EE_FMASK;
> +
> +	gsi->channel_count = u32_get_bits(val, mask);

I have a different way of doing this, at least for
encoding, and I'd rather use a similar convention in
this case.  At some point it might become obvious
that "there's got to be a better way" and I might have
to consider something else, but for now I've been
doing what I describe below.

Anyway, what I'd ask for here is to create a a static
inline function in "ipa_reg.h" (or "gsi_reg.h") to
extract these values.  In this case it might look
like this:

static inline u32 num_ev_per_ee_get(enum ipa_version version,
				    u32 val)
{
        if (version == IPA_VERSION_3_0 || version == IPA_VERSION_3_1)
                return u32_get_bits(val, GENMASK(8, 0));

        return u32_get_bits(val, GENMASK(7, 3));
}

(I'm not sure if the above is correct for all versions...)

Then the caller would do:
	gsi->evt_ring_count = num_ev_per_ee_get(ipa->version, val);

I'd want the same general thing for the channel count.

					-Alex

>  	if (!gsi->channel_count) {
>  		dev_err(dev, "GSI reports zero channels supported\n");
>  		return -EINVAL;
> @@ -1816,7 +1821,12 @@ int gsi_setup(struct gsi *gsi)
>  		gsi->channel_count = GSI_CHANNEL_COUNT_MAX;
>  	}
>  
> -	gsi->evt_ring_count = u32_get_bits(val, NUM_EV_PER_EE_FMASK);
> +	if (gsi->version == IPA_VERSION_3_1)
> +		mask = GSIV1_NUM_EV_PER_EE_FMASK;
> +	else
> +		mask = NUM_EV_PER_EE_FMASK;
> +
> +	gsi->evt_ring_count = u32_get_bits(val, mask);
>  	if (!gsi->evt_ring_count) {
>  		dev_err(dev, "GSI reports zero event rings supported\n");
>  		return -EINVAL;
> diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h
> index 0e138bbd8205..4ba579fa21c2 100644
> --- a/drivers/net/ipa/gsi_reg.h
> +++ b/drivers/net/ipa/gsi_reg.h
> @@ -287,6 +287,11 @@ enum gsi_generic_cmd_opcode {
>  			GSI_EE_N_GSI_HW_PARAM_2_OFFSET(GSI_EE_AP)
>  #define GSI_EE_N_GSI_HW_PARAM_2_OFFSET(ee) \
>  			(0x0001f040 + 0x4000 * (ee))
> +
> +/* Fields below are present for IPA v3.1 with GSI version 1 */
> +#define GSIV1_NUM_EV_PER_EE_FMASK	GENMASK(8, 0)
> +#define GSIV1_NUM_CH_PER_EE_FMASK	GENMASK(15, 8)
> +/* Fields below are present for IPA v3.5.1 and above */
>  #define IRAM_SIZE_FMASK			GENMASK(2, 0)
>  #define NUM_CH_PER_EE_FMASK		GENMASK(7, 3)
>  #define NUM_EV_PER_EE_FMASK		GENMASK(12, 8)
> 

Re: [PATCH v1 4/7] net: ipa: gsi: Use right masks for GSI v1.0 channels hw param

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> In GSI v1.0 the register GSI_HW_PARAM_2_OFFSET has different layout
> so the number of channels and events per EE are, of course, laid out
> in 8 bits each (0-7, 8-15 respectively).

This is actually wrong.  The fields you are fetching here
define the total number of channels (events) supported by
the IPA hardware, not the number of channels (events) per EE.

The fields we want are in the HW_PARAM_2 register, which
is not present until IPA v3.5.1.

As you did with the FLAVOR_0 register in an earlier patch,
I will update the code so the HW_PARAM_2 register is not
read unless it's defined, and will just skip these validity
checks on the endpoint configuration in that case.  We'll
just assume the hardware supports the maximum number of
channels and endpoints supported by the driver if we don't
know otherwise.

					-Alex

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>   drivers/net/ipa/gsi.c     | 16 +++++++++++++---
>   drivers/net/ipa/gsi_reg.h |  5 +++++
>   2 files changed, 18 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c
> index b5460cbb085c..3311ffe514c9 100644
> --- a/drivers/net/ipa/gsi.c
> +++ b/drivers/net/ipa/gsi.c
> @@ -1790,7 +1790,7 @@ static void gsi_channel_teardown(struct gsi *gsi)
>   int gsi_setup(struct gsi *gsi)
>   {
>   	struct device *dev = gsi->dev;
> -	u32 val;
> +	u32 val, mask;
>   	int ret;
>   
>   	/* Here is where we first touch the GSI hardware */
> @@ -1804,7 +1804,12 @@ int gsi_setup(struct gsi *gsi)
>   
>   	val = ioread32(gsi->virt + GSI_GSI_HW_PARAM_2_OFFSET);
>   
> -	gsi->channel_count = u32_get_bits(val, NUM_CH_PER_EE_FMASK);
> +	if (gsi->version == IPA_VERSION_3_1)
> +		mask = GSIV1_NUM_CH_PER_EE_FMASK;
> +	else
> +		mask = NUM_CH_PER_EE_FMASK;
> +
> +	gsi->channel_count = u32_get_bits(val, mask);
>   	if (!gsi->channel_count) {
>   		dev_err(dev, "GSI reports zero channels supported\n");
>   		return -EINVAL;
> @@ -1816,7 +1821,12 @@ int gsi_setup(struct gsi *gsi)
>   		gsi->channel_count = GSI_CHANNEL_COUNT_MAX;
>   	}
>   
> -	gsi->evt_ring_count = u32_get_bits(val, NUM_EV_PER_EE_FMASK);
> +	if (gsi->version == IPA_VERSION_3_1)
> +		mask = GSIV1_NUM_EV_PER_EE_FMASK;
> +	else
> +		mask = NUM_EV_PER_EE_FMASK;
> +
> +	gsi->evt_ring_count = u32_get_bits(val, mask);
>   	if (!gsi->evt_ring_count) {
>   		dev_err(dev, "GSI reports zero event rings supported\n");
>   		return -EINVAL;
> diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h
> index 0e138bbd8205..4ba579fa21c2 100644
> --- a/drivers/net/ipa/gsi_reg.h
> +++ b/drivers/net/ipa/gsi_reg.h
> @@ -287,6 +287,11 @@ enum gsi_generic_cmd_opcode {
>   			GSI_EE_N_GSI_HW_PARAM_2_OFFSET(GSI_EE_AP)
>   #define GSI_EE_N_GSI_HW_PARAM_2_OFFSET(ee) \
>   			(0x0001f040 + 0x4000 * (ee))
> +
> +/* Fields below are present for IPA v3.1 with GSI version 1 */
> +#define GSIV1_NUM_EV_PER_EE_FMASK	GENMASK(8, 0)
> +#define GSIV1_NUM_CH_PER_EE_FMASK	GENMASK(15, 8)
> +/* Fields below are present for IPA v3.5.1 and above */
>   #define IRAM_SIZE_FMASK			GENMASK(2, 0)
>   #define NUM_CH_PER_EE_FMASK		GENMASK(7, 3)
>   #define NUM_EV_PER_EE_FMASK		GENMASK(12, 8)
> 

[PATCH v1 5/7] net: ipa: Add support for IPA on MSM8998

[AngeloGioacchino Del Regno]

MSM8998 features IPA v3.1 (GSI v1.0): add the required configuration
data for it.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 drivers/net/ipa/Makefile           |   3 +-
 drivers/net/ipa/ipa_data-msm8998.c | 407 +++++++++++++++++++++++++++++
 drivers/net/ipa/ipa_data.h         |   5 +
 drivers/net/ipa/ipa_main.c         |   4 +
 4 files changed, 418 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ipa/ipa_data-msm8998.c

diff --git a/drivers/net/ipa/Makefile b/drivers/net/ipa/Makefile
index afe5df1e6eee..4a6f4053dce2 100644
--- a/drivers/net/ipa/Makefile
+++ b/drivers/net/ipa/Makefile
@@ -9,4 +9,5 @@ ipa-y			:=	ipa_main.o ipa_clock.o ipa_reg.o ipa_mem.o \
 				ipa_endpoint.o ipa_cmd.o ipa_modem.o \
 				ipa_qmi.o ipa_qmi_msg.o
 
-ipa-y			+=	ipa_data-sdm845.o ipa_data-sc7180.o
+ipa-y			+=	ipa_data-msm8998.o ipa_data-sdm845.o \
+				ipa_data-sc7180.o
diff --git a/drivers/net/ipa/ipa_data-msm8998.c b/drivers/net/ipa/ipa_data-msm8998.c
new file mode 100644
index 000000000000..90e724468e40
--- /dev/null
+++ b/drivers/net/ipa/ipa_data-msm8998.c
@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2019-2020 Linaro Ltd.
+ * Coypright (C) 2021, AngeloGioacchino Del Regno
+ *                     <angelogioacchino.delregno@somainline.org>
+ */
+
+#include <linux/log2.h>
+
+#include "gsi.h"
+#include "ipa_data.h"
+#include "ipa_endpoint.h"
+#include "ipa_mem.h"
+
+/* Endpoint configuration for the MSM8998 SoC. */
+static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
+	[IPA_ENDPOINT_AP_COMMAND_TX] = {
+		.ee_id		= GSI_EE_AP,
+		.channel_id	= 6,
+		.endpoint_id	= 22,
+		.toward_ipa	= true,
+		.channel = {
+			.tre_count	= 256,
+			.event_count	= 256,
+			.tlv_count	= 18,
+		},
+		.endpoint = {
+			.seq_type	= IPA_SEQ_DMA_ONLY,
+			.config = {
+				.resource_group	= 1,
+				.dma_mode	= true,
+				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
+			},
+		},
+	},
+	[IPA_ENDPOINT_AP_LAN_RX] = {
+		.ee_id		= GSI_EE_AP,
+		.channel_id	= 7,
+		.endpoint_id	= 15,
+		.toward_ipa	= false,
+		.channel = {
+			.tre_count	= 256,
+			.event_count	= 256,
+			.tlv_count	= 8,
+		},
+		.endpoint = {
+			.seq_type	= IPA_SEQ_INVALID,
+			.config = {
+				.resource_group	= 1,
+				.aggregation	= true,
+				.status_enable	= true,
+				.rx = {
+					.pad_align	= ilog2(sizeof(u32)),
+				},
+			},
+		},
+	},
+	[IPA_ENDPOINT_AP_MODEM_TX] = {
+		.ee_id		= GSI_EE_AP,
+		.channel_id	= 5,
+		.endpoint_id	= 3,
+		.toward_ipa	= true,
+		.channel = {
+			.tre_count	= 512,
+			.event_count	= 512,
+			.tlv_count	= 16,
+		},
+		.endpoint = {
+			.filter_support	= true,
+			.seq_type	=
+				IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
+			.config = {
+				.resource_group	= 1,
+				.checksum	= true,
+				.qmap		= true,
+				.status_enable	= true,
+				.tx = {
+					.status_endpoint =
+						IPA_ENDPOINT_MODEM_AP_RX,
+				},
+			},
+		},
+	},
+	[IPA_ENDPOINT_AP_MODEM_RX] = {
+		.ee_id		= GSI_EE_AP,
+		.channel_id	= 8,
+		.endpoint_id	= 16,
+		.toward_ipa	= false,
+		.channel = {
+			.tre_count	= 256,
+			.event_count	= 256,
+			.tlv_count	= 8,
+		},
+		.endpoint = {
+			.seq_type	= IPA_SEQ_INVALID,
+			.config = {
+				.resource_group	= 1,
+				.checksum	= true,
+				.qmap		= true,
+				.aggregation	= true,
+				.rx = {
+					.aggr_close_eof	= true,
+				},
+			},
+		},
+	},
+	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
+		.ee_id		= GSI_EE_MODEM,
+		.channel_id	= 1,
+		.endpoint_id	= 6,
+		.toward_ipa	= true,
+	},
+	[IPA_ENDPOINT_MODEM_LAN_TX] = {
+		.ee_id		= GSI_EE_MODEM,
+		.channel_id	= 4,
+		.endpoint_id	= 9,
+		.toward_ipa	= true,
+		.endpoint = {
+			.filter_support	= true,
+		},
+	},
+	[IPA_ENDPOINT_MODEM_LAN_RX] = {
+		.ee_id		= GSI_EE_MODEM,
+		.channel_id	= 6,
+		.endpoint_id	= 19,
+		.toward_ipa	= false,
+	},
+	[IPA_ENDPOINT_MODEM_AP_TX] = {
+		.ee_id		= GSI_EE_MODEM,
+		.channel_id	= 0,
+		.endpoint_id	= 5,
+		.toward_ipa	= true,
+		.endpoint = {
+			.filter_support	= true,
+		},
+	},
+	[IPA_ENDPOINT_MODEM_AP_RX] = {
+		.ee_id		= GSI_EE_MODEM,
+		.channel_id	= 5,
+		.endpoint_id	= 18,
+		.toward_ipa	= false,
+	},
+};
+
+/* For the MSM8998, resource groups are allocated this way:
+ *              SRC     DST
+ *   group 0:	UL      UL
+ *   group 1:	DL      DL/DPL
+ */
+static const struct ipa_resource_src ipa_resource_src[] = {
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
+		.limits[0] = {
+			.min = 3,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 3,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
+		.limits[0] = {
+			.min = 0,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 0,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
+		.limits[0] = {
+			.min = 0,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 0,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
+		.limits[0] = {
+			.min = 14,
+			.max = 14,
+		},
+		.limits[1] = {
+			.min = 16,
+			.max = 16,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
+		.limits[0] = {
+			.min = 19,
+			.max = 19,
+		},
+		.limits[1] = {
+			.min = 26,
+			.max = 26,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
+		.limits[0] = {
+			.min = 0,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 0,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
+		.limits[0] = {
+			.min = 0,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 0,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
+		.limits[0] = {
+			.min = 14,
+			.max = 14,
+		},
+		.limits[1] = {
+			.min = 16,
+			.max = 16,
+		},
+	},
+};
+
+static const struct ipa_resource_dst ipa_resource_dst[] = {
+	{
+		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
+		.limits[0] = {
+			.min = 2,
+			.max = 2,
+		},
+		.limits[1] = {
+			.min = 3,
+			.max = 3,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
+		.limits[0] = {
+			.min = 0,
+			.max = 255,
+		},
+		.limits[1] = {
+			.min = 0,
+			.max = 255,
+		},
+	},
+	{
+		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
+		.limits[0] = {
+			.min = 2,
+			.max = 63,
+		},
+		.limits[1] = {
+			.min = 1,
+			.max = 63,
+		},
+	},
+};
+
+/* Resource configuration for the MSM8998 SoC. */
+static const struct ipa_resource_data ipa_resource_data = {
+	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
+	.resource_src		= ipa_resource_src,
+	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
+	.resource_dst		= ipa_resource_dst,
+};
+
+/* IPA-resident memory region configuration for the MSM8998 SoC. */
+static const struct ipa_mem ipa_mem_local_data[] = {
+	[IPA_MEM_UC_SHARED] = {
+		.offset		= 0x0000,
+		.size		= 0x0080,
+		.canary_count	= 0,
+	},
+	[IPA_MEM_UC_INFO] = {
+		.offset		= 0x0080,
+		.size		= 0x0200,
+		.canary_count	= 0,
+	},
+	[IPA_MEM_V4_FILTER_HASHED] = {
+		.offset		= 0x0288,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V4_FILTER] = {
+		.offset		= 0x0308,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V6_FILTER_HASHED] = {
+		.offset		= 0x0388,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V6_FILTER] = {
+		.offset		= 0x0408,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V4_ROUTE_HASHED] = {
+		.offset		= 0x0488,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V4_ROUTE] = {
+		.offset		= 0x0508,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V6_ROUTE_HASHED] = {
+		.offset		= 0x0588,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_V6_ROUTE] = {
+		.offset		= 0x0608,
+		.size		= 0x0078,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_MODEM_HEADER] = {
+		.offset		= 0x0688,
+		.size		= 0x0140,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_AP_HEADER] = {
+		.offset		= 0x07c8,
+		.size		= 0x0000,
+		.canary_count	= 0,
+	},
+	[IPA_MEM_MODEM_PROC_CTX] = {
+		.offset		= 0x07d0,
+		.size		= 0x0200,
+		.canary_count	= 2,
+	},
+	[IPA_MEM_AP_PROC_CTX] = {
+		.offset		= 0x09d0,
+		.size		= 0x0200,
+		.canary_count	= 0,
+	},
+	[IPA_MEM_MODEM] = {
+		.offset		= 0x0bd8,
+		.size		= 0x1424,
+		.canary_count	= 0,
+	},
+	[IPA_MEM_UC_EVENT_RING] = { /* end_ofst */
+		.offset		= 0x2000,
+		.size		= 0,
+		.canary_count	= 1,
+	},
+};
+
+static struct ipa_mem_data ipa_mem_data = {
+	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
+	.local		= ipa_mem_local_data,
+	.imem_addr	= 0x146bd000,
+	.imem_size	= 0x00002000,
+	.smem_id	= 497,
+	.smem_size	= 0x00002000,
+};
+
+static struct ipa_clock_data ipa_clock_data = {
+	.core_clock_rate	= 75 * 1000 * 1000,	/* Hz */
+	/* Interconnect rates are in 1000 byte/second units */
+	.interconnect = {
+		[IPA_INTERCONNECT_MEMORY] = {
+			.peak_rate	= 640000,	/* 640 MBps */
+			.average_rate	= 80000,	/* 80 MBps */
+		},
+		/* Average rate is unused for the next two interconnects */
+		[IPA_INTERCONNECT_IMEM] = {
+			.peak_rate	= 640000,	/* 350 MBps */
+			.average_rate	= 0,		/* unused */
+		},
+		[IPA_INTERCONNECT_CONFIG] = {
+			.peak_rate	= 80000,	/* 40 MBps */
+			.average_rate	= 0,		/* unused */
+		},
+	},
+};
+
+/* Configuration data for the MSM8998 SoC. */
+const struct ipa_data ipa_data_msm8998 = {
+	.version	= IPA_VERSION_3_1,
+	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
+	.endpoint_data	= ipa_gsi_endpoint_data,
+	.resource_data	= &ipa_resource_data,
+	.mem_data	= &ipa_mem_data,
+	.clock_data	= &ipa_clock_data,
+};
diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h
index 0ed5ffe2b8da..da2141f6888f 100644
--- a/drivers/net/ipa/ipa_data.h
+++ b/drivers/net/ipa/ipa_data.h
@@ -179,8 +179,11 @@ struct ipa_gsi_endpoint_data {
 /** enum ipa_resource_type_src - source resource types */
 enum ipa_resource_type_src {
 	IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
+	IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
+	IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
 	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
 	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
+	IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
 	IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
 	IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
 };
@@ -188,6 +191,7 @@ enum ipa_resource_type_src {
 /** enum ipa_resource_type_dst - destination resource types */
 enum ipa_resource_type_dst {
 	IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
+	IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
 	IPA_RESOURCE_TYPE_DST_DPS_DMARS,
 };
 
@@ -304,6 +308,7 @@ struct ipa_data {
 	const struct ipa_clock_data *clock_data;
 };
 
+extern const struct ipa_data ipa_data_msm8998;
 extern const struct ipa_data ipa_data_sdm845;
 extern const struct ipa_data ipa_data_sc7180;
 
diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
index be191993fbec..33a7d483c5e0 100644
--- a/drivers/net/ipa/ipa_main.c
+++ b/drivers/net/ipa/ipa_main.c
@@ -721,6 +721,10 @@ static int ipa_firmware_load(struct device *dev)
 }
 
 static const struct of_device_id ipa_match[] = {
+	{
+		.compatible	= "qcom,msm8998-ipa",
+		.data		= &ipa_data_msm8998,
+	},
 	{
 		.compatible	= "qcom,sdm845-ipa",
 		.data		= &ipa_data_sdm845,
-- 
2.30.0

Re: [PATCH v1 5/7] net: ipa: Add support for IPA on MSM8998

[Jakub Kicinski]

On Thu, 11 Feb 2021 18:50:13 +0100 AngeloGioacchino Del Regno wrote:
> MSM8998 features IPA v3.1 (GSI v1.0): add the required configuration
> data for it.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

This one does not build:

drivers/net/ipa/ipa_data-msm8998.c:382:3: error: ‘struct ipa_clock_data’ has no member named ‘interconnect’; did you mean ‘interconnect_data’?
  382 |  .interconnect = {
      |   ^~~~~~~~~~~~
      |   interconnect_data
drivers/net/ipa/ipa_data-msm8998.c:382:2: warning: braces around scalar initializer
  382 |  .interconnect = {
      |  ^
drivers/net/ipa/ipa_data-msm8998.c:382:2: note: (near initialization for ‘ipa_clock_data.interconnect_count’)
drivers/net/ipa/ipa_data-msm8998.c:383:4: error: ‘IPA_INTERCONNECT_MEMORY’ undeclared here (not in a function)
  383 |   [IPA_INTERCONNECT_MEMORY] = {
      |    ^~~~~~~~~~~~~~~~~~~~~~~


Each commit must build cleanly and not add any transient W=1 C=1
warnings.

Re: [PATCH v1 5/7] net: ipa: Add support for IPA on MSM8998

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> MSM8998 features IPA v3.1 (GSI v1.0): add the required configuration
> data for it.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

As of today, I have not looked at this file in detail.  You
probably see that the intent is to have this file define
pretty much everything that varies across platforms.  A lot
of this is found in "ipa_utils.c" in downstream code, and
it is organized differently there.

I have reworked the way resources are represented (also
not yet posted for review, but "soon").  I see you included
the additional ones but I'm not completely sure they'll
get programmed properly (but again, I haven't looked very
closely yet).

Interconnects are done differently upstream than downstream,
and to be honest I'm not completely on top of which platforms
require which interconnects.  I'm gathering information about
them as I can.

Jakub pointed out a compile problem, so you should definitely
avoid ever having those in your patches, but sometimes it
happens.

When I'm ready to post my IPA v3.1 data file for review
I'll take another, closer look at what you have here.

					-Alex
> ---
>  drivers/net/ipa/Makefile           |   3 +-
>  drivers/net/ipa/ipa_data-msm8998.c | 407 +++++++++++++++++++++++++++++
>  drivers/net/ipa/ipa_data.h         |   5 +
>  drivers/net/ipa/ipa_main.c         |   4 +
>  4 files changed, 418 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
> 
> diff --git a/drivers/net/ipa/Makefile b/drivers/net/ipa/Makefile
> index afe5df1e6eee..4a6f4053dce2 100644
> --- a/drivers/net/ipa/Makefile
> +++ b/drivers/net/ipa/Makefile
> @@ -9,4 +9,5 @@ ipa-y			:=	ipa_main.o ipa_clock.o ipa_reg.o ipa_mem.o \
>  				ipa_endpoint.o ipa_cmd.o ipa_modem.o \
>  				ipa_qmi.o ipa_qmi_msg.o
>  
> -ipa-y			+=	ipa_data-sdm845.o ipa_data-sc7180.o
> +ipa-y			+=	ipa_data-msm8998.o ipa_data-sdm845.o \
> +				ipa_data-sc7180.o
> diff --git a/drivers/net/ipa/ipa_data-msm8998.c b/drivers/net/ipa/ipa_data-msm8998.c
> new file mode 100644
> index 000000000000..90e724468e40
> --- /dev/null
> +++ b/drivers/net/ipa/ipa_data-msm8998.c
> @@ -0,0 +1,407 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
> + * Copyright (C) 2019-2020 Linaro Ltd.
> + * Coypright (C) 2021, AngeloGioacchino Del Regno
> + *                     <angelogioacchino.delregno@somainline.org>
> + */
> +
> +#include <linux/log2.h>
> +
> +#include "gsi.h"
> +#include "ipa_data.h"
> +#include "ipa_endpoint.h"
> +#include "ipa_mem.h"
> +
> +/* Endpoint configuration for the MSM8998 SoC. */
> +static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
> +	[IPA_ENDPOINT_AP_COMMAND_TX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 6,
> +		.endpoint_id	= 22,
> +		.toward_ipa	= true,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 18,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_DMA_ONLY,
> +			.config = {
> +				.resource_group	= 1,
> +				.dma_mode	= true,
> +				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_LAN_RX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 7,
> +		.endpoint_id	= 15,
> +		.toward_ipa	= false,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 8,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_INVALID,
> +			.config = {
> +				.resource_group	= 1,
> +				.aggregation	= true,
> +				.status_enable	= true,
> +				.rx = {
> +					.pad_align	= ilog2(sizeof(u32)),
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_MODEM_TX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 5,
> +		.endpoint_id	= 3,
> +		.toward_ipa	= true,
> +		.channel = {
> +			.tre_count	= 512,
> +			.event_count	= 512,
> +			.tlv_count	= 16,
> +		},
> +		.endpoint = {
> +			.filter_support	= true,
> +			.seq_type	=
> +				IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
> +			.config = {
> +				.resource_group	= 1,
> +				.checksum	= true,
> +				.qmap		= true,
> +				.status_enable	= true,
> +				.tx = {
> +					.status_endpoint =
> +						IPA_ENDPOINT_MODEM_AP_RX,
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_MODEM_RX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 8,
> +		.endpoint_id	= 16,
> +		.toward_ipa	= false,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 8,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_INVALID,
> +			.config = {
> +				.resource_group	= 1,
> +				.checksum	= true,
> +				.qmap		= true,
> +				.aggregation	= true,
> +				.rx = {
> +					.aggr_close_eof	= true,
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 1,
> +		.endpoint_id	= 6,
> +		.toward_ipa	= true,
> +	},
> +	[IPA_ENDPOINT_MODEM_LAN_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 4,
> +		.endpoint_id	= 9,
> +		.toward_ipa	= true,
> +		.endpoint = {
> +			.filter_support	= true,
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_LAN_RX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 6,
> +		.endpoint_id	= 19,
> +		.toward_ipa	= false,
> +	},
> +	[IPA_ENDPOINT_MODEM_AP_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 0,
> +		.endpoint_id	= 5,
> +		.toward_ipa	= true,
> +		.endpoint = {
> +			.filter_support	= true,
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_AP_RX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 5,
> +		.endpoint_id	= 18,
> +		.toward_ipa	= false,
> +	},
> +};
> +
> +/* For the MSM8998, resource groups are allocated this way:
> + *              SRC     DST
> + *   group 0:	UL      UL
> + *   group 1:	DL      DL/DPL
> + */
> +static const struct ipa_resource_src ipa_resource_src[] = {
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
> +		.limits[0] = {
> +			.min = 3,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 3,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
> +		.limits[0] = {
> +			.min = 14,
> +			.max = 14,
> +		},
> +		.limits[1] = {
> +			.min = 16,
> +			.max = 16,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
> +		.limits[0] = {
> +			.min = 19,
> +			.max = 19,
> +		},
> +		.limits[1] = {
> +			.min = 26,
> +			.max = 26,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
> +		.limits[0] = {
> +			.min = 14,
> +			.max = 14,
> +		},
> +		.limits[1] = {
> +			.min = 16,
> +			.max = 16,
> +		},
> +	},
> +};
> +
> +static const struct ipa_resource_dst ipa_resource_dst[] = {
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
> +		.limits[0] = {
> +			.min = 2,
> +			.max = 2,
> +		},
> +		.limits[1] = {
> +			.min = 3,
> +			.max = 3,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
> +		.limits[0] = {
> +			.min = 2,
> +			.max = 63,
> +		},
> +		.limits[1] = {
> +			.min = 1,
> +			.max = 63,
> +		},
> +	},
> +};
> +
> +/* Resource configuration for the MSM8998 SoC. */
> +static const struct ipa_resource_data ipa_resource_data = {
> +	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
> +	.resource_src		= ipa_resource_src,
> +	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
> +	.resource_dst		= ipa_resource_dst,
> +};
> +
> +/* IPA-resident memory region configuration for the MSM8998 SoC. */
> +static const struct ipa_mem ipa_mem_local_data[] = {
> +	[IPA_MEM_UC_SHARED] = {
> +		.offset		= 0x0000,
> +		.size		= 0x0080,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_UC_INFO] = {
> +		.offset		= 0x0080,
> +		.size		= 0x0200,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_V4_FILTER_HASHED] = {
> +		.offset		= 0x0288,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_FILTER] = {
> +		.offset		= 0x0308,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_FILTER_HASHED] = {
> +		.offset		= 0x0388,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_FILTER] = {
> +		.offset		= 0x0408,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_ROUTE_HASHED] = {
> +		.offset		= 0x0488,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_ROUTE] = {
> +		.offset		= 0x0508,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_ROUTE_HASHED] = {
> +		.offset		= 0x0588,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_ROUTE] = {
> +		.offset		= 0x0608,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_MODEM_HEADER] = {
> +		.offset		= 0x0688,
> +		.size		= 0x0140,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_AP_HEADER] = {
> +		.offset		= 0x07c8,
> +		.size		= 0x0000,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_MODEM_PROC_CTX] = {
> +		.offset		= 0x07d0,
> +		.size		= 0x0200,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_AP_PROC_CTX] = {
> +		.offset		= 0x09d0,
> +		.size		= 0x0200,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_MODEM] = {
> +		.offset		= 0x0bd8,
> +		.size		= 0x1424,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_UC_EVENT_RING] = { /* end_ofst */
> +		.offset		= 0x2000,
> +		.size		= 0,
> +		.canary_count	= 1,
> +	},
> +};
> +
> +static struct ipa_mem_data ipa_mem_data = {
> +	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
> +	.local		= ipa_mem_local_data,
> +	.imem_addr	= 0x146bd000,
> +	.imem_size	= 0x00002000,
> +	.smem_id	= 497,
> +	.smem_size	= 0x00002000,
> +};
> +
> +static struct ipa_clock_data ipa_clock_data = {
> +	.core_clock_rate	= 75 * 1000 * 1000,	/* Hz */
> +	/* Interconnect rates are in 1000 byte/second units */
> +	.interconnect = {
> +		[IPA_INTERCONNECT_MEMORY] = {
> +			.peak_rate	= 640000,	/* 640 MBps */
> +			.average_rate	= 80000,	/* 80 MBps */
> +		},
> +		/* Average rate is unused for the next two interconnects */
> +		[IPA_INTERCONNECT_IMEM] = {
> +			.peak_rate	= 640000,	/* 350 MBps */
> +			.average_rate	= 0,		/* unused */
> +		},
> +		[IPA_INTERCONNECT_CONFIG] = {
> +			.peak_rate	= 80000,	/* 40 MBps */
> +			.average_rate	= 0,		/* unused */
> +		},
> +	},
> +};
> +
> +/* Configuration data for the MSM8998 SoC. */
> +const struct ipa_data ipa_data_msm8998 = {
> +	.version	= IPA_VERSION_3_1,
> +	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
> +	.endpoint_data	= ipa_gsi_endpoint_data,
> +	.resource_data	= &ipa_resource_data,
> +	.mem_data	= &ipa_mem_data,
> +	.clock_data	= &ipa_clock_data,
> +};
> diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h
> index 0ed5ffe2b8da..da2141f6888f 100644
> --- a/drivers/net/ipa/ipa_data.h
> +++ b/drivers/net/ipa/ipa_data.h
> @@ -179,8 +179,11 @@ struct ipa_gsi_endpoint_data {
>  /** enum ipa_resource_type_src - source resource types */
>  enum ipa_resource_type_src {
>  	IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
> +	IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
> +	IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
>  	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
>  	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
> +	IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
>  	IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
>  	IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
>  };
> @@ -188,6 +191,7 @@ enum ipa_resource_type_src {
>  /** enum ipa_resource_type_dst - destination resource types */
>  enum ipa_resource_type_dst {
>  	IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
> +	IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
>  	IPA_RESOURCE_TYPE_DST_DPS_DMARS,
>  };
>  
> @@ -304,6 +308,7 @@ struct ipa_data {
>  	const struct ipa_clock_data *clock_data;
>  };
>  
> +extern const struct ipa_data ipa_data_msm8998;
>  extern const struct ipa_data ipa_data_sdm845;
>  extern const struct ipa_data ipa_data_sc7180;
>  
> diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
> index be191993fbec..33a7d483c5e0 100644
> --- a/drivers/net/ipa/ipa_main.c
> +++ b/drivers/net/ipa/ipa_main.c
> @@ -721,6 +721,10 @@ static int ipa_firmware_load(struct device *dev)
>  }
>  
>  static const struct of_device_id ipa_match[] = {
> +	{
> +		.compatible	= "qcom,msm8998-ipa",
> +		.data		= &ipa_data_msm8998,
> +	},
>  	{
>  		.compatible	= "qcom,sdm845-ipa",
>  		.data		= &ipa_data_sdm845,
> 

Re: [PATCH v1 5/7] net: ipa: Add support for IPA on MSM8998

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> MSM8998 features IPA v3.1 (GSI v1.0): add the required configuration
> data for it.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

This looks great, but since you first posted this code, we
name these data files based on the IPA version, and there
are some new things defined within them.

Two things I found that you got wrong was the assignment of
the endpoint resource group, and you were missing the assignment
of limits from some resource groups.  I think everything else
you provided looks correct, or it's pretty close.

I will define a real pseudo memory region to mark the end of
memory (rather than using UC_EVENT_RING).

I will be verifying all information you provided here, and
will update the file to be named "ipa_data-v3.1.c", and
will add or revise the information to match the current
way these files are defined.

I'll credit you and will include a link to your original
post.

					-Alex

> ---
>   drivers/net/ipa/Makefile           |   3 +-
>   drivers/net/ipa/ipa_data-msm8998.c | 407 +++++++++++++++++++++++++++++
>   drivers/net/ipa/ipa_data.h         |   5 +
>   drivers/net/ipa/ipa_main.c         |   4 +
>   4 files changed, 418 insertions(+), 1 deletion(-)
>   create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
> 
> diff --git a/drivers/net/ipa/Makefile b/drivers/net/ipa/Makefile
> index afe5df1e6eee..4a6f4053dce2 100644
> --- a/drivers/net/ipa/Makefile
> +++ b/drivers/net/ipa/Makefile
> @@ -9,4 +9,5 @@ ipa-y			:=	ipa_main.o ipa_clock.o ipa_reg.o ipa_mem.o \
>   				ipa_endpoint.o ipa_cmd.o ipa_modem.o \
>   				ipa_qmi.o ipa_qmi_msg.o
>   
> -ipa-y			+=	ipa_data-sdm845.o ipa_data-sc7180.o
> +ipa-y			+=	ipa_data-msm8998.o ipa_data-sdm845.o \
> +				ipa_data-sc7180.o
> diff --git a/drivers/net/ipa/ipa_data-msm8998.c b/drivers/net/ipa/ipa_data-msm8998.c
> new file mode 100644
> index 000000000000..90e724468e40
> --- /dev/null
> +++ b/drivers/net/ipa/ipa_data-msm8998.c
> @@ -0,0 +1,407 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
> + * Copyright (C) 2019-2020 Linaro Ltd.
> + * Coypright (C) 2021, AngeloGioacchino Del Regno
> + *                     <angelogioacchino.delregno@somainline.org>
> + */
> +
> +#include <linux/log2.h>
> +
> +#include "gsi.h"
> +#include "ipa_data.h"
> +#include "ipa_endpoint.h"
> +#include "ipa_mem.h"
> +
> +/* Endpoint configuration for the MSM8998 SoC. */
> +static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
> +	[IPA_ENDPOINT_AP_COMMAND_TX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 6,
> +		.endpoint_id	= 22,
> +		.toward_ipa	= true,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 18,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_DMA_ONLY,
> +			.config = {
> +				.resource_group	= 1,
> +				.dma_mode	= true,
> +				.dma_endpoint	= IPA_ENDPOINT_AP_LAN_RX,
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_LAN_RX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 7,
> +		.endpoint_id	= 15,
> +		.toward_ipa	= false,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 8,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_INVALID,
> +			.config = {
> +				.resource_group	= 1,
> +				.aggregation	= true,
> +				.status_enable	= true,
> +				.rx = {
> +					.pad_align	= ilog2(sizeof(u32)),
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_MODEM_TX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 5,
> +		.endpoint_id	= 3,
> +		.toward_ipa	= true,
> +		.channel = {
> +			.tre_count	= 512,
> +			.event_count	= 512,
> +			.tlv_count	= 16,
> +		},
> +		.endpoint = {
> +			.filter_support	= true,
> +			.seq_type	=
> +				IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,
> +			.config = {
> +				.resource_group	= 1,
> +				.checksum	= true,
> +				.qmap		= true,
> +				.status_enable	= true,
> +				.tx = {
> +					.status_endpoint =
> +						IPA_ENDPOINT_MODEM_AP_RX,
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_AP_MODEM_RX] = {
> +		.ee_id		= GSI_EE_AP,
> +		.channel_id	= 8,
> +		.endpoint_id	= 16,
> +		.toward_ipa	= false,
> +		.channel = {
> +			.tre_count	= 256,
> +			.event_count	= 256,
> +			.tlv_count	= 8,
> +		},
> +		.endpoint = {
> +			.seq_type	= IPA_SEQ_INVALID,
> +			.config = {
> +				.resource_group	= 1,
> +				.checksum	= true,
> +				.qmap		= true,
> +				.aggregation	= true,
> +				.rx = {
> +					.aggr_close_eof	= true,
> +				},
> +			},
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_COMMAND_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 1,
> +		.endpoint_id	= 6,
> +		.toward_ipa	= true,
> +	},
> +	[IPA_ENDPOINT_MODEM_LAN_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 4,
> +		.endpoint_id	= 9,
> +		.toward_ipa	= true,
> +		.endpoint = {
> +			.filter_support	= true,
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_LAN_RX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 6,
> +		.endpoint_id	= 19,
> +		.toward_ipa	= false,
> +	},
> +	[IPA_ENDPOINT_MODEM_AP_TX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 0,
> +		.endpoint_id	= 5,
> +		.toward_ipa	= true,
> +		.endpoint = {
> +			.filter_support	= true,
> +		},
> +	},
> +	[IPA_ENDPOINT_MODEM_AP_RX] = {
> +		.ee_id		= GSI_EE_MODEM,
> +		.channel_id	= 5,
> +		.endpoint_id	= 18,
> +		.toward_ipa	= false,
> +	},
> +};
> +
> +/* For the MSM8998, resource groups are allocated this way:
> + *              SRC     DST
> + *   group 0:	UL      UL
> + *   group 1:	DL      DL/DPL
> + */
> +static const struct ipa_resource_src ipa_resource_src[] = {
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
> +		.limits[0] = {
> +			.min = 3,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 3,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
> +		.limits[0] = {
> +			.min = 14,
> +			.max = 14,
> +		},
> +		.limits[1] = {
> +			.min = 16,
> +			.max = 16,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
> +		.limits[0] = {
> +			.min = 19,
> +			.max = 19,
> +		},
> +		.limits[1] = {
> +			.min = 26,
> +			.max = 26,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
> +		.limits[0] = {
> +			.min = 14,
> +			.max = 14,
> +		},
> +		.limits[1] = {
> +			.min = 16,
> +			.max = 16,
> +		},
> +	},
> +};
> +
> +static const struct ipa_resource_dst ipa_resource_dst[] = {
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
> +		.limits[0] = {
> +			.min = 2,
> +			.max = 2,
> +		},
> +		.limits[1] = {
> +			.min = 3,
> +			.max = 3,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
> +		.limits[0] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +		.limits[1] = {
> +			.min = 0,
> +			.max = 255,
> +		},
> +	},
> +	{
> +		.type = IPA_RESOURCE_TYPE_DST_DPS_DMARS,
> +		.limits[0] = {
> +			.min = 2,
> +			.max = 63,
> +		},
> +		.limits[1] = {
> +			.min = 1,
> +			.max = 63,
> +		},
> +	},
> +};
> +
> +/* Resource configuration for the MSM8998 SoC. */
> +static const struct ipa_resource_data ipa_resource_data = {
> +	.resource_src_count	= ARRAY_SIZE(ipa_resource_src),
> +	.resource_src		= ipa_resource_src,
> +	.resource_dst_count	= ARRAY_SIZE(ipa_resource_dst),
> +	.resource_dst		= ipa_resource_dst,
> +};
> +
> +/* IPA-resident memory region configuration for the MSM8998 SoC. */
> +static const struct ipa_mem ipa_mem_local_data[] = {
> +	[IPA_MEM_UC_SHARED] = {
> +		.offset		= 0x0000,
> +		.size		= 0x0080,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_UC_INFO] = {
> +		.offset		= 0x0080,
> +		.size		= 0x0200,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_V4_FILTER_HASHED] = {
> +		.offset		= 0x0288,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_FILTER] = {
> +		.offset		= 0x0308,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_FILTER_HASHED] = {
> +		.offset		= 0x0388,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_FILTER] = {
> +		.offset		= 0x0408,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_ROUTE_HASHED] = {
> +		.offset		= 0x0488,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V4_ROUTE] = {
> +		.offset		= 0x0508,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_ROUTE_HASHED] = {
> +		.offset		= 0x0588,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_V6_ROUTE] = {
> +		.offset		= 0x0608,
> +		.size		= 0x0078,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_MODEM_HEADER] = {
> +		.offset		= 0x0688,
> +		.size		= 0x0140,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_AP_HEADER] = {
> +		.offset		= 0x07c8,
> +		.size		= 0x0000,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_MODEM_PROC_CTX] = {
> +		.offset		= 0x07d0,
> +		.size		= 0x0200,
> +		.canary_count	= 2,
> +	},
> +	[IPA_MEM_AP_PROC_CTX] = {
> +		.offset		= 0x09d0,
> +		.size		= 0x0200,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_MODEM] = {
> +		.offset		= 0x0bd8,
> +		.size		= 0x1424,
> +		.canary_count	= 0,
> +	},
> +	[IPA_MEM_UC_EVENT_RING] = { /* end_ofst */
> +		.offset		= 0x2000,
> +		.size		= 0,
> +		.canary_count	= 1,
> +	},
> +};
> +
> +static struct ipa_mem_data ipa_mem_data = {
> +	.local_count	= ARRAY_SIZE(ipa_mem_local_data),
> +	.local		= ipa_mem_local_data,
> +	.imem_addr	= 0x146bd000,
> +	.imem_size	= 0x00002000,
> +	.smem_id	= 497,
> +	.smem_size	= 0x00002000,
> +};
> +
> +static struct ipa_clock_data ipa_clock_data = {
> +	.core_clock_rate	= 75 * 1000 * 1000,	/* Hz */
> +	/* Interconnect rates are in 1000 byte/second units */
> +	.interconnect = {
> +		[IPA_INTERCONNECT_MEMORY] = {
> +			.peak_rate	= 640000,	/* 640 MBps */
> +			.average_rate	= 80000,	/* 80 MBps */
> +		},
> +		/* Average rate is unused for the next two interconnects */
> +		[IPA_INTERCONNECT_IMEM] = {
> +			.peak_rate	= 640000,	/* 350 MBps */
> +			.average_rate	= 0,		/* unused */
> +		},
> +		[IPA_INTERCONNECT_CONFIG] = {
> +			.peak_rate	= 80000,	/* 40 MBps */
> +			.average_rate	= 0,		/* unused */
> +		},
> +	},
> +};
> +
> +/* Configuration data for the MSM8998 SoC. */
> +const struct ipa_data ipa_data_msm8998 = {
> +	.version	= IPA_VERSION_3_1,
> +	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
> +	.endpoint_data	= ipa_gsi_endpoint_data,
> +	.resource_data	= &ipa_resource_data,
> +	.mem_data	= &ipa_mem_data,
> +	.clock_data	= &ipa_clock_data,
> +};
> diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h
> index 0ed5ffe2b8da..da2141f6888f 100644
> --- a/drivers/net/ipa/ipa_data.h
> +++ b/drivers/net/ipa/ipa_data.h
> @@ -179,8 +179,11 @@ struct ipa_gsi_endpoint_data {
>   /** enum ipa_resource_type_src - source resource types */
>   enum ipa_resource_type_src {
>   	IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS,
> +	IPA_RESOURCE_TYPE_SRC_HDR_SECTORS,
> +	IPA_RESOURCE_TYPE_SRC_HDRI1_BUFFER,
>   	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS,
>   	IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF,
> +	IPA_RESOURCE_TYPE_SRC_HDRI2_BUFFERS,
>   	IPA_RESOURCE_TYPE_SRC_HPS_DMARS,
>   	IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES,
>   };
> @@ -188,6 +191,7 @@ enum ipa_resource_type_src {
>   /** enum ipa_resource_type_dst - destination resource types */
>   enum ipa_resource_type_dst {
>   	IPA_RESOURCE_TYPE_DST_DATA_SECTORS,
> +	IPA_RESOURCE_TYPE_DST_DATA_SECTOR_LISTS,
>   	IPA_RESOURCE_TYPE_DST_DPS_DMARS,
>   };
>   
> @@ -304,6 +308,7 @@ struct ipa_data {
>   	const struct ipa_clock_data *clock_data;
>   };
>   
> +extern const struct ipa_data ipa_data_msm8998;
>   extern const struct ipa_data ipa_data_sdm845;
>   extern const struct ipa_data ipa_data_sc7180;
>   
> diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c
> index be191993fbec..33a7d483c5e0 100644
> --- a/drivers/net/ipa/ipa_main.c
> +++ b/drivers/net/ipa/ipa_main.c
> @@ -721,6 +721,10 @@ static int ipa_firmware_load(struct device *dev)
>   }
>   
>   static const struct of_device_id ipa_match[] = {
> +	{
> +		.compatible	= "qcom,msm8998-ipa",
> +		.data		= &ipa_data_msm8998,
> +	},
>   	{
>   		.compatible	= "qcom,sdm845-ipa",
>   		.data		= &ipa_data_sdm845,
> 

[PATCH v1 6/7] dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible

[AngeloGioacchino Del Regno]

The driver supports SC7180, but the binding was not documented.
Just add it.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 Documentation/devicetree/bindings/net/qcom,ipa.yaml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
index 8a2d12644675..b063c6c1077a 100644
--- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
@@ -43,7 +43,11 @@ description:
 
 properties:
   compatible:
-    const: "qcom,sdm845-ipa"
+    oneOf:
+      - items:
+          - enum:
+              - "qcom,sdm845-ipa"
+              - "qcom,sc7180-ipa"
 
   reg:
     items:
-- 
2.30.0

Re: [PATCH v1 6/7] dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> The driver supports SC7180, but the binding was not documented.
> Just add it.

I hadn't noticed that!

I'm trying to get through reviewing your series
today and this will take another hour or so to
go validate to my satisfaction.

Would you be willing to submit just this patch
as a fix, and when you do I will give it a proper
review?

					-Alex

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  Documentation/devicetree/bindings/net/qcom,ipa.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index 8a2d12644675..b063c6c1077a 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -43,7 +43,11 @@ description:
>  
>  properties:
>    compatible:
> -    const: "qcom,sdm845-ipa"
> +    oneOf:
> +      - items:
> +          - enum:
> +              - "qcom,sdm845-ipa"
> +              - "qcom,sc7180-ipa"
>  
>    reg:
>      items:
> 

Re: [PATCH v1 6/7] dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible

[Rob Herring]

On Thu, Feb 11, 2021 at 06:50:14PM +0100, AngeloGioacchino Del Regno wrote:
> The driver supports SC7180, but the binding was not documented.
> Just add it.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  Documentation/devicetree/bindings/net/qcom,ipa.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index 8a2d12644675..b063c6c1077a 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -43,7 +43,11 @@ description:
>  
>  properties:
>    compatible:
> -    const: "qcom,sdm845-ipa"
> +    oneOf:
> +      - items:
> +          - enum:

Just enum, you don't need oneOf when only 1. And items is implied when 
only 1 entry.

> +              - "qcom,sdm845-ipa"
> +              - "qcom,sc7180-ipa"
>  
>    reg:
>      items:
> -- 
> 2.30.0
> 

Re: [PATCH v1 6/7] dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> The driver supports SC7180, but the binding was not documented.
> Just add it.

This has been fixed upstream now.
   c3264fee72e7 dt-bindings: net: qcom,ipa: add some compatible strings

					-Alex

> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>   Documentation/devicetree/bindings/net/qcom,ipa.yaml | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index 8a2d12644675..b063c6c1077a 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -43,7 +43,11 @@ description:
>   
>   properties:
>     compatible:
> -    const: "qcom,sdm845-ipa"
> +    oneOf:
> +      - items:
> +          - enum:
> +              - "qcom,sdm845-ipa"
> +              - "qcom,sc7180-ipa"
>   
>     reg:
>       items:
> 

[PATCH v1 7/7] dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible

[AngeloGioacchino Del Regno]

MSM8998 support has been added: document the new compatible.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
 Documentation/devicetree/bindings/net/qcom,ipa.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
index b063c6c1077a..9dacd224b606 100644
--- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
@@ -46,6 +46,7 @@ properties:
     oneOf:
       - items:
           - enum:
+              - "qcom,msm8998-ipa"
               - "qcom,sdm845-ipa"
               - "qcom,sc7180-ipa"
 
-- 
2.30.0

Re: [PATCH v1 7/7] dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> MSM8998 support has been added: document the new compatible.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

With the previous patch in place, this becomes almost
automatic.

But I don't want to claim support for a platform
until things actually *work*.  I don't just mean
we can compile and load (and load firmware), I
want to be able to say we can actually carry LTE
data over IPA before we advertise the compatible
string here.

Maybe I'm being picky, but that's my preference.
It adds some motivation for getting the user space
tools squared away.

Thank you again very much for your patches.

					-Alex
> ---
>  Documentation/devicetree/bindings/net/qcom,ipa.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index b063c6c1077a..9dacd224b606 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -46,6 +46,7 @@ properties:
>      oneOf:
>        - items:
>            - enum:
> +              - "qcom,msm8998-ipa"
>                - "qcom,sdm845-ipa"
>                - "qcom,sc7180-ipa"
>  
> 

Re: [PATCH v1 7/7] dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible

[Rob Herring]

On Thu, Feb 11, 2021 at 06:50:15PM +0100, AngeloGioacchino Del Regno wrote:
> MSM8998 support has been added: document the new compatible.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
> ---
>  Documentation/devicetree/bindings/net/qcom,ipa.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index b063c6c1077a..9dacd224b606 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -46,6 +46,7 @@ properties:
>      oneOf:
>        - items:
>            - enum:
> +              - "qcom,msm8998-ipa"

Also, don't need quotes on these.

>                - "qcom,sdm845-ipa"
>                - "qcom,sc7180-ipa"
>  
> -- 
> 2.30.0
> 

Re: [PATCH v1 7/7] dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> MSM8998 support has been added: document the new compatible.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

The upstream file affected here now has a slightly different
format.  I will implement this change, credit you for having
first proposed it, and will include a link to your original
message.

					-Alex

> ---
>   Documentation/devicetree/bindings/net/qcom,ipa.yaml | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> index b063c6c1077a..9dacd224b606 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml
> @@ -46,6 +46,7 @@ properties:
>       oneOf:
>         - items:
>             - enum:
> +              - "qcom,msm8998-ipa"
>                 - "qcom,sdm845-ipa"
>                 - "qcom,sc7180-ipa"
>   
> 

Re: [PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> Hey all!
> 
> This time around I thought that it would be nice to get some modem
> action going on. We have it, it's working (ish), so just.. why not.

Thank you for the patches!

I would like to review these carefully but I'm sorry
I won't be able to get to it today, and possibly not
for a few days.  But I *will* review them.

I just want you to know I'm paying attention, though
I'm sort of buried in an important issue right now.

I'm very impressed at how small the patches are though.

					-Alex

> This series adds support for IPA v3.1 (featuring GSI v1.0) and also
> takes account for some bits that are shared with other unimplemented
> IPA v3 variants and it is specifically targeting MSM8998, for which
> support is added.
> 
> Since the userspace isn't entirely ready (as far as I can see) for
> data connection (3g/lte/whatever) through the modem, it was possible
> to only partially test this series.
> Specifically, loading the IPA firmware and setting up the interface
> went just fine, along with a basic setup of the network interface
> that got exposed by this driver.
> 
> With this series, the benefits that I see are:
>   1. The modem doesn't crash anymore when trying to setup a data
>      connection, as now the modem firmware seems to be happy with
>      having IPA initialized and ready;
>   2. Other random modem crashes while picking up LTE home network
>      signal (even just for calling, nothing fancy) seem to be gone.
> 
> These are the reasons why I think that this series is ready for
> upstream action. It's *at least* stabilizing the platform when
> the modem is up.
> 
> This was tested on the F(x)Tec Pro 1 (MSM8998) smartphone.
> 
> AngeloGioacchino Del Regno (7):
>    net: ipa: Add support for IPA v3.1 with GSI v1.0
>    net: ipa: endpoint: Don't read unexistant register on IPAv3.1
>    net: ipa: gsi: Avoid some writes during irq setup for older IPA
>    net: ipa: gsi: Use right masks for GSI v1.0 channels hw param
>    net: ipa: Add support for IPA on MSM8998
>    dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible
>    dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible
> 
>   .../devicetree/bindings/net/qcom,ipa.yaml     |   7 +-
>   drivers/net/ipa/Makefile                      |   3 +-
>   drivers/net/ipa/gsi.c                         |  33 +-
>   drivers/net/ipa/gsi_reg.h                     |   5 +
>   drivers/net/ipa/ipa_data-msm8998.c            | 407 ++++++++++++++++++
>   drivers/net/ipa/ipa_data.h                    |   5 +
>   drivers/net/ipa/ipa_endpoint.c                |  26 +-
>   drivers/net/ipa/ipa_main.c                    |  12 +-
>   drivers/net/ipa/ipa_reg.h                     |   3 +
>   drivers/net/ipa/ipa_version.h                 |   1 +
>   10 files changed, 480 insertions(+), 22 deletions(-)
>   create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
> 

Re: [PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[AngeloGioacchino Del Regno]

Il 11/02/21 21:27, Alex Elder ha scritto:
> On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
>> Hey all!
>>
>> This time around I thought that it would be nice to get some modem
>> action going on. We have it, it's working (ish), so just.. why not.
> 
> Thank you for the patches!
> 
> I would like to review these carefully but I'm sorry
> I won't be able to get to it today, and possibly not
> for a few days.  But I *will* review them.
> 

Don't worry :))

> I just want you to know I'm paying attention, though
> I'm sort of buried in an important issue right now.
> 
> I'm very impressed at how small the patches are though.

Actually, the driver is in a great shape. That's why the patches are
that small: thanks to you!

-- Angelo

> 
>                      -Alex
> 
>> This series adds support for IPA v3.1 (featuring GSI v1.0) and also
>> takes account for some bits that are shared with other unimplemented
>> IPA v3 variants and it is specifically targeting MSM8998, for which
>> support is added.
>>
>> Since the userspace isn't entirely ready (as far as I can see) for
>> data connection (3g/lte/whatever) through the modem, it was possible
>> to only partially test this series.
>> Specifically, loading the IPA firmware and setting up the interface
>> went just fine, along with a basic setup of the network interface
>> that got exposed by this driver.
>>
>> With this series, the benefits that I see are:
>>   1. The modem doesn't crash anymore when trying to setup a data
>>      connection, as now the modem firmware seems to be happy with
>>      having IPA initialized and ready;
>>   2. Other random modem crashes while picking up LTE home network
>>      signal (even just for calling, nothing fancy) seem to be gone.
>>
>> These are the reasons why I think that this series is ready for
>> upstream action. It's *at least* stabilizing the platform when
>> the modem is up.
>>
>> This was tested on the F(x)Tec Pro 1 (MSM8998) smartphone.
>>
>> AngeloGioacchino Del Regno (7):
>>    net: ipa: Add support for IPA v3.1 with GSI v1.0
>>    net: ipa: endpoint: Don't read unexistant register on IPAv3.1
>>    net: ipa: gsi: Avoid some writes during irq setup for older IPA
>>    net: ipa: gsi: Use right masks for GSI v1.0 channels hw param
>>    net: ipa: Add support for IPA on MSM8998
>>    dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible
>>    dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible
>>
>>   .../devicetree/bindings/net/qcom,ipa.yaml     |   7 +-
>>   drivers/net/ipa/Makefile                      |   3 +-
>>   drivers/net/ipa/gsi.c                         |  33 +-
>>   drivers/net/ipa/gsi_reg.h                     |   5 +
>>   drivers/net/ipa/ipa_data-msm8998.c            | 407 ++++++++++++++++++
>>   drivers/net/ipa/ipa_data.h                    |   5 +
>>   drivers/net/ipa/ipa_endpoint.c                |  26 +-
>>   drivers/net/ipa/ipa_main.c                    |  12 +-
>>   drivers/net/ipa/ipa_reg.h                     |   3 +
>>   drivers/net/ipa/ipa_version.h                 |   1 +
>>   10 files changed, 480 insertions(+), 22 deletions(-)
>>   create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
>>
> 

Re: [PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> Hey all!
> 
> This time around I thought that it would be nice to get some modem
> action going on. We have it, it's working (ish), so just.. why not.
> 
> This series adds support for IPA v3.1 (featuring GSI v1.0) and also
> takes account for some bits that are shared with other unimplemented
> IPA v3 variants and it is specifically targeting MSM8998, for which
> support is added.

It was more like "next month" rather than "next week," but I
finally took some more time to look at this today.

Again I think it's surprising how little code you had
to implement to get something that seems is at least
modestly functional.

FYI I have undertaken an effort to make the upstream code
suitable for use for any IPA version (3.0-4.11) in the
past few months.  Most of what I've done is in line with
the things you found were necessary for IPA v3.1 support.
Early on I got most of the support for IPA v4.5 upstream,
and have been holding off trying to get other similar
changes out for review for other versions until I've had
more of a chance to test some of what's new in IPA v4.5.

In the coming weeks I will start posting more of this
work for review.  You'll see that I'm modifying many
things you do in your series (such as making version
checks not assume only v3.5.1 and v4.2 are supported).
My priority is on newer versions, but I want the code
to be (at least) correct for IPA v3.0, v3.1, and v3.5
as well.

What might be best is for you to consider using the
patches when I send them out.  I'll gladly give you some
credit when I do if you like (suggested-by, reviewed-by,
tested-by, whatever you feel is appropriate).  Please
let me know if you would like to be on the Cc list for
this sort of change.

> Since the userspace isn't entirely ready (as far as I can see) for
> data connection (3g/lte/whatever) through the modem, it was possible
> to only partially test this series.

Yes we're still figuring out how the upstream tools need
to interact with the kernel for configuration.

> Specifically, loading the IPA firmware and setting up the interface
> went just fine, along with a basic setup of the network interface
> that got exposed by this driver.

This is great to hear.

> With this series, the benefits that I see are:
>  1. The modem doesn't crash anymore when trying to setup a data
>     connection, as now the modem firmware seems to be happy with
>     having IPA initialized and ready;
>  2. Other random modem crashes while picking up LTE home network
>     signal (even just for calling, nothing fancy) seem to be gone.
> 
> These are the reasons why I think that this series is ready for
> upstream action. It's *at least* stabilizing the platform when
> the modem is up.
> 
> This was tested on the F(x)Tec Pro 1 (MSM8998) smartphone.

I unfortunately can't promise you you'll have the full
connection up and running, but we can probably get very
close.

It would be very helpful for you (someone other than me,
that is) to participate in validating the changes I am
now finalizing.  I hope you're willing.

I'll offer a few more specific comments on each of your
patches.

					-Alex


> AngeloGioacchino Del Regno (7):
>   net: ipa: Add support for IPA v3.1 with GSI v1.0
>   net: ipa: endpoint: Don't read unexistant register on IPAv3.1
>   net: ipa: gsi: Avoid some writes during irq setup for older IPA
>   net: ipa: gsi: Use right masks for GSI v1.0 channels hw param
>   net: ipa: Add support for IPA on MSM8998
>   dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible
>   dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible
> 
>  .../devicetree/bindings/net/qcom,ipa.yaml     |   7 +-
>  drivers/net/ipa/Makefile                      |   3 +-
>  drivers/net/ipa/gsi.c                         |  33 +-
>  drivers/net/ipa/gsi_reg.h                     |   5 +
>  drivers/net/ipa/ipa_data-msm8998.c            | 407 ++++++++++++++++++
>  drivers/net/ipa/ipa_data.h                    |   5 +
>  drivers/net/ipa/ipa_endpoint.c                |  26 +-
>  drivers/net/ipa/ipa_main.c                    |  12 +-
>  drivers/net/ipa/ipa_reg.h                     |   3 +
>  drivers/net/ipa/ipa_version.h                 |   1 +
>  10 files changed, 480 insertions(+), 22 deletions(-)
>  create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
> 

Re: [PATCH v1 0/7] Add support for IPA v3.1, GSI v1.0, MSM8998 IPA

[Alex Elder]

On 2/11/21 11:50 AM, AngeloGioacchino Del Regno wrote:
> Hey all!
> 
> This time around I thought that it would be nice to get some modem
> action going on. We have it, it's working (ish), so just.. why not.

When I reviewed this series in March, I said I wanted to
post a bunch of patches I had already been working on,
which enabled support for many versions of IPA, including
IPA v3.1.  That work is complete now, so I'm returning to
your series and seeing if there is anything you included
in your patches that I did not.

There are a few differences, which I will point out in a new
set of responses to your original patches.  I will be posting
some updates, and will explain what I intend to do in those
updates in the messages that follow.

					-Alex

> This series adds support for IPA v3.1 (featuring GSI v1.0) and also
> takes account for some bits that are shared with other unimplemented
> IPA v3 variants and it is specifically targeting MSM8998, for which
> support is added.
> 
> Since the userspace isn't entirely ready (as far as I can see) for
> data connection (3g/lte/whatever) through the modem, it was possible
> to only partially test this series.
> Specifically, loading the IPA firmware and setting up the interface
> went just fine, along with a basic setup of the network interface
> that got exposed by this driver.
> 
> With this series, the benefits that I see are:
>   1. The modem doesn't crash anymore when trying to setup a data
>      connection, as now the modem firmware seems to be happy with
>      having IPA initialized and ready;
>   2. Other random modem crashes while picking up LTE home network
>      signal (even just for calling, nothing fancy) seem to be gone.
> 
> These are the reasons why I think that this series is ready for
> upstream action. It's *at least* stabilizing the platform when
> the modem is up.
> 
> This was tested on the F(x)Tec Pro 1 (MSM8998) smartphone.
> 
> AngeloGioacchino Del Regno (7):
>    net: ipa: Add support for IPA v3.1 with GSI v1.0
>    net: ipa: endpoint: Don't read unexistant register on IPAv3.1
>    net: ipa: gsi: Avoid some writes during irq setup for older IPA
>    net: ipa: gsi: Use right masks for GSI v1.0 channels hw param
>    net: ipa: Add support for IPA on MSM8998
>    dt-bindings: net: qcom-ipa: Document qcom,sc7180-ipa compatible
>    dt-bindings: net: qcom-ipa: Document qcom,msm8998-ipa compatible
> 
>   .../devicetree/bindings/net/qcom,ipa.yaml     |   7 +-
>   drivers/net/ipa/Makefile                      |   3 +-
>   drivers/net/ipa/gsi.c                         |  33 +-
>   drivers/net/ipa/gsi_reg.h                     |   5 +
>   drivers/net/ipa/ipa_data-msm8998.c            | 407 ++++++++++++++++++
>   drivers/net/ipa/ipa_data.h                    |   5 +
>   drivers/net/ipa/ipa_endpoint.c                |  26 +-
>   drivers/net/ipa/ipa_main.c                    |  12 +-
>   drivers/net/ipa/ipa_reg.h                     |   3 +
>   drivers/net/ipa/ipa_version.h                 |   1 +
>   10 files changed, 480 insertions(+), 22 deletions(-)
>   create mode 100644 drivers/net/ipa/ipa_data-msm8998.c
>