From: Jordan Crouse <jcrouse@codeaurora.org>
To: linux-arm-msm@vger.kernel.org
Cc: Robin Murphy <robin.murphy@arm.com>,
iommu@lists.linux-foundation.org, Will Deacon <will@kernel.org>,
Joerg Roedel <joro@8bytes.org>, Krishna Reddy <vdumpa@nvidia.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v3 1/3] iommu/arm-smmu: Add support for driver IOMMU fault handlers
Date: Thu, 25 Feb 2021 10:51:33 -0700 [thread overview]
Message-ID: <20210225175135.91922-2-jcrouse@codeaurora.org> (raw)
In-Reply-To: <20210225175135.91922-1-jcrouse@codeaurora.org>
Call report_iommu_fault() to allow upper-level drivers to register their
own fault handlers.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index d8c6bfde6a61..0f3a9b5f3284 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -408,6 +408,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
struct arm_smmu_device *smmu = smmu_domain->smmu;
int idx = smmu_domain->cfg.cbndx;
+ int ret;
fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR);
if (!(fsr & ARM_SMMU_FSR_FAULT))
@@ -417,8 +418,12 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
iova = arm_smmu_cb_readq(smmu, idx, ARM_SMMU_CB_FAR);
cbfrsynra = arm_smmu_gr1_read(smmu, ARM_SMMU_GR1_CBFRSYNRA(idx));
- dev_err_ratelimited(smmu->dev,
- "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
+ ret = report_iommu_fault(domain, dev, iova,
+ fsynr & ARM_SMMU_FSYNR0_WNR ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ);
+
+ if (ret == -ENOSYS)
+ dev_err_ratelimited(smmu->dev,
+ "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
fsr, iova, fsynr, cbfrsynra, idx);
arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr);
--
2.25.1
next prev parent reply other threads:[~2021-02-25 17:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-25 17:51 [PATCH v3 0/3] iommu/arm-smmu: adreno-smmu page fault handling Jordan Crouse
2021-02-25 17:51 ` Jordan Crouse [this message]
2021-03-02 12:17 ` [PATCH v3 1/3] iommu/arm-smmu: Add support for driver IOMMU fault handlers Robin Murphy
2021-03-02 15:54 ` Jordan Crouse
2021-05-11 18:59 ` Rob Clark
2021-02-25 17:51 ` [PATCH v3 2/3] drm/msm: Add an adreno-smmu-priv callback to get pagefault info Jordan Crouse
2021-02-25 17:51 ` [PATCH v3 3/3] drm/msm: Improve the a6xx page fault handler Jordan Crouse
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