From: Robert Foss <robert.foss@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
robert.foss@linaro.org, todor.too@gmail.com, mchehab@kernel.org,
robh+dt@kernel.org, angelogioacchino.delregno@somainline.org,
linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
AngeloGioacchino Del Regno <kholk11@gmail.com>,
Sakari Ailus <sakari.ailus@iki.fi>,
Andrey Konovalov <andrey.konovalov@linaro.org>
Cc: Rob Herring <robh@kernel.org>, Tomasz Figa <tfiga@chromium.org>,
Azam Sadiq Pasha Kapatrala Syed <akapatra@quicinc.com>,
Sarvesh Sridutt <Sarvesh.Sridutt@smartwirelesscompute.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Jonathan Marek <jonathan@marek.ca>
Subject: [PATCH v6 20/22] arm64: dts: sdm845: Add CAMSS ISP node
Date: Thu, 4 Mar 2021 13:03:26 +0100 [thread overview]
Message-ID: <20210304120326.153966-21-robert.foss@linaro.org> (raw)
In-Reply-To: <20210304120326.153966-1-robert.foss@linaro.org>
Add the camss dt node for sdm845.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@linaro.org>
---
Changes since v1
- Laurent: Fix subject
- Laurent: Remove redundant regulator labels
- Laurent: Remove empty line
Changes since v3
- Fixed ordering of IRQs
- Add newlines for better readability
Changes since v5:
- Andrey: Add r-b
arch/arm64/boot/dts/qcom/sdm845.dtsi | 135 +++++++++++++++++++++++++++
1 file changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index bcf888381f14..4fe93c69908a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -3911,6 +3911,141 @@ videocc: clock-controller@ab00000 {
#reset-cells = <1>;
};
+ camss: camss@a00000 {
+ compatible = "qcom,sdm845-camss";
+
+ reg = <0 0xacb3000 0 0x1000>,
+ <0 0xacba000 0 0x1000>,
+ <0 0xacc8000 0 0x1000>,
+ <0 0xac65000 0 0x1000>,
+ <0 0xac66000 0 0x1000>,
+ <0 0xac67000 0 0x1000>,
+ <0 0xac68000 0 0x1000>,
+ <0 0xacaf000 0 0x4000>,
+ <0 0xacb6000 0 0x4000>,
+ <0 0xacc4000 0 0x4000>;
+ reg-names = "csid0",
+ "csid1",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "vfe0",
+ "vfe1",
+ "vfe_lite";
+
+ interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid2",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "vfe0",
+ "vfe1",
+ "vfe_lite";
+
+ power-domains = <&clock_camcc IFE_0_GDSC>,
+ <&clock_camcc IFE_1_GDSC>,
+ <&clock_camcc TITAN_TOP_GDSC>;
+
+ clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
+ <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
+ <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSIPHY0_CLK>,
+ <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSIPHY1_CLK>,
+ <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSIPHY2_CLK>,
+ <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSIPHY3_CLK>,
+ <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
+ <&gcc GCC_CAMERA_AHB_CLK>,
+ <&gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
+ <&clock_camcc CAM_CC_IFE_1_CLK>,
+ <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
+ <&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_LITE_CLK>,
+ <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
+ clock-names = "camnoc_axi",
+ "cpas_ahb",
+ "cphy_rx_src",
+ "csi0",
+ "csi0_src",
+ "csi1",
+ "csi1_src",
+ "csi2",
+ "csi2_src",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy0_timer_src",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy1_timer_src",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy2_timer_src",
+ "csiphy3",
+ "csiphy3_timer",
+ "csiphy3_timer_src",
+ "gcc_camera_ahb",
+ "gcc_camera_axi",
+ "slow_ahb_src",
+ "soc_ahb",
+ "vfe0_axi",
+ "vfe0",
+ "vfe0_cphy_rx",
+ "vfe0_src",
+ "vfe1_axi",
+ "vfe1",
+ "vfe1_cphy_rx",
+ "vfe1_src",
+ "vfe_lite",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_src";
+
+ iommus = <&apps_smmu 0x0808 0x0>,
+ <&apps_smmu 0x0810 0x8>,
+ <&apps_smmu 0x0c08 0x0>,
+ <&apps_smmu 0x0c10 0x8>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
cci: cci@ac4a000 {
compatible = "qcom,sdm845-cci";
#address-cells = <1>;
--
2.27.0
next prev parent reply other threads:[~2021-03-04 12:08 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-04 12:03 [PATCH v6 00/22] Add support for the SDM845 Camera Subsystem Robert Foss
2021-03-04 12:03 ` [PATCH v6 01/22] media: camss: Fix vfe_isr_comp_done() documentation Robert Foss
2021-03-04 12:03 ` [PATCH v6 02/22] media: camss: Fix vfe_isr comment typo Robert Foss
2021-03-04 12:03 ` [PATCH v6 03/22] media: camss: Replace trace_printk() with dev_dbg() Robert Foss
2021-03-04 12:03 ` [PATCH v6 04/22] media: camss: Add CAMSS_845 camss version Robert Foss
2021-03-04 12:03 ` [PATCH v6 05/22] media: camss: Make ISPIF subdevice optional Robert Foss
2021-03-04 12:03 ` [PATCH v6 07/22] media: camss: Add support for VFE hardware version Titan 170 Robert Foss
2021-03-09 13:55 ` Andrey Konovalov
2021-03-04 12:03 ` [PATCH v6 08/22] media: camss: Add missing format identifiers Robert Foss
2021-03-09 13:56 ` Andrey Konovalov
2021-03-04 12:03 ` [PATCH v6 09/22] media: camss: Refactor CSID HW version support Robert Foss
2021-03-04 12:03 ` [PATCH v6 10/22] media: camss: Add support for CSID hardware version Titan 170 Robert Foss
2021-03-09 13:54 ` Andrey Konovalov
2021-03-10 10:12 ` Robert Foss
2021-03-04 12:03 ` [PATCH v6 11/22] media: camss: Add support for CSIPHY " Robert Foss
2021-03-09 13:57 ` Andrey Konovalov
2021-03-04 12:03 ` [PATCH v6 12/22] media: camss: Remove per VFE power domain toggling Robert Foss
2021-03-11 14:43 ` Andrey Konovalov
2021-03-11 14:46 ` Robert Foss
2021-03-04 12:03 ` [PATCH v6 13/22] media: camss: Enable SDM845 Robert Foss
2021-03-04 12:03 ` [PATCH v6 14/22] dt-bindings: media: camss: Add qcom,msm8916-camss binding Robert Foss
2021-03-04 12:03 ` [PATCH v6 15/22] dt-bindings: media: camss: Add qcom,msm8996-camss binding Robert Foss
2021-03-04 12:03 ` [PATCH v6 16/22] dt-bindings: media: camss: Add qcom,sdm660-camss binding Robert Foss
2021-03-04 12:03 ` [PATCH v6 17/22] dt-bindings: media: camss: Add qcom,sdm845-camss binding Robert Foss
2021-03-04 12:03 ` [PATCH v6 18/22] MAINTAINERS: Change CAMSS documentation to use dtschema bindings Robert Foss
2021-03-04 12:03 ` [PATCH v6 19/22] media: dt-bindings: media: Remove qcom,camss documentation Robert Foss
2021-03-04 12:03 ` Robert Foss [this message]
2021-03-04 12:03 ` [PATCH v6 21/22] arm64: dts: sdm845-db845c: Configure regulators for camss node Robert Foss
2021-03-04 12:03 ` [PATCH v6 22/22] arm64: dts: sdm845-db845c: Enable ov8856 sensor and connect to ISP Robert Foss
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210304120326.153966-21-robert.foss@linaro.org \
--to=robert.foss@linaro.org \
--cc=Sarvesh.Sridutt@smartwirelesscompute.com \
--cc=agross@kernel.org \
--cc=akapatra@quicinc.com \
--cc=andrey.konovalov@linaro.org \
--cc=angelogioacchino.delregno@somainline.org \
--cc=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=jonathan@marek.ca \
--cc=kholk11@gmail.com \
--cc=laurent.pinchart@ideasonboard.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=mchehab@kernel.org \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
--cc=sakari.ailus@iki.fi \
--cc=tfiga@chromium.org \
--cc=todor.too@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).