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From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-msm@vger.kernel.org
Cc: bhupesh.sharma@linaro.org, Vinod Koul <vkoul@kernel.org>,
	Thara Gopinath <thara.gopinath@linaro.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	bhupesh.linux@gmail.com
Subject: [PATCH 6/8] clk: qcom: Add gcc clocks for crypto block on sm8250
Date: Wed, 10 Mar 2021 10:55:01 +0530	[thread overview]
Message-ID: <20210310052503.3618486-7-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20210310052503.3618486-1-bhupesh.sharma@linaro.org>

This patch adds the global clock controller (gcc) clocks required
by the sm8250 crypto block to function, namely: GCC_CE1_AHB_CLK,
GCC_CE1_AXI_CLK and GCC_CE1_CLK.

Cc: Vinod Koul <vkoul@kernel.org>
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 drivers/clk/qcom/gcc-sm8250.c | 44 +++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c
index ab594a0f0c40..0df5ac346c93 100644
--- a/drivers/clk/qcom/gcc-sm8250.c
+++ b/drivers/clk/qcom/gcc-sm8250.c
@@ -1198,6 +1198,47 @@ static struct clk_branch gcc_camera_xo_clk = {
 	},
 };
 
+static struct clk_branch gcc_ce1_ahb_clk = {
+	.halt_reg = 0x4100c,
+	.halt_check = BRANCH_HALT_VOTED,
+	.hwcg_reg = 0x4100c,
+	.hwcg_bit = 1,
+	.clkr = {
+		.enable_reg = 0x52004,
+		.enable_mask = BIT(3),
+		.hw.init = &(struct clk_init_data){
+			.name = "gcc_ce1_ahb_clk",
+			.ops = &clk_branch2_ops,
+		},
+	},
+};
+
+static struct clk_branch gcc_ce1_axi_clk = {
+	.halt_reg = 0x41008,
+	.halt_check = BRANCH_HALT_VOTED,
+	.clkr = {
+		.enable_reg = 0x52004,
+		.enable_mask = BIT(4),
+		.hw.init = &(struct clk_init_data){
+			.name = "gcc_ce1_axi_clk",
+			.ops = &clk_branch2_ops,
+		},
+	},
+};
+
+static struct clk_branch gcc_ce1_clk = {
+	.halt_reg = 0x41004,
+	.halt_check = BRANCH_HALT_VOTED,
+	.clkr = {
+		.enable_reg = 0x52004,
+		.enable_mask = BIT(5),
+		.hw.init = &(struct clk_init_data){
+			.name = "gcc_ce1_clk",
+			.ops = &clk_branch2_ops,
+		},
+	},
+};
+
 static struct clk_branch gcc_cfg_noc_usb3_prim_axi_clk = {
 	.halt_reg = 0xf07c,
 	.halt_check = BRANCH_HALT_VOTED,
@@ -3325,6 +3366,9 @@ static struct clk_regmap *gcc_sm8250_clocks[] = {
 	[GCC_CAMERA_HF_AXI_CLK] = &gcc_camera_hf_axi_clk.clkr,
 	[GCC_CAMERA_SF_AXI_CLK] = &gcc_camera_sf_axi_clk.clkr,
 	[GCC_CAMERA_XO_CLK] = &gcc_camera_xo_clk.clkr,
+	[GCC_CE1_AHB_CLK] = &gcc_ce1_ahb_clk.clkr,
+	[GCC_CE1_AXI_CLK] = &gcc_ce1_axi_clk.clkr,
+	[GCC_CE1_CLK] = &gcc_ce1_clk.clkr,
 	[GCC_CFG_NOC_USB3_PRIM_AXI_CLK] = &gcc_cfg_noc_usb3_prim_axi_clk.clkr,
 	[GCC_CFG_NOC_USB3_SEC_AXI_CLK] = &gcc_cfg_noc_usb3_sec_axi_clk.clkr,
 	[GCC_CPUSS_AHB_CLK] = &gcc_cpuss_ahb_clk.clkr,
-- 
2.29.2


  parent reply	other threads:[~2021-03-10  5:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-10  5:24 [PATCH 0/8] Enable Qualcomm Crypto Engine on sm8250 Bhupesh Sharma
2021-03-10  5:24 ` [PATCH 1/8] dt-bindings: qcom-qce: Add 'iommus' to required properties Bhupesh Sharma
2021-03-10  5:24 ` [PATCH 2/8] dt-bindings: crypto : Add new compatible strings for qcom-qce Bhupesh Sharma
2021-03-16 22:28   ` Rob Herring
2021-03-17 13:20     ` Bhupesh Sharma
2021-03-17 14:25       ` Thara Gopinath
2021-03-10  5:24 ` [PATCH 3/8] arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly Bhupesh Sharma
2021-03-10  5:24 ` [PATCH 4/8] dt-bindings/clock: qcom: sm8250: Add gcc clocks for sm8250 crypto block Bhupesh Sharma
     [not found]   ` <161567012068.1478170.1203237376997442299@swboyd.mtv.corp.google.com>
2021-03-15  7:01     ` Bhupesh Sharma
2021-03-10  5:25 ` [PATCH 5/8] clk: qcom: clk-rpmh: Add CE clock on sm8250 Bhupesh Sharma
2021-03-10  5:25 ` Bhupesh Sharma [this message]
2021-03-10  5:25 ` [PATCH 7/8] drivers: crypto: qce: Enable support for crypto engine " Bhupesh Sharma
2021-03-10  5:25 ` [PATCH 8/8] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine Bhupesh Sharma

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