From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Jonathan Marek <jonathan@marek.ca>
Cc: Stephen Boyd <sboyd@kernel.org>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Subject: [PATCH 11/21] drm/msm/dpu: call hw_lm ops directly
Date: Wed, 24 Mar 2021 18:00:14 +0300 [thread overview]
Message-ID: <20210324150024.2768215-12-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20210324150024.2768215-1-dmitry.baryshkov@linaro.org>
Replace dpu_hw_lm callbacks with direct functions calls.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 6 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 19 ++------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 59 ++++++++++-------------
3 files changed, 33 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 56eb22554197..5a0a6741a431 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -84,7 +84,7 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
DPU_BLEND_BG_INV_ALPHA;
}
- lm->ops.setup_blend_config(lm, pstate->stage,
+ dpu_hw_lm_setup_blend_config(lm, pstate->stage,
0xFF, 0, blend_op);
DPU_DEBUG("format:%s, alpha_en:%u blend_op:0x%x\n",
@@ -112,7 +112,7 @@ static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
cfg.out_height = drm_rect_height(lm_roi);
cfg.right_mixer = lm_horiz_position++;
cfg.flags = 0;
- hw_lm->ops.setup_mixer_out(hw_lm, &cfg);
+ dpu_hw_lm_setup_mixer_out(hw_lm, &cfg);
}
}
@@ -217,7 +217,7 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)
ctl = mixer[i].lm_ctl;
lm = mixer[i].hw_lm;
- lm->ops.setup_alpha_out(lm, mixer[i].mixer_op_mode);
+ dpu_hw_lm_setup_alpha_out(lm, mixer[i].mixer_op_mode);
mixer[i].flush_mask |= ctl->ops.get_bitmask_mixer(ctl,
mixer[i].hw_lm->idx);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index 7d5b620f7f42..1e95d52180cd 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -59,7 +59,7 @@ static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage)
return -EINVAL;
}
-static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx,
+void dpu_hw_lm_setup_mixer_out(struct dpu_hw_mixer *ctx,
struct dpu_hw_mixer_cfg *mixer)
{
struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -79,7 +79,7 @@ static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx,
DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
}
-static void dpu_hw_lm_setup_border_color(struct dpu_hw_mixer *ctx,
+void dpu_hw_lm_setup_border_color(struct dpu_hw_mixer *ctx,
struct dpu_mdss_color *color,
u8 border_en)
{
@@ -95,7 +95,7 @@ static void dpu_hw_lm_setup_border_color(struct dpu_hw_mixer *ctx,
}
}
-static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,
+void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx,
u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
{
struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -114,7 +114,7 @@ static void dpu_hw_lm_setup_blend_config_sdm845(struct dpu_hw_mixer *ctx,
DPU_REG_WRITE(c, LM_BLEND0_OP + stage_off, blend_op);
}
-static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx,
+void dpu_hw_lm_setup_alpha_out(struct dpu_hw_mixer *ctx,
uint32_t mixer_op_mode)
{
struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -128,16 +128,6 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx,
DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
}
-static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
- struct dpu_hw_lm_ops *ops,
- unsigned long features)
-{
- ops->setup_mixer_out = dpu_hw_lm_setup_out;
- ops->setup_blend_config = dpu_hw_lm_setup_blend_config_sdm845;
- ops->setup_alpha_out = dpu_hw_lm_setup_color3;
- ops->setup_border_color = dpu_hw_lm_setup_border_color;
-}
-
struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
void __iomem *addr,
const struct dpu_mdss_cfg *m,
@@ -159,7 +149,6 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
/* Assign ops */
c->idx = idx;
c->cap = cfg;
- _setup_mixer_ops(m, &c->ops, c->cap->features);
if (cfg->dspp && cfg->dspp < DSPP_MAX)
c->dspp = dpu_hw_dspp_init(cfg->dspp, addr, m);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
index 182740f2914b..a43c1931c5e4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
@@ -22,38 +22,34 @@ struct dpu_hw_color3_cfg {
u8 keep_fg[DPU_STAGE_MAX];
};
-/**
- *
- * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions
+/*
* Assumption is these functions will be called after clocks are enabled
*/
-struct dpu_hw_lm_ops {
- /*
- * Sets up mixer output width and height
- * and border color if enabled
- */
- void (*setup_mixer_out)(struct dpu_hw_mixer *ctx,
- struct dpu_hw_mixer_cfg *cfg);
-
- /*
- * Alpha blending configuration
- * for the specified stage
- */
- void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage,
- uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
-
- /*
- * Alpha color component selection from either fg or bg
- */
- void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op);
-
- /**
- * setup_border_color : enable/disable border color
- */
- void (*setup_border_color)(struct dpu_hw_mixer *ctx,
- struct dpu_mdss_color *color,
- u8 border_en);
-};
+/*
+ * Sets up mixer output width and height
+ * and border color if enabled
+ */
+void dpu_hw_lm_setup_mixer_out(struct dpu_hw_mixer *ctx,
+ struct dpu_hw_mixer_cfg *cfg);
+
+/*
+ * Alpha blending configuration
+ * for the specified stage
+ */
+void dpu_hw_lm_setup_blend_config(struct dpu_hw_mixer *ctx, uint32_t stage,
+ uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
+
+/*
+ * Alpha color component selection from either fg or bg
+ */
+void dpu_hw_lm_setup_alpha_out(struct dpu_hw_mixer *ctx, uint32_t mixer_op);
+
+/**
+ * setup_border_color : enable/disable border color
+ */
+void dpu_hw_lm_setup_border_color(struct dpu_hw_mixer *ctx,
+ struct dpu_mdss_color *color,
+ u8 border_en);
struct dpu_hw_mixer {
struct dpu_hw_blk base;
@@ -67,9 +63,6 @@ struct dpu_hw_mixer {
struct dpu_hw_pingpong *pingpong;
struct dpu_hw_dspp *dspp;
- /* ops */
- struct dpu_hw_lm_ops ops;
-
/* store mixer info specific to display */
struct dpu_hw_mixer_cfg cfg;
};
--
2.30.2
next prev parent reply other threads:[~2021-03-24 15:01 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 15:00 [PATCH 00/21] drm/msm/dpu: cleanup callbacks, resource manager Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 01/21] drm/msm/dpu: enable DPU_SSPP_QOS_8LVL for SM8250 Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 02/21] drm/msm/dpu: remove unused dpu_hw_blk features Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 03/21] drm/msm/dpu: drop dpu_hw_blk_destroy function Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 04/21] drm/msm/dpu: get DSPP blocks directly rather than through RM Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 05/21] drm/msm/dpu: get MERGE_3D " Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 06/21] drm/msm/dpu: get PINGPONG " Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 07/21] drm/msm/dpu: drop unused lm_max_width from RM Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 08/21] drm/msm/dpu: simplify peer LM handling Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 09/21] drm/msm/dpu: drop dpu_encoder_phys's get_hw_resources() callback Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 10/21] drm/msm/dpu: drop dpu_hw_lm_setup_blend_config() Dmitry Baryshkov
2021-03-24 15:00 ` Dmitry Baryshkov [this message]
2021-03-24 15:00 ` [PATCH 12/21] drm/msm/dpu: call hw_dspp ops directly Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 13/21] drm/msm/dpu: hw_pp: make setup_dither mandatory Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 14/21] drm/msm/dpu: call hw_pingpong ops directly Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 15/21] drm/msm/dpu: call hw_merge_3d " Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 16/21] drm/msm/dpu: call hw_intf " Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 17/21] drm/msm/dpu: call hw_top " Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 18/21] drm/msm/dpu: hw_vbif: make set_qos_remap mandatory Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 19/21] drm/msm/dpu: call hw_vbif ops directly Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 20/21] drm/msm/dpu: fix smart dma support Dmitry Baryshkov
2021-03-24 15:00 ` [PATCH 21/21] drm/msm/dpu: call hw_intr ops directly Dmitry Baryshkov
2021-03-24 17:56 ` kernel test robot
2021-03-24 20:21 ` kernel test robot
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