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From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-msm@vger.kernel.org
Cc: bhupesh.sharma@linaro.org,
	Thara Gopinath <thara.gopinath@linaro.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Vinod Koul <vkoul@kernel.org>,
	dmaengine@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com
Subject: [PATCH v2 09/17] crypto: qce: core: Add support to initialize interconnect path
Date: Thu,  6 May 2021 03:07:23 +0530	[thread overview]
Message-ID: <20210505213731.538612-10-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20210505213731.538612-1-bhupesh.sharma@linaro.org>

From: Thara Gopinath <thara.gopinath@linaro.org>

Crypto engine on certain Snapdragon processors like sm8150, sm8250, sm8350
etc. requires interconnect path between the engine and memory to be
explicitly enabled and bandwidth set prior to any operations. Add support
in the qce core to enable the interconnect path appropriately.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: David S. Miller <davem@davemloft.net>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: dmaengine@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: bhupesh.linux@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
[Make header file inclusion alphabetical]
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
---
 drivers/crypto/qce/core.c | 35 ++++++++++++++++++++++++++++-------
 drivers/crypto/qce/core.h |  1 +
 2 files changed, 29 insertions(+), 7 deletions(-)

diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
index 80b75085c265..92a0ff1d357e 100644
--- a/drivers/crypto/qce/core.c
+++ b/drivers/crypto/qce/core.c
@@ -5,6 +5,7 @@
 
 #include <linux/clk.h>
 #include <linux/dma-mapping.h>
+#include <linux/interconnect.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
@@ -21,6 +22,8 @@
 #define QCE_MAJOR_VERSION5	0x05
 #define QCE_QUEUE_LENGTH	1
 
+#define QCE_DEFAULT_MEM_BANDWIDTH	393600
+
 static const struct qce_algo_ops *qce_ops[] = {
 #ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER
 	&skcipher_ops,
@@ -202,21 +205,35 @@ static int qce_crypto_probe(struct platform_device *pdev)
 	if (ret < 0)
 		return ret;
 
+	qce->mem_path = of_icc_get(qce->dev, "memory");
+	if (IS_ERR(qce->mem_path))
+		return PTR_ERR(qce->mem_path);
+
 	qce->core = devm_clk_get(qce->dev, "core");
-	if (IS_ERR(qce->core))
-		return PTR_ERR(qce->core);
+	if (IS_ERR(qce->core)) {
+		ret = PTR_ERR(qce->core);
+		goto err_mem_path_put;
+	}
 
 	qce->iface = devm_clk_get(qce->dev, "iface");
-	if (IS_ERR(qce->iface))
-		return PTR_ERR(qce->iface);
+	if (IS_ERR(qce->iface)) {
+		ret = PTR_ERR(qce->iface);
+		goto err_mem_path_put;
+	}
 
 	qce->bus = devm_clk_get(qce->dev, "bus");
-	if (IS_ERR(qce->bus))
-		return PTR_ERR(qce->bus);
+	if (IS_ERR(qce->bus)) {
+		ret = PTR_ERR(qce->bus);
+		goto err_mem_path_put;
+	}
+
+	ret = icc_set_bw(qce->mem_path, QCE_DEFAULT_MEM_BANDWIDTH, QCE_DEFAULT_MEM_BANDWIDTH);
+	if (ret)
+		goto err_mem_path_put;
 
 	ret = clk_prepare_enable(qce->core);
 	if (ret)
-		return ret;
+		goto err_mem_path_disable;
 
 	ret = clk_prepare_enable(qce->iface);
 	if (ret)
@@ -256,6 +273,10 @@ static int qce_crypto_probe(struct platform_device *pdev)
 	clk_disable_unprepare(qce->iface);
 err_clks_core:
 	clk_disable_unprepare(qce->core);
+err_mem_path_disable:
+	icc_set_bw(qce->mem_path, 0, 0);
+err_mem_path_put:
+	icc_put(qce->mem_path);
 	return ret;
 }
 
diff --git a/drivers/crypto/qce/core.h b/drivers/crypto/qce/core.h
index 085774cdf641..228fcd69ec51 100644
--- a/drivers/crypto/qce/core.h
+++ b/drivers/crypto/qce/core.h
@@ -35,6 +35,7 @@ struct qce_device {
 	void __iomem *base;
 	struct device *dev;
 	struct clk *core, *iface, *bus;
+	struct icc_path *mem_path;
 	struct qce_dma_data dma;
 	int burst_size;
 	unsigned int pipe_pair_id;
-- 
2.30.2


  parent reply	other threads:[~2021-05-05 21:39 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-05 21:37 [PATCH v2 00/17] Enable Qualcomm Crypto Engine on sm8250 Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 01/17] dt-bindings: qcom-bam: Add 'interconnects' & 'interconnect-names' to optional properties Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 02/17] dt-bindings: qcom-bam: Add 'iommus' to required properties Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 03/17] dt-bindings: qcom-qce: " Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 04/17] dt-bindings: qcom-qce: Add 'interconnects' and move 'clocks' to optional properties Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 05/17] arm64/dts: qcom: sdm845: Use RPMH_CE_CLK macro directly Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 06/17] dt-bindings: crypto : Add new compatible strings for qcom-qce Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 07/17] arm64/dts: qcom: Use new compatibles for crypto nodes Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 08/17] dma: qcom: bam_dma: Add support to initialize interconnect path Bhupesh Sharma
2021-05-05 21:37 ` Bhupesh Sharma [this message]
2021-05-18 15:07   ` [PATCH v2 09/17] crypto: qce: core: " Bjorn Andersson
2021-05-18 15:38     ` Thara Gopinath
2021-05-18 15:39     ` Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 10/17] crypto: qce: Add new compatibles for qce crypto driver Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 11/17] crypto: qce: core: Make clocks optional Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 12/17] crypto: qce: Print a failure msg in case probe() fails Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 13/17] crypto: qce: Convert the device found dev_dbg() to dev_info() Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 14/17] dma: qcom: bam_dma: Create a new header file for BAM DMA driver Bhupesh Sharma
2021-05-09 13:58   ` Vinod Koul
2021-05-09 19:20     ` Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 15/17] crypto: qce: Defer probing if BAM dma is not yet initialized Bhupesh Sharma
2021-05-06  4:52   ` kernel test robot
2021-05-07 21:16     ` Bhupesh Sharma
2021-05-10 13:22   ` Thara Gopinath
2021-05-18 14:44     ` Bhupesh Sharma
2021-05-05 21:37 ` [PATCH v2 16/17] crypto: qce: Defer probe in case interconnect " Bhupesh Sharma
2021-05-10 13:23   ` Thara Gopinath
2021-05-18 14:39     ` Bhupesh Sharma
2021-05-10 13:58   ` Rafael Reinoldes
2021-05-05 21:37 ` [PATCH v2 17/17] arm64/dts: qcom: sm8250: Add dt entries to support crypto engine Bhupesh Sharma
2021-05-05 22:09 ` [PATCH v2 00/17] Enable Qualcomm Crypto Engine on sm8250 Eric Biggers
2021-05-07 21:12   ` Bhupesh Sharma
2021-05-07 21:14 ` Rob Herring
2021-05-08 18:56   ` Bhupesh Sharma

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