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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <abhinavk@codeaurora.org>
Cc: Jonathan Marek <jonathan@marek.ca>,
	Stephen Boyd <sboyd@kernel.org>, David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: [PATCH 7/8] drm/msm/dsi: drop msm_dsi_phy_get_shared_timings
Date: Sat, 15 May 2021 16:12:16 +0300	[thread overview]
Message-ID: <20210515131217.1540412-8-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20210515131217.1540412-1-dmitry.baryshkov@linaro.org>

Instead of fetching shared timing through an extra function call, get
them directly from msm_dsi_phy_enable. This would allow removing phy
timings from the struct msm_dsi_phy in the next patch.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/dsi/dsi.h         |  5 ++---
 drivers/gpu/drm/msm/dsi/dsi_manager.c |  3 +--
 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 13 +++++--------
 3 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 2041980548f0..84f9900ff878 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -163,10 +163,9 @@ struct msm_dsi_phy_clk_request {
 void msm_dsi_phy_driver_register(void);
 void msm_dsi_phy_driver_unregister(void);
 int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
-			struct msm_dsi_phy_clk_request *clk_req);
+			struct msm_dsi_phy_clk_request *clk_req,
+			struct msm_dsi_phy_shared_timings *shared_timings);
 void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
-void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
-			struct msm_dsi_phy_shared_timings *shared_timing);
 void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
 			     enum msm_dsi_phy_usecase uc);
 void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index 12efc8c69046..88d56a2bc8ab 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -118,8 +118,7 @@ static int enable_phy(struct msm_dsi *msm_dsi,
 
 	msm_dsi_host_get_phy_clk_req(msm_dsi->host, &clk_req, is_dual_dsi);
 
-	ret = msm_dsi_phy_enable(msm_dsi->phy, &clk_req);
-	msm_dsi_phy_get_shared_timings(msm_dsi->phy, shared_timings);
+	ret = msm_dsi_phy_enable(msm_dsi->phy, &clk_req, shared_timings);
 
 	return ret;
 }
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index feaeb34b7071..53a02c02dd6e 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -752,7 +752,8 @@ void __exit msm_dsi_phy_driver_unregister(void)
 }
 
 int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
-			struct msm_dsi_phy_clk_request *clk_req)
+			struct msm_dsi_phy_clk_request *clk_req,
+			struct msm_dsi_phy_shared_timings *shared_timings)
 {
 	struct device *dev = &phy->pdev->dev;
 	int ret;
@@ -780,6 +781,9 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
 		goto phy_en_fail;
 	}
 
+	memcpy(shared_timings, &phy->timing.shared_timings,
+	       sizeof(*shared_timings));
+
 	/*
 	 * Resetting DSI PHY silently changes its PLL registers to reset status,
 	 * which will confuse clock driver and result in wrong output rate of
@@ -819,13 +823,6 @@ void msm_dsi_phy_disable(struct msm_dsi_phy *phy)
 	dsi_phy_disable_resource(phy);
 }
 
-void msm_dsi_phy_get_shared_timings(struct msm_dsi_phy *phy,
-			struct msm_dsi_phy_shared_timings *shared_timings)
-{
-	memcpy(shared_timings, &phy->timing.shared_timings,
-	       sizeof(*shared_timings));
-}
-
 void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
 			     enum msm_dsi_phy_usecase uc)
 {
-- 
2.30.2


  parent reply	other threads:[~2021-05-15 13:12 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-15 13:12 [PATCH 0/8] dsi: rework clock parents and timing handling Dmitry Baryshkov
2021-05-15 13:12 ` [PATCH 1/8] arm64: dts: qcom: sc7180: assign DSI clock source parents Dmitry Baryshkov
2021-06-21 22:08   ` [Freedreno] " abhinavk
2021-05-15 13:12 ` [PATCH 2/8] arm64: dts: qcom: sdm845: " Dmitry Baryshkov
2021-06-21 22:08   ` [Freedreno] " abhinavk
2021-05-15 13:12 ` [PATCH 3/8] arm64: dts: qcom: sdm845-mtp: " Dmitry Baryshkov
2021-06-21 22:08   ` [Freedreno] " abhinavk
2021-05-15 13:12 ` [PATCH 4/8] arm64: dts: qcom: sm8250: " Dmitry Baryshkov
2021-06-21 22:09   ` abhinavk
2021-05-15 13:12 ` [PATCH 5/8] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-06-21 22:10   ` [Freedreno] " abhinavk
2021-05-15 13:12 ` [PATCH 6/8] drm/msm/dsi: phy: use of_device_get_match_data Dmitry Baryshkov
2021-06-21 22:11   ` [Freedreno] " abhinavk
2021-05-15 13:12 ` Dmitry Baryshkov [this message]
2021-06-21 22:41   ` [Freedreno] [PATCH 7/8] drm/msm/dsi: drop msm_dsi_phy_get_shared_timings abhinavk
2021-05-15 13:12 ` [PATCH 8/8] drm/msm/dsi: remove msm_dsi_dphy_timing from msm_dsi_phy Dmitry Baryshkov
2021-06-21 22:43   ` [Freedreno] " abhinavk
2021-06-21 22:57     ` Dmitry Baryshkov
2021-06-10 13:48 ` [PATCH 0/8] dsi: rework clock parents and timing handling Dmitry Baryshkov
2021-06-10 16:34   ` [Freedreno] " abhinavk
2021-06-21 22:01 ` abhinavk

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