* [PATCH v2 1/6] drm/msm/dpu: get DSPP blocks directly rather than through RM
2021-05-15 22:57 Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 2/6] drm/msm/dpu: get MERGE_3D " Dmitry Baryshkov
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
Each DSPP block is tied to a single LM. No LMs can share single DSPP
block. So there is no need to handle DSPP blocks through all resource
allocation/deallocation/assignment, just receive DSPP block as a part of
LM hardware instance.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 50 ++-------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 -
6 files changed, 11 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 8d942052db8a..2b750da8b30c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1007,7 +1007,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC];
struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
- struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL };
int num_lm, num_ctl, num_pp;
int i, j;
@@ -1058,9 +1057,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl));
num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm));
- dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
- drm_enc->base.id, DPU_HW_BLK_DSPP, hw_dspp,
- ARRAY_SIZE(hw_dspp));
for (i = 0; i < MAX_CHANNELS_PER_ENC; i++)
dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i])
@@ -1073,7 +1069,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]);
cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]);
- cstate->mixers[i].hw_dspp = to_dpu_hw_dspp(hw_dspp[i]);
+ cstate->mixers[i].hw_dspp = cstate->mixers[i].hw_lm->dspp;
}
cstate->num_mixers = num_lm;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index cb6bb7a22c15..7f02078db7e7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -5,6 +5,7 @@
#include "dpu_kms.h"
#include "dpu_hw_catalog.h"
#include "dpu_hwio.h"
+#include "dpu_hw_dspp.h"
#include "dpu_hw_lm.h"
#include "dpu_hw_mdss.h"
@@ -182,10 +183,15 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
c->cap = cfg;
_setup_mixer_ops(m, &c->ops, c->cap->features);
+ if (cfg->dspp && cfg->dspp < DSPP_MAX)
+ c->dspp = dpu_hw_dspp_init(cfg->dspp, addr, m);
+
return c;
}
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
{
+ if (lm)
+ dpu_hw_dspp_destroy(lm->dspp);
kfree(lm);
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
index 4a6b2de19ef6..effb78311a43 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
@@ -64,6 +64,7 @@ struct dpu_hw_mixer {
const struct dpu_lm_cfg *cap;
const struct dpu_mdp_cfg *mdp;
const struct dpu_ctl_cfg *ctl;
+ struct dpu_hw_dspp *dspp;
/* ops */
struct dpu_hw_lm_ops ops;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index d6717d6672f7..195a854245fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -164,7 +164,6 @@ struct dpu_global_state {
uint32_t mixer_to_enc_id[LM_MAX - LM_0];
uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
uint32_t intf_to_enc_id[INTF_MAX - INTF_0];
- uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0];
};
struct dpu_global_state
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index f9c83d6e427a..6e7b5578cc81 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -9,7 +9,6 @@
#include "dpu_hw_ctl.h"
#include "dpu_hw_pingpong.h"
#include "dpu_hw_intf.h"
-#include "dpu_hw_dspp.h"
#include "dpu_hw_merge3d.h"
#include "dpu_encoder.h"
#include "dpu_trace.h"
@@ -204,23 +203,6 @@ int dpu_rm_init(struct dpu_rm *rm,
rm->ctl_blks[ctl->id - CTL_0] = &hw->base;
}
- for (i = 0; i < cat->dspp_count; i++) {
- struct dpu_hw_dspp *hw;
- const struct dpu_dspp_cfg *dspp = &cat->dspp[i];
-
- if (dspp->id < DSPP_0 || dspp->id >= DSPP_MAX) {
- DPU_ERROR("skip dspp %d with invalid id\n", dspp->id);
- continue;
- }
- hw = dpu_hw_dspp_init(dspp->id, mmio, cat);
- if (IS_ERR_OR_NULL(hw)) {
- rc = PTR_ERR(hw);
- DPU_ERROR("failed dspp object creation: err %d\n", rc);
- goto fail;
- }
- rm->dspp_blks[dspp->id - DSPP_0] = &hw->base;
- }
-
return 0;
fail:
@@ -271,15 +253,13 @@ static bool _dpu_rm_check_lm_peer(struct dpu_rm *rm, int primary_idx,
* available and appropriate
* @pp_idx: output parameter, index of pingpong block attached to the layer
* mixer in rm->pingpong_blks[].
- * @dspp_idx: output parameter, index of dspp block attached to the layer
- * mixer in rm->dspp_blks[].
* @reqs: input parameter, rm requirements for HW blocks needed in the
* datapath.
* Return: true if lm matches all requirements, false otherwise
*/
static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm,
struct dpu_global_state *global_state,
- uint32_t enc_id, int lm_idx, int *pp_idx, int *dspp_idx,
+ uint32_t enc_id, int lm_idx, int *pp_idx,
struct dpu_rm_requirements *reqs)
{
const struct dpu_lm_cfg *lm_cfg;
@@ -305,22 +285,6 @@ static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm,
}
*pp_idx = idx;
- if (!reqs->topology.num_dspp)
- return true;
-
- idx = lm_cfg->dspp - DSPP_0;
- if (idx < 0 || idx >= ARRAY_SIZE(rm->dspp_blks)) {
- DPU_ERROR("failed to get dspp on lm %d\n", lm_cfg->dspp);
- return false;
- }
-
- if (reserved_by_other(global_state->dspp_to_enc_id, idx, enc_id)) {
- DPU_DEBUG("lm %d dspp %d already reserved\n", lm_cfg->id,
- lm_cfg->dspp);
- return false;
- }
- *dspp_idx = idx;
-
return true;
}
@@ -332,7 +296,6 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
{
int lm_idx[MAX_BLOCKS];
int pp_idx[MAX_BLOCKS];
- int dspp_idx[MAX_BLOCKS] = {0};
int i, j, lm_count = 0;
if (!reqs->topology.num_lm) {
@@ -351,7 +314,7 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,
enc_id, i, &pp_idx[lm_count],
- &dspp_idx[lm_count], reqs)) {
+ reqs)) {
continue;
}
@@ -371,7 +334,7 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
if (!_dpu_rm_check_lm_and_get_connected_blks(rm,
global_state, enc_id, j,
- &pp_idx[lm_count], &dspp_idx[lm_count],
+ &pp_idx[lm_count],
reqs)) {
continue;
}
@@ -389,8 +352,6 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
for (i = 0; i < lm_count; i++) {
global_state->mixer_to_enc_id[lm_idx[i]] = enc_id;
global_state->pingpong_to_enc_id[pp_idx[i]] = enc_id;
- global_state->dspp_to_enc_id[dspp_idx[i]] =
- reqs->topology.num_dspp ? enc_id : 0;
trace_dpu_rm_reserve_lms(lm_idx[i] + LM_0, enc_id,
pp_idx[i] + PINGPONG_0);
@@ -635,11 +596,6 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
hw_to_enc_id = global_state->intf_to_enc_id;
max_blks = ARRAY_SIZE(rm->intf_blks);
break;
- case DPU_HW_BLK_DSPP:
- hw_blks = rm->dspp_blks;
- hw_to_enc_id = global_state->dspp_to_enc_id;
- max_blks = ARRAY_SIZE(rm->dspp_blks);
- break;
default:
DPU_ERROR("blk type %d not managed by rm\n", type);
return 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index 1f12c8d5b8aa..91952af6c75b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -19,7 +19,6 @@ struct dpu_global_state;
* @mixer_blks: array of layer mixer hardware resources
* @ctl_blks: array of ctl hardware resources
* @intf_blks: array of intf hardware resources
- * @dspp_blks: array of dspp hardware resources
* @lm_max_width: cached layer mixer maximum width
* @rm_lock: resource manager mutex
*/
@@ -28,7 +27,6 @@ struct dpu_rm {
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
- struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0];
struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0];
uint32_t lm_max_width;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/6] drm/msm/dpu: get MERGE_3D blocks directly rather than through RM
2021-05-15 22:57 Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 1/6] drm/msm/dpu: get DSPP blocks directly rather than through RM Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 3/6] drm/msm/dpu: get PINGPONG " Dmitry Baryshkov
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
MERGE_3D blocks are not really handled by resource manager, they are
used by corresponding PP blocks directly, each merge_3d is used by two
known PP blocks. So allocate them outside of RM and use them directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 7 +++-
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 4 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 29 ++++++++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 36 +++----------------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8 ++---
6 files changed, 45 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index 55766c97c4c8..3ac53ff8c2ae 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -8,6 +8,7 @@
#include "dpu_hwio.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_pingpong.h"
+#include "dpu_hw_merge3d.h"
#include "dpu_kms.h"
#include "dpu_trace.h"
@@ -263,7 +264,8 @@ static void _setup_pingpong_ops(struct dpu_hw_pingpong *c,
struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+ const struct dpu_mdss_cfg *m,
+ struct dpu_hw_merge_3d **merge_3d_blks)
{
struct dpu_hw_pingpong *c;
const struct dpu_pingpong_cfg *cfg;
@@ -282,6 +284,9 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
c->caps = cfg;
_setup_pingpong_ops(c, c->caps->features);
+ if (cfg->merge_3d && cfg->merge_3d < MERGE_3D_MAX)
+ c->merge_3d = merge_3d_blks[cfg->merge_3d];
+
return c;
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
index 89d08a715c16..75e6cb393b9c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
@@ -157,11 +157,13 @@ static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
* @idx: Pingpong index for which driver object is required
* @addr: Mapped register io address of MDP
* @m: Pointer to mdss catalog data
+ * @merge_3d_blks: Pointer to merge 3d blocks
* Returns: Error code or allocated dpu_hw_pingpong context
*/
struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+ const struct dpu_mdss_cfg *m,
+ struct dpu_hw_merge_3d **merge_3d_blks);
/**
* dpu_hw_pingpong_destroy - destroys pingpong driver context
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e3aed844bf82..ca89229d9f42 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -23,6 +23,7 @@
#include "dpu_kms.h"
#include "dpu_core_irq.h"
#include "dpu_formats.h"
+#include "dpu_hw_merge3d.h"
#include "dpu_hw_vbif.h"
#include "dpu_vbif.h"
#include "dpu_encoder.h"
@@ -688,6 +689,16 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
dpu_rm_destroy(&dpu_kms->rm);
dpu_kms->rm_init = false;
+ /* After RM destroy, as PP blocks reference MERGE_3D blocks */
+ if (dpu_kms->catalog) {
+ for (i = 0; i < dpu_kms->catalog->merge_3d_count; i++) {
+ u32 merge_3d_idx = dpu_kms->catalog->merge_3d[i].id;
+
+ if ((merge_3d_idx < MERGE_3D_MAX) && dpu_kms->hw_merge_3d[merge_3d_idx])
+ dpu_hw_merge_3d_destroy(dpu_kms->hw_merge_3d[merge_3d_idx]);
+ }
+ }
+
if (dpu_kms->catalog)
dpu_hw_catalog_deinit(dpu_kms->catalog);
dpu_kms->catalog = NULL;
@@ -962,7 +973,23 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
goto power_error;
}
- rc = dpu_rm_init(&dpu_kms->rm, dpu_kms->catalog, dpu_kms->mmio);
+ /* Before RM init so PP blocks can find MERGE_3D blocks */
+ for (i = 0; i < dpu_kms->catalog->merge_3d_count; i++) {
+ u32 merge_3d_idx = dpu_kms->catalog->merge_3d[i].id;
+
+ dpu_kms->hw_merge_3d[merge_3d_idx] = dpu_hw_merge_3d_init(merge_3d_idx,
+ dpu_kms->mmio, dpu_kms->catalog);
+ if (IS_ERR_OR_NULL(dpu_kms->hw_merge_3d[merge_3d_idx])) {
+ rc = PTR_ERR(dpu_kms->hw_merge_3d[merge_3d_idx]);
+ if (!dpu_kms->hw_merge_3d[merge_3d_idx])
+ rc = -EINVAL;
+ DPU_ERROR("failed to init merge_3d %d: %d\n", merge_3d_idx, rc);
+ dpu_kms->hw_merge_3d[merge_3d_idx] = NULL;
+ goto power_error;
+ }
+ }
+
+ rc = dpu_rm_init(&dpu_kms->rm, dpu_kms);
if (rc) {
DPU_ERROR("rm init failed: %d\n", rc);
goto power_error;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 195a854245fa..057fdf0ca9f4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -123,6 +123,7 @@ struct dpu_kms {
bool rm_init;
struct dpu_hw_vbif *hw_vbif[VBIF_MAX];
+ struct dpu_hw_merge_3d *hw_merge_3d[MERGE_3D_MAX];
struct dpu_hw_mdp *hw_mdp;
bool has_danger_ctrl;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 6e7b5578cc81..138efa7e51e5 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -9,7 +9,6 @@
#include "dpu_hw_ctl.h"
#include "dpu_hw_pingpong.h"
#include "dpu_hw_intf.h"
-#include "dpu_hw_merge3d.h"
#include "dpu_encoder.h"
#include "dpu_trace.h"
@@ -42,14 +41,6 @@ int dpu_rm_destroy(struct dpu_rm *rm)
dpu_hw_pingpong_destroy(hw);
}
}
- for (i = 0; i < ARRAY_SIZE(rm->merge_3d_blks); i++) {
- struct dpu_hw_merge_3d *hw;
-
- if (rm->merge_3d_blks[i]) {
- hw = to_dpu_hw_merge_3d(rm->merge_3d_blks[i]);
- dpu_hw_merge_3d_destroy(hw);
- }
- }
for (i = 0; i < ARRAY_SIZE(rm->mixer_blks); i++) {
struct dpu_hw_mixer *hw;
@@ -79,9 +70,10 @@ int dpu_rm_destroy(struct dpu_rm *rm)
}
int dpu_rm_init(struct dpu_rm *rm,
- struct dpu_mdss_cfg *cat,
- void __iomem *mmio)
+ struct dpu_kms *dpu_kms)
{
+ struct dpu_mdss_cfg *cat = dpu_kms->catalog;
+ void __iomem *mmio = dpu_kms->mmio;
int rc, i;
if (!rm || !cat || !mmio) {
@@ -127,24 +119,6 @@ int dpu_rm_init(struct dpu_rm *rm,
}
}
- for (i = 0; i < cat->merge_3d_count; i++) {
- struct dpu_hw_merge_3d *hw;
- const struct dpu_merge_3d_cfg *merge_3d = &cat->merge_3d[i];
-
- if (merge_3d->id < MERGE_3D_0 || merge_3d->id >= MERGE_3D_MAX) {
- DPU_ERROR("skip merge_3d %d with invalid id\n", merge_3d->id);
- continue;
- }
- hw = dpu_hw_merge_3d_init(merge_3d->id, mmio, cat);
- if (IS_ERR_OR_NULL(hw)) {
- rc = PTR_ERR(hw);
- DPU_ERROR("failed merge_3d object creation: err %d\n",
- rc);
- goto fail;
- }
- rm->merge_3d_blks[merge_3d->id - MERGE_3D_0] = &hw->base;
- }
-
for (i = 0; i < cat->pingpong_count; i++) {
struct dpu_hw_pingpong *hw;
const struct dpu_pingpong_cfg *pp = &cat->pingpong[i];
@@ -153,15 +127,13 @@ int dpu_rm_init(struct dpu_rm *rm,
DPU_ERROR("skip pingpong %d with invalid id\n", pp->id);
continue;
}
- hw = dpu_hw_pingpong_init(pp->id, mmio, cat);
+ hw = dpu_hw_pingpong_init(pp->id, mmio, cat, dpu_kms->hw_merge_3d);
if (IS_ERR_OR_NULL(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed pingpong object creation: err %d\n",
rc);
goto fail;
}
- if (pp->merge_3d && pp->merge_3d < MERGE_3D_MAX)
- hw->merge_3d = to_dpu_hw_merge_3d(rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0]);
rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base;
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index 91952af6c75b..4c0c15453c98 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -27,22 +27,20 @@ struct dpu_rm {
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
- struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0];
uint32_t lm_max_width;
};
+struct dpu_kms;
/**
* dpu_rm_init - Read hardware catalog and create reservation tracking objects
* for all HW blocks.
* @rm: DPU Resource Manager handle
- * @cat: Pointer to hardware catalog
- * @mmio: mapped register io address of MDP
+ * @dpu_kms: DPU KMS data
* @Return: 0 on Success otherwise -ERROR
*/
int dpu_rm_init(struct dpu_rm *rm,
- struct dpu_mdss_cfg *cat,
- void __iomem *mmio);
+ struct dpu_kms *dpu_kms);
/**
* dpu_rm_destroy - Free all memory allocated by dpu_rm_init
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/6] drm/msm/dpu: get PINGPONG blocks directly rather than through RM
2021-05-15 22:57 Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 1/6] drm/msm/dpu: get DSPP blocks directly rather than through RM Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 2/6] drm/msm/dpu: get MERGE_3D " Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 4/6] drm/msm/dpu: get INTF " Dmitry Baryshkov
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
Each PINGPONG block is tied to a single LM. No LMs can share single PINGPONG
block. So there is no need to handle PINGPONG blocks through all resource
allocation/deallocation/assignment, just receive PINGPONG block as a part of
LM hardware instance.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 10 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 6 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 99 ++-------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 -
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 9 +-
7 files changed, 25 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 2b750da8b30c..3f4d2ba53604 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1004,10 +1004,9 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
struct drm_crtc *drm_crtc;
struct dpu_crtc_state *cstate;
struct dpu_global_state *global_state;
- struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC];
struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
- int num_lm, num_ctl, num_pp;
+ int num_lm, num_ctl;
int i, j;
if (!drm_enc) {
@@ -1050,18 +1049,11 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
break;
/* Query resource that have been reserved in atomic check step. */
- num_pp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
- drm_enc->base.id, DPU_HW_BLK_PINGPONG, hw_pp,
- ARRAY_SIZE(hw_pp));
num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl));
num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm));
- for (i = 0; i < MAX_CHANNELS_PER_ENC; i++)
- dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i])
- : NULL;
-
cstate = to_dpu_crtc_state(drm_crtc->state);
for (i = 0; i < num_lm; i++) {
@@ -1070,6 +1062,8 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]);
cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]);
cstate->mixers[i].hw_dspp = cstate->mixers[i].hw_lm->dspp;
+
+ dpu_enc->hw_pp[i] = cstate->mixers[i].hw_lm->pingpong;
}
cstate->num_mixers = num_lm;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
index 7f02078db7e7..04a835b9c2a3 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
@@ -8,6 +8,7 @@
#include "dpu_hw_dspp.h"
#include "dpu_hw_lm.h"
#include "dpu_hw_mdss.h"
+#include "dpu_hw_pingpong.h"
#define LM_OP_MODE 0x00
#define LM_OUT_SIZE 0x04
@@ -163,7 +164,8 @@ static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+ const struct dpu_mdss_cfg *m,
+ struct dpu_hw_merge_3d **merge_3d_blks)
{
struct dpu_hw_mixer *c;
const struct dpu_lm_cfg *cfg;
@@ -185,13 +187,17 @@ struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
if (cfg->dspp && cfg->dspp < DSPP_MAX)
c->dspp = dpu_hw_dspp_init(cfg->dspp, addr, m);
+ if (cfg->pingpong && cfg->pingpong < PINGPONG_MAX)
+ c->pingpong = dpu_hw_pingpong_init(cfg->pingpong, addr, m, merge_3d_blks);
return c;
}
void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm)
{
- if (lm)
+ if (lm) {
dpu_hw_dspp_destroy(lm->dspp);
+ dpu_hw_pingpong_destroy(lm->pingpong);
+ }
kfree(lm);
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
index effb78311a43..182740f2914b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
@@ -64,6 +64,7 @@ struct dpu_hw_mixer {
const struct dpu_lm_cfg *cap;
const struct dpu_mdp_cfg *mdp;
const struct dpu_ctl_cfg *ctl;
+ struct dpu_hw_pingpong *pingpong;
struct dpu_hw_dspp *dspp;
/* ops */
@@ -83,16 +84,19 @@ static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
return container_of(hw, struct dpu_hw_mixer, base);
}
+struct dpu_hw_merge_3d;
/**
* dpu_hw_lm_init(): Initializes the mixer hw driver object.
* should be called once before accessing every mixer.
* @idx: mixer index for which driver object is required
* @addr: mapped register io address of MDP
* @m : pointer to mdss catalog data
+ * @merge_3d_blks: Pointer to merge 3d blocks
*/
struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+ const struct dpu_mdss_cfg *m,
+ struct dpu_hw_merge_3d **merge_3d_blks);
/**
* dpu_hw_lm_destroy(): Destroys layer mixer driver context
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 057fdf0ca9f4..0b936258bde0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -161,7 +161,6 @@ struct vsync_info {
struct dpu_global_state {
struct drm_private_state base;
- uint32_t pingpong_to_enc_id[PINGPONG_MAX - PINGPONG_0];
uint32_t mixer_to_enc_id[LM_MAX - LM_0];
uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
uint32_t intf_to_enc_id[INTF_MAX - INTF_0];
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 138efa7e51e5..acadb7240d09 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -7,7 +7,6 @@
#include "dpu_kms.h"
#include "dpu_hw_lm.h"
#include "dpu_hw_ctl.h"
-#include "dpu_hw_pingpong.h"
#include "dpu_hw_intf.h"
#include "dpu_encoder.h"
#include "dpu_trace.h"
@@ -33,14 +32,6 @@ int dpu_rm_destroy(struct dpu_rm *rm)
{
int i;
- for (i = 0; i < ARRAY_SIZE(rm->pingpong_blks); i++) {
- struct dpu_hw_pingpong *hw;
-
- if (rm->pingpong_blks[i]) {
- hw = to_dpu_hw_pingpong(rm->pingpong_blks[i]);
- dpu_hw_pingpong_destroy(hw);
- }
- }
for (i = 0; i < ARRAY_SIZE(rm->mixer_blks); i++) {
struct dpu_hw_mixer *hw;
@@ -98,7 +89,7 @@ int dpu_rm_init(struct dpu_rm *rm,
DPU_ERROR("skip mixer %d with invalid id\n", lm->id);
continue;
}
- hw = dpu_hw_lm_init(lm->id, mmio, cat);
+ hw = dpu_hw_lm_init(lm->id, mmio, cat, dpu_kms->hw_merge_3d);
if (IS_ERR_OR_NULL(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed lm object creation: err %d\n", rc);
@@ -119,24 +110,6 @@ int dpu_rm_init(struct dpu_rm *rm,
}
}
- for (i = 0; i < cat->pingpong_count; i++) {
- struct dpu_hw_pingpong *hw;
- const struct dpu_pingpong_cfg *pp = &cat->pingpong[i];
-
- if (pp->id < PINGPONG_0 || pp->id >= PINGPONG_MAX) {
- DPU_ERROR("skip pingpong %d with invalid id\n", pp->id);
- continue;
- }
- hw = dpu_hw_pingpong_init(pp->id, mmio, cat, dpu_kms->hw_merge_3d);
- if (IS_ERR_OR_NULL(hw)) {
- rc = PTR_ERR(hw);
- DPU_ERROR("failed pingpong object creation: err %d\n",
- rc);
- goto fail;
- }
- rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base;
- }
-
for (i = 0; i < cat->intf_count; i++) {
struct dpu_hw_intf *hw;
const struct dpu_intf_cfg *intf = &cat->intf[i];
@@ -213,53 +186,6 @@ static bool _dpu_rm_check_lm_peer(struct dpu_rm *rm, int primary_idx,
return true;
}
-/**
- * _dpu_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
- * proposed use case requirements, incl. hardwired dependent blocks like
- * pingpong
- * @rm: dpu resource manager handle
- * @global_state: resources shared across multiple kms objects
- * @enc_id: encoder id requesting for allocation
- * @lm_idx: index of proposed layer mixer in rm->mixer_blks[], function checks
- * if lm, and all other hardwired blocks connected to the lm (pp) is
- * available and appropriate
- * @pp_idx: output parameter, index of pingpong block attached to the layer
- * mixer in rm->pingpong_blks[].
- * @reqs: input parameter, rm requirements for HW blocks needed in the
- * datapath.
- * Return: true if lm matches all requirements, false otherwise
- */
-static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm,
- struct dpu_global_state *global_state,
- uint32_t enc_id, int lm_idx, int *pp_idx,
- struct dpu_rm_requirements *reqs)
-{
- const struct dpu_lm_cfg *lm_cfg;
- int idx;
-
- /* Already reserved? */
- if (reserved_by_other(global_state->mixer_to_enc_id, lm_idx, enc_id)) {
- DPU_DEBUG("lm %d already reserved\n", lm_idx + LM_0);
- return false;
- }
-
- lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap;
- idx = lm_cfg->pingpong - PINGPONG_0;
- if (idx < 0 || idx >= ARRAY_SIZE(rm->pingpong_blks)) {
- DPU_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
- return false;
- }
-
- if (reserved_by_other(global_state->pingpong_to_enc_id, idx, enc_id)) {
- DPU_DEBUG("lm %d pp %d already reserved\n", lm_cfg->id,
- lm_cfg->pingpong);
- return false;
- }
- *pp_idx = idx;
-
- return true;
-}
-
static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
struct dpu_global_state *global_state,
uint32_t enc_id,
@@ -267,7 +193,6 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
{
int lm_idx[MAX_BLOCKS];
- int pp_idx[MAX_BLOCKS];
int i, j, lm_count = 0;
if (!reqs->topology.num_lm) {
@@ -284,9 +209,8 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
lm_count = 0;
lm_idx[lm_count] = i;
- if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state,
- enc_id, i, &pp_idx[lm_count],
- reqs)) {
+ if (reserved_by_other(global_state->mixer_to_enc_id, i, enc_id)) {
+ DPU_DEBUG("lm %d already reserved\n", i + LM_0);
continue;
}
@@ -304,10 +228,8 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
continue;
}
- if (!_dpu_rm_check_lm_and_get_connected_blks(rm,
- global_state, enc_id, j,
- &pp_idx[lm_count],
- reqs)) {
+ if (reserved_by_other(global_state->mixer_to_enc_id, j, enc_id)) {
+ DPU_DEBUG("lm %d already reserved\n", j + LM_0);
continue;
}
@@ -323,10 +245,8 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
for (i = 0; i < lm_count; i++) {
global_state->mixer_to_enc_id[lm_idx[i]] = enc_id;
- global_state->pingpong_to_enc_id[pp_idx[i]] = enc_id;
- trace_dpu_rm_reserve_lms(lm_idx[i] + LM_0, enc_id,
- pp_idx[i] + PINGPONG_0);
+ trace_dpu_rm_reserve_lms(lm_idx[i] + LM_0, enc_id);
}
return 0;
@@ -492,8 +412,6 @@ static void _dpu_rm_clear_mapping(uint32_t *res_mapping, int cnt,
void dpu_rm_release(struct dpu_global_state *global_state,
struct drm_encoder *enc)
{
- _dpu_rm_clear_mapping(global_state->pingpong_to_enc_id,
- ARRAY_SIZE(global_state->pingpong_to_enc_id), enc->base.id);
_dpu_rm_clear_mapping(global_state->mixer_to_enc_id,
ARRAY_SIZE(global_state->mixer_to_enc_id), enc->base.id);
_dpu_rm_clear_mapping(global_state->ctl_to_enc_id,
@@ -548,11 +466,6 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
int i, num_blks, max_blks;
switch (type) {
- case DPU_HW_BLK_PINGPONG:
- hw_blks = rm->pingpong_blks;
- hw_to_enc_id = global_state->pingpong_to_enc_id;
- max_blks = ARRAY_SIZE(rm->pingpong_blks);
- break;
case DPU_HW_BLK_LM:
hw_blks = rm->mixer_blks;
hw_to_enc_id = global_state->mixer_to_enc_id;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index 4c0c15453c98..a618c0ef43db 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -15,7 +15,6 @@ struct dpu_global_state;
/**
* struct dpu_rm - DPU dynamic hardware resource manager
- * @pingpong_blks: array of pingpong hardware resources
* @mixer_blks: array of layer mixer hardware resources
* @ctl_blks: array of ctl hardware resources
* @intf_blks: array of intf hardware resources
@@ -23,7 +22,6 @@ struct dpu_global_state;
* @rm_lock: resource manager mutex
*/
struct dpu_rm {
- struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0];
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 6714b088970f..23b587b10d77 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -835,20 +835,17 @@ DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
);
TRACE_EVENT(dpu_rm_reserve_lms,
- TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id),
- TP_ARGS(id, enc_id, pp_id),
+ TP_PROTO(uint32_t id, uint32_t enc_id),
+ TP_ARGS(id, enc_id),
TP_STRUCT__entry(
__field( uint32_t, id )
__field( uint32_t, enc_id )
- __field( uint32_t, pp_id )
),
TP_fast_assign(
__entry->id = id;
__entry->enc_id = enc_id;
- __entry->pp_id = pp_id;
),
- TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id,
- __entry->enc_id, __entry->pp_id)
+ TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id)
);
TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/6] drm/msm/dpu: get INTF blocks directly rather than through RM
2021-05-15 22:57 Dmitry Baryshkov
` (2 preceding siblings ...)
2021-05-15 22:57 ` [PATCH v2 3/6] drm/msm/dpu: get PINGPONG " Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-05-15 22:57 ` [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM Dmitry Baryshkov
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
INTF blocks are not really handled by resource manager, they are
assigned at dpu_encoder_setup_display using dpu_encoder_get_intf().
Then this allocation is passed to RM and then returned to then
dpu_encoder.
So allocate them outside of RM and use them directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 36 +-------
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 8 --
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 --
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 8 --
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 24 +++++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 91 -------------------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 -
9 files changed, 28 insertions(+), 156 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 3f4d2ba53604..8a8a98f9d132 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -456,26 +456,6 @@ int dpu_encoder_get_linecount(struct drm_encoder *drm_enc)
return linecount;
}
-void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
- struct dpu_encoder_hw_resources *hw_res)
-{
- struct dpu_encoder_virt *dpu_enc = NULL;
- int i = 0;
-
- dpu_enc = to_dpu_encoder_virt(drm_enc);
- DPU_DEBUG_ENC(dpu_enc, "\n");
-
- /* Query resources used by phys encs, expected to be without overlap */
- memset(hw_res, 0, sizeof(*hw_res));
-
- for (i = 0; i < dpu_enc->num_phys_encs; i++) {
- struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
-
- if (phys->ops.get_hw_resources)
- phys->ops.get_hw_resources(phys, hw_res);
- }
-}
-
static void dpu_encoder_destroy(struct drm_encoder *drm_enc)
{
struct dpu_encoder_virt *dpu_enc = NULL;
@@ -1007,7 +987,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
int num_lm, num_ctl;
- int i, j;
+ int i;
if (!drm_enc) {
DPU_ERROR("invalid encoder\n");
@@ -1069,8 +1049,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
cstate->num_mixers = num_lm;
for (i = 0; i < dpu_enc->num_phys_encs; i++) {
- int num_blk;
- struct dpu_hw_blk *hw_blk[MAX_CHANNELS_PER_ENC];
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (!dpu_enc->hw_pp[i]) {
@@ -1088,16 +1066,8 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
phys->hw_pp = dpu_enc->hw_pp[i];
phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]);
- num_blk = dpu_rm_get_assigned_resources(&dpu_kms->rm,
- global_state, drm_enc->base.id, DPU_HW_BLK_INTF,
- hw_blk, ARRAY_SIZE(hw_blk));
- for (j = 0; j < num_blk; j++) {
- struct dpu_hw_intf *hw_intf;
-
- hw_intf = to_dpu_hw_intf(hw_blk[i]);
- if (hw_intf->idx == phys->intf_idx)
- phys->hw_intf = hw_intf;
- }
+ if (phys->intf_idx >= INTF_0 && phys->intf_idx < INTF_MAX)
+ phys->hw_intf = dpu_kms->hw_intf[phys->intf_idx];
if (!phys->hw_intf) {
DPU_ERROR_ENC(dpu_enc,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index 99a5d73c9b88..09db83f8339f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -26,14 +26,6 @@ struct dpu_encoder_hw_resources {
enum dpu_intf_mode intfs[INTF_MAX];
};
-/**
- * dpu_encoder_get_hw_resources - Populate table of required hardware resources
- * @encoder: encoder pointer
- * @hw_res: resource table to populate with encoder required resources
- */
-void dpu_encoder_get_hw_resources(struct drm_encoder *encoder,
- struct dpu_encoder_hw_resources *hw_res);
-
/**
* dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to
* @encoder: encoder pointer
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
index ecbc4be98980..fc8f070981c2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
@@ -91,9 +91,6 @@ struct dpu_encoder_virt_ops {
* @disable: DRM Call. Disable mode.
* @atomic_check: DRM Call. Atomic check new DRM state.
* @destroy: DRM Call. Destroy and release resources.
- * @get_hw_resources: Populate the structure with the hardware
- * resources that this phys_enc is using.
- * Expect no overlap between phys_encs.
* @control_vblank_irq Register/Deregister for VBLANK IRQ
* @wait_for_commit_done: Wait for hardware to have flushed the
* current pending frames to hardware
@@ -129,8 +126,6 @@ struct dpu_encoder_phys_ops {
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
void (*destroy)(struct dpu_encoder_phys *encoder);
- void (*get_hw_resources)(struct dpu_encoder_phys *encoder,
- struct dpu_encoder_hw_resources *hw_res);
int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable);
int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);
int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index b2be39b9144e..adbd59326b99 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -541,13 +541,6 @@ static void dpu_encoder_phys_cmd_destroy(struct dpu_encoder_phys *phys_enc)
kfree(cmd_enc);
}
-static void dpu_encoder_phys_cmd_get_hw_resources(
- struct dpu_encoder_phys *phys_enc,
- struct dpu_encoder_hw_resources *hw_res)
-{
- hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_CMD;
-}
-
static void dpu_encoder_phys_cmd_prepare_for_kickoff(
struct dpu_encoder_phys *phys_enc)
{
@@ -747,7 +740,6 @@ static void dpu_encoder_phys_cmd_init_ops(
ops->enable = dpu_encoder_phys_cmd_enable;
ops->disable = dpu_encoder_phys_cmd_disable;
ops->destroy = dpu_encoder_phys_cmd_destroy;
- ops->get_hw_resources = dpu_encoder_phys_cmd_get_hw_resources;
ops->control_vblank_irq = dpu_encoder_phys_cmd_control_vblank_irq;
ops->wait_for_commit_done = dpu_encoder_phys_cmd_wait_for_commit_done;
ops->prepare_for_kickoff = dpu_encoder_phys_cmd_prepare_for_kickoff;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 4feec24162bc..4333b94cb04f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -477,13 +477,6 @@ static void dpu_encoder_phys_vid_destroy(struct dpu_encoder_phys *phys_enc)
kfree(phys_enc);
}
-static void dpu_encoder_phys_vid_get_hw_resources(
- struct dpu_encoder_phys *phys_enc,
- struct dpu_encoder_hw_resources *hw_res)
-{
- hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_VIDEO;
-}
-
static int dpu_encoder_phys_vid_wait_for_vblank(
struct dpu_encoder_phys *phys_enc)
{
@@ -688,7 +681,6 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops)
ops->enable = dpu_encoder_phys_vid_enable;
ops->disable = dpu_encoder_phys_vid_disable;
ops->destroy = dpu_encoder_phys_vid_destroy;
- ops->get_hw_resources = dpu_encoder_phys_vid_get_hw_resources;
ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq;
ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_commit_done;
ops->wait_for_vblank = dpu_encoder_phys_vid_wait_for_vblank;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index ca89229d9f42..364ab1987510 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -683,6 +683,12 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms)
if ((vbif_idx < VBIF_MAX) && dpu_kms->hw_vbif[vbif_idx])
dpu_hw_vbif_destroy(dpu_kms->hw_vbif[vbif_idx]);
}
+ for (i = 0; i < dpu_kms->catalog->intf_count; i++) {
+ u32 intf_idx = dpu_kms->catalog->intf[i].id;
+
+ if ((intf_idx < INTF_MAX) && dpu_kms->hw_intf[intf_idx])
+ dpu_hw_intf_destroy(dpu_kms->hw_intf[intf_idx]);
+ }
}
if (dpu_kms->rm_init)
@@ -1021,6 +1027,24 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
}
}
+ for (i = 0; i < dpu_kms->catalog->intf_count; i++) {
+ u32 intf_idx = dpu_kms->catalog->intf[i].id;
+
+ if (dpu_kms->catalog->intf[i].type == INTF_NONE)
+ continue;
+
+ dpu_kms->hw_intf[intf_idx] = dpu_hw_intf_init(intf_idx,
+ dpu_kms->mmio, dpu_kms->catalog);
+ if (IS_ERR_OR_NULL(dpu_kms->hw_intf[intf_idx])) {
+ rc = PTR_ERR(dpu_kms->hw_intf[intf_idx]);
+ if (!dpu_kms->hw_intf[intf_idx])
+ rc = -EINVAL;
+ DPU_ERROR("failed to init intf %d: %d\n", intf_idx, rc);
+ dpu_kms->hw_intf[intf_idx] = NULL;
+ goto power_error;
+ }
+ }
+
rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog,
_dpu_kms_get_clk(dpu_kms, "core"));
if (rc) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
index 0b936258bde0..6e2ec3171a79 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h
@@ -124,6 +124,7 @@ struct dpu_kms {
struct dpu_hw_vbif *hw_vbif[VBIF_MAX];
struct dpu_hw_merge_3d *hw_merge_3d[MERGE_3D_MAX];
+ struct dpu_hw_intf *hw_intf[INTF_MAX];
struct dpu_hw_mdp *hw_mdp;
bool has_danger_ctrl;
@@ -163,7 +164,6 @@ struct dpu_global_state {
uint32_t mixer_to_enc_id[LM_MAX - LM_0];
uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
- uint32_t intf_to_enc_id[INTF_MAX - INTF_0];
};
struct dpu_global_state
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index acadb7240d09..c36700a06ff2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -48,14 +48,6 @@ int dpu_rm_destroy(struct dpu_rm *rm)
dpu_hw_ctl_destroy(hw);
}
}
- for (i = 0; i < ARRAY_SIZE(rm->intf_blks); i++) {
- struct dpu_hw_intf *hw;
-
- if (rm->intf_blks[i]) {
- hw = to_dpu_hw_intf(rm->intf_blks[i]);
- dpu_hw_intf_destroy(hw);
- }
- }
return 0;
}
@@ -110,27 +102,6 @@ int dpu_rm_init(struct dpu_rm *rm,
}
}
- for (i = 0; i < cat->intf_count; i++) {
- struct dpu_hw_intf *hw;
- const struct dpu_intf_cfg *intf = &cat->intf[i];
-
- if (intf->type == INTF_NONE) {
- DPU_DEBUG("skip intf %d with type none\n", i);
- continue;
- }
- if (intf->id < INTF_0 || intf->id >= INTF_MAX) {
- DPU_ERROR("skip intf %d with invalid id\n", intf->id);
- continue;
- }
- hw = dpu_hw_intf_init(intf->id, mmio, cat);
- if (IS_ERR_OR_NULL(hw)) {
- rc = PTR_ERR(hw);
- DPU_ERROR("failed intf object creation: err %d\n", rc);
- goto fail;
- }
- rm->intf_blks[intf->id - INTF_0] = &hw->base;
- }
-
for (i = 0; i < cat->ctl_count; i++) {
struct dpu_hw_ctl *hw;
const struct dpu_ctl_cfg *ctl = &cat->ctl[i];
@@ -305,54 +276,6 @@ static int _dpu_rm_reserve_ctls(
return 0;
}
-static int _dpu_rm_reserve_intf(
- struct dpu_rm *rm,
- struct dpu_global_state *global_state,
- uint32_t enc_id,
- uint32_t id)
-{
- int idx = id - INTF_0;
-
- if (idx < 0 || idx >= ARRAY_SIZE(rm->intf_blks)) {
- DPU_ERROR("invalid intf id: %d", id);
- return -EINVAL;
- }
-
- if (!rm->intf_blks[idx]) {
- DPU_ERROR("couldn't find intf id %d\n", id);
- return -EINVAL;
- }
-
- if (reserved_by_other(global_state->intf_to_enc_id, idx, enc_id)) {
- DPU_ERROR("intf id %d already reserved\n", id);
- return -ENAVAIL;
- }
-
- global_state->intf_to_enc_id[idx] = enc_id;
- return 0;
-}
-
-static int _dpu_rm_reserve_intf_related_hw(
- struct dpu_rm *rm,
- struct dpu_global_state *global_state,
- uint32_t enc_id,
- struct dpu_encoder_hw_resources *hw_res)
-{
- int i, ret = 0;
- u32 id;
-
- for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
- if (hw_res->intfs[i] == INTF_MODE_NONE)
- continue;
- id = i + INTF_0;
- ret = _dpu_rm_reserve_intf(rm, global_state, enc_id, id);
- if (ret)
- return ret;
- }
-
- return ret;
-}
-
static int _dpu_rm_make_reservation(
struct dpu_rm *rm,
struct dpu_global_state *global_state,
@@ -374,11 +297,6 @@ static int _dpu_rm_make_reservation(
return ret;
}
- ret = _dpu_rm_reserve_intf_related_hw(rm, global_state, enc->base.id,
- &reqs->hw_res);
- if (ret)
- return ret;
-
return ret;
}
@@ -387,8 +305,6 @@ static int _dpu_rm_populate_requirements(
struct dpu_rm_requirements *reqs,
struct msm_display_topology req_topology)
{
- dpu_encoder_get_hw_resources(enc, &reqs->hw_res);
-
reqs->topology = req_topology;
DRM_DEBUG_KMS("num_lm: %d num_enc: %d num_intf: %d\n",
@@ -416,8 +332,6 @@ void dpu_rm_release(struct dpu_global_state *global_state,
ARRAY_SIZE(global_state->mixer_to_enc_id), enc->base.id);
_dpu_rm_clear_mapping(global_state->ctl_to_enc_id,
ARRAY_SIZE(global_state->ctl_to_enc_id), enc->base.id);
- _dpu_rm_clear_mapping(global_state->intf_to_enc_id,
- ARRAY_SIZE(global_state->intf_to_enc_id), enc->base.id);
}
int dpu_rm_reserve(
@@ -476,11 +390,6 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm,
hw_to_enc_id = global_state->ctl_to_enc_id;
max_blks = ARRAY_SIZE(rm->ctl_blks);
break;
- case DPU_HW_BLK_INTF:
- hw_blks = rm->intf_blks;
- hw_to_enc_id = global_state->intf_to_enc_id;
- max_blks = ARRAY_SIZE(rm->intf_blks);
- break;
default:
DPU_ERROR("blk type %d not managed by rm\n", type);
return 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index a618c0ef43db..ee90b1233430 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -17,14 +17,12 @@ struct dpu_global_state;
* struct dpu_rm - DPU dynamic hardware resource manager
* @mixer_blks: array of layer mixer hardware resources
* @ctl_blks: array of ctl hardware resources
- * @intf_blks: array of intf hardware resources
* @lm_max_width: cached layer mixer maximum width
* @rm_lock: resource manager mutex
*/
struct dpu_rm {
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
- struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
uint32_t lm_max_width;
};
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM
2021-05-15 22:57 Dmitry Baryshkov
` (3 preceding siblings ...)
2021-05-15 22:57 ` [PATCH v2 4/6] drm/msm/dpu: get INTF " Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-05-16 1:21 ` [Freedreno] " Arnaud Vrac
2021-05-15 22:57 ` [PATCH v2 6/6] drm/msm/dpu: simplify peer LM handling Dmitry Baryshkov
2021-06-02 21:45 ` Dmitry Baryshkov
6 siblings, 1 reply; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
No code uses lm_max_width from resource manager, so drop it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ------------
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 ----
2 files changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index c36700a06ff2..ec4387ad1182 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -88,18 +88,6 @@ int dpu_rm_init(struct dpu_rm *rm,
goto fail;
}
rm->mixer_blks[lm->id - LM_0] = &hw->base;
-
- if (!rm->lm_max_width) {
- rm->lm_max_width = lm->sblk->maxwidth;
- } else if (rm->lm_max_width != lm->sblk->maxwidth) {
- /*
- * Don't expect to have hw where lm max widths differ.
- * If found, take the min.
- */
- DPU_ERROR("unsupported: lm maxwidth differs\n");
- if (rm->lm_max_width > lm->sblk->maxwidth)
- rm->lm_max_width = lm->sblk->maxwidth;
- }
}
for (i = 0; i < cat->ctl_count; i++) {
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
index ee90b1233430..0c9113581d71 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
@@ -17,14 +17,10 @@ struct dpu_global_state;
* struct dpu_rm - DPU dynamic hardware resource manager
* @mixer_blks: array of layer mixer hardware resources
* @ctl_blks: array of ctl hardware resources
- * @lm_max_width: cached layer mixer maximum width
- * @rm_lock: resource manager mutex
*/
struct dpu_rm {
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
-
- uint32_t lm_max_width;
};
struct dpu_kms;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [Freedreno] [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM
2021-05-15 22:57 ` [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM Dmitry Baryshkov
@ 2021-05-16 1:21 ` Arnaud Vrac
2021-06-02 21:44 ` Dmitry Baryshkov
0 siblings, 1 reply; 10+ messages in thread
From: Arnaud Vrac @ 2021-05-16 1:21 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar,
Jonathan Marek, Stephen Boyd, MSM, dri-devel, David Airlie,
Daniel Vetter, freedreno
Hi Dmitry,
Le dim. 16 mai 2021 à 00:58, Dmitry Baryshkov
<dmitry.baryshkov@linaro.org> a écrit :
>
> No code uses lm_max_width from resource manager, so drop it.
I have a pending patch which uses this value to properly determine the
number of LMs to use in the topology. Currently the code uses a
hardcoded value of MAX_HDISPLAY_SPLIT (1080), but in reality I believe
it should be the lm max width (typically 2560). This will avoid using
two LMs to render resolutions like 1280x720 or 1920x1080.
I haven't managed to make hdmi work yet on DPU (testing on MSM8998) so
I'm not ready to send the patch yet, but it doesn't seem to trigger
any error.
-Arnaud
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 ----
> 2 files changed, 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> index c36700a06ff2..ec4387ad1182 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
> @@ -88,18 +88,6 @@ int dpu_rm_init(struct dpu_rm *rm,
> goto fail;
> }
> rm->mixer_blks[lm->id - LM_0] = &hw->base;
> -
> - if (!rm->lm_max_width) {
> - rm->lm_max_width = lm->sblk->maxwidth;
> - } else if (rm->lm_max_width != lm->sblk->maxwidth) {
> - /*
> - * Don't expect to have hw where lm max widths differ.
> - * If found, take the min.
> - */
> - DPU_ERROR("unsupported: lm maxwidth differs\n");
> - if (rm->lm_max_width > lm->sblk->maxwidth)
> - rm->lm_max_width = lm->sblk->maxwidth;
> - }
> }
>
> for (i = 0; i < cat->ctl_count; i++) {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> index ee90b1233430..0c9113581d71 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
> @@ -17,14 +17,10 @@ struct dpu_global_state;
> * struct dpu_rm - DPU dynamic hardware resource manager
> * @mixer_blks: array of layer mixer hardware resources
> * @ctl_blks: array of ctl hardware resources
> - * @lm_max_width: cached layer mixer maximum width
> - * @rm_lock: resource manager mutex
> */
> struct dpu_rm {
> struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
> struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
> -
> - uint32_t lm_max_width;
> };
>
> struct dpu_kms;
> --
> 2.30.2
>
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [Freedreno] [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM
2021-05-16 1:21 ` [Freedreno] " Arnaud Vrac
@ 2021-06-02 21:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-06-02 21:44 UTC (permalink / raw)
To: Arnaud Vrac
Cc: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar,
Jonathan Marek, Stephen Boyd, MSM, dri-devel, David Airlie,
Daniel Vetter, freedreno
On 16/05/2021 04:21, Arnaud Vrac wrote:
> Hi Dmitry,
>
> Le dim. 16 mai 2021 à 00:58, Dmitry Baryshkov
> <dmitry.baryshkov@linaro.org> a écrit :
>>
>> No code uses lm_max_width from resource manager, so drop it.
>
> I have a pending patch which uses this value to properly determine the
> number of LMs to use in the topology. Currently the code uses a
> hardcoded value of MAX_HDISPLAY_SPLIT (1080), but in reality I believe
> it should be the lm max width (typically 2560). This will avoid using
> two LMs to render resolutions like 1280x720 or 1920x1080.
As a second thought, I think we better have this value in the hw_catalog
itself rather than calculating it in the dpu_rm. WDYT?
>
> I haven't managed to make hdmi work yet on DPU (testing on MSM8998) so
> I'm not ready to send the patch yet, but it doesn't seem to trigger
> any error.
>
> -Arnaud
>
>
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ------------
>> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 ----
>> 2 files changed, 16 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
>> index c36700a06ff2..ec4387ad1182 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
>> @@ -88,18 +88,6 @@ int dpu_rm_init(struct dpu_rm *rm,
>> goto fail;
>> }
>> rm->mixer_blks[lm->id - LM_0] = &hw->base;
>> -
>> - if (!rm->lm_max_width) {
>> - rm->lm_max_width = lm->sblk->maxwidth;
>> - } else if (rm->lm_max_width != lm->sblk->maxwidth) {
>> - /*
>> - * Don't expect to have hw where lm max widths differ.
>> - * If found, take the min.
>> - */
>> - DPU_ERROR("unsupported: lm maxwidth differs\n");
>> - if (rm->lm_max_width > lm->sblk->maxwidth)
>> - rm->lm_max_width = lm->sblk->maxwidth;
>> - }
>> }
>>
>> for (i = 0; i < cat->ctl_count; i++) {
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
>> index ee90b1233430..0c9113581d71 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h
>> @@ -17,14 +17,10 @@ struct dpu_global_state;
>> * struct dpu_rm - DPU dynamic hardware resource manager
>> * @mixer_blks: array of layer mixer hardware resources
>> * @ctl_blks: array of ctl hardware resources
>> - * @lm_max_width: cached layer mixer maximum width
>> - * @rm_lock: resource manager mutex
>> */
>> struct dpu_rm {
>> struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
>> struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
>> -
>> - uint32_t lm_max_width;
>> };
>>
>> struct dpu_kms;
>> --
>> 2.30.2
>>
>> _______________________________________________
>> Freedreno mailing list
>> Freedreno@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/freedreno
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 6/6] drm/msm/dpu: simplify peer LM handling
2021-05-15 22:57 Dmitry Baryshkov
` (4 preceding siblings ...)
2021-05-15 22:57 ` [PATCH v2 5/6] drm/msm/dpu: drop unused lm_max_width from RM Dmitry Baryshkov
@ 2021-05-15 22:57 ` Dmitry Baryshkov
2021-06-02 21:45 ` Dmitry Baryshkov
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-05-15 22:57 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
For each LM there is at max 1 peer LM which can be driven by the same
CTL, so there no need to have a mask instead of just an ID of the peer
LM.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 30 +++++--------------
3 files changed, 11 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index b569030a0847..e7b132dce849 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -571,7 +571,7 @@ static const struct dpu_lm_sub_blks sdm845_lm_sblk = {
.features = _fmask, \
.sblk = _sblk, \
.pingpong = _pp, \
- .lm_pair_mask = (1 << _lmpair), \
+ .lm_pair = _lmpair, \
.dspp = _dspp \
}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index 4dfd8a20ad5c..3199bf8dc085 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -498,14 +498,14 @@ struct dpu_sspp_cfg {
* @features bit mask identifying sub-blocks/features
* @sblk: LM Sub-blocks information
* @pingpong: ID of connected PingPong, PINGPONG_MAX if unsupported
- * @lm_pair_mask: Bitmask of LMs that can be controlled by same CTL
+ * @lm_pair: ID of LM that can be controlled by same CTL
*/
struct dpu_lm_cfg {
DPU_HW_BLK_INFO;
const struct dpu_lm_sub_blks *sblk;
u32 pingpong;
u32 dspp;
- unsigned long lm_pair_mask;
+ unsigned long lm_pair;
};
/**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index ec4387ad1182..030bc30aba64 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -121,28 +121,19 @@ static bool _dpu_rm_needs_split_display(const struct msm_display_topology *top)
}
/**
- * _dpu_rm_check_lm_peer - check if a mixer is a peer of the primary
+ * _dpu_rm_get_lm_peer - get the id of a mixer which is a peer of the primary
* @rm: dpu resource manager handle
* @primary_idx: index of primary mixer in rm->mixer_blks[]
- * @peer_idx: index of other mixer in rm->mixer_blks[]
- * Return: true if rm->mixer_blks[peer_idx] is a peer of
- * rm->mixer_blks[primary_idx]
*/
-static bool _dpu_rm_check_lm_peer(struct dpu_rm *rm, int primary_idx,
- int peer_idx)
+static int _dpu_rm_get_lm_peer(struct dpu_rm *rm, int primary_idx)
{
const struct dpu_lm_cfg *prim_lm_cfg;
- const struct dpu_lm_cfg *peer_cfg;
prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap;
- peer_cfg = to_dpu_hw_mixer(rm->mixer_blks[peer_idx])->cap;
- if (!test_bit(peer_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
- DPU_DEBUG("lm %d not peer of lm %d\n", peer_cfg->id,
- peer_cfg->id);
- return false;
- }
- return true;
+ if (prim_lm_cfg->lm_pair >= LM_0 && prim_lm_cfg->lm_pair < LM_MAX)
+ return prim_lm_cfg->lm_pair - LM_0;
+ return -EINVAL;
}
static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
@@ -176,17 +167,12 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
++lm_count;
/* Valid primary mixer found, find matching peers */
- for (j = i + 1; j < ARRAY_SIZE(rm->mixer_blks) &&
- lm_count < reqs->topology.num_lm; j++) {
+ j = _dpu_rm_get_lm_peer(rm, i);
+ /* ignore the peer if there is an error or if the peer was already processed */
+ if (j < 0 || j < i) {
if (!rm->mixer_blks[j])
continue;
- if (!_dpu_rm_check_lm_peer(rm, i, j)) {
- DPU_DEBUG("lm %d not peer of lm %d\n", LM_0 + j,
- LM_0 + i);
- continue;
- }
-
if (reserved_by_other(global_state->mixer_to_enc_id, j, enc_id)) {
DPU_DEBUG("lm %d already reserved\n", j + LM_0);
continue;
--
2.30.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re:
2021-05-15 22:57 Dmitry Baryshkov
` (5 preceding siblings ...)
2021-05-15 22:57 ` [PATCH v2 6/6] drm/msm/dpu: simplify peer LM handling Dmitry Baryshkov
@ 2021-06-02 21:45 ` Dmitry Baryshkov
6 siblings, 0 replies; 10+ messages in thread
From: Dmitry Baryshkov @ 2021-06-02 21:45 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
On 16/05/2021 01:57, Dmitry Baryshkov wrote:
> From Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # This line is ignored.
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Reply-To:
> Subject: [PATCH v2 0/6] drm/msm/dpu: simplify RM code
> In-Reply-To:
>
> There is no need to request most of hardware blocks through the resource
> manager (RM), since typically there is 1:1 or N:1 relationship between
> corresponding blocks. Each LM is tied to the single PP. Each MERGE_3D
> can be used by the specified pair of PPs. Each DSPP is also tied to
> single LM. So instead of allocating them through the RM, get them via
> static configuration.
>
> Depends on: https://lore.kernel.org/linux-arm-msm/20210515190909.1809050-1-dmitry.baryshkov@linaro.org
>
> Changes since v1:
> - Split into separate patch series to ease review.
Another gracious ping, now for this series.
I want to send next version with minor changes, but I'd like to hear
your overall opinion before doing that.
>
> ----------------------------------------------------------------
> Dmitry Baryshkov (6):
> drm/msm/dpu: get DSPP blocks directly rather than through RM
> drm/msm/dpu: get MERGE_3D blocks directly rather than through RM
> drm/msm/dpu: get PINGPONG blocks directly rather than through RM
> drm/msm/dpu: get INTF blocks directly rather than through RM
> drm/msm/dpu: drop unused lm_max_width from RM
> drm/msm/dpu: simplify peer LM handling
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 54 +---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 8 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 -
> .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 8 -
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 14 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 7 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 7 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 4 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 53 +++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 5 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 310 ++-------------------
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 18 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 9 +-
> 16 files changed, 115 insertions(+), 401 deletions(-)
>
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 10+ messages in thread