From: Manivannan Sadhasivam <firstname.lastname@example.org> To: Greg KH <email@example.com> Cc: Baochen Qiang <firstname.lastname@example.org>, email@example.com, firstname.lastname@example.org, email@example.com, firstname.lastname@example.org, email@example.com Subject: Re: [PATCH v2] bus: mhi: Wait for M2 state during system resume Date: Mon, 24 May 2021 14:13:18 +0530 [thread overview] Message-ID: <20210524084318.GA27389@work> (raw) In-Reply-To: <YKtPXWrTb6Qj+E9l@kroah.com> On Mon, May 24, 2021 at 09:01:49AM +0200, Greg KH wrote: > On Mon, May 24, 2021 at 12:03:12PM +0800, Baochen Qiang wrote: > > During system resume, MHI host triggers M3->M0 transition and then waits > > for target device to enter M0 state. Once done, the device queues a state > > change event into ctrl event ring and notifies MHI host by raising an > > interrupt, where a tasklet is scheduled to process this event. In most cases, > > the tasklet is served timely and wait operation succeeds. > > > > However, there are cases where CPU is busy and cannot serve this tasklet > > for some time. Once delay goes long enough, the device moves itself to M1 > > state and also interrupts MHI host after inserting a new state change > > event to ctrl ring. Later CPU finally has time to process the ring, however > > there are two events in it now: > > 1. for M3->M0 event, which is processed first as queued first, > > tasklet handler updates device state to M0 and wakes up the task, > > i.e., the MHI host. > > 2. for M0->M1 event, which is processed later, tasklet handler > > triggers M1->M2 transition and updates device state to M2 directly, > > then wakes up the MHI host(if still sleeping on this wait queue). > > Note that although MHI host has been woken up while processing the first > > event, it may still has no chance to run before the second event is processed. > > In other words, MHI host has to keep waiting till timeout cause the M0 state > > has been missed. > > > > kernel log here: > > ... > > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.911251] mhi 0000:06:00.0: Entered with PM state: M3, MHI state: M3 > > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.917762] mhi 0000:06:00.0: State change event to state: M0 > > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4247.917767] mhi 0000:06:00.0: State change event to state: M1 > > Apr 15 01:45:14 test-NUC8i7HVK kernel: [ 4338.788231] mhi 0000:06:00.0: Did not enter M0 state, MHI state: M2, PM state: M2 > > ... > > > > Fix this issue by simply adding M2 as a valid state for resume. > > > > Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1 > > > > Fixes: 0c6b20a1d720 ("bus: mhi: core: Add support for MHI suspend and resume") > > Signed-off-by: Baochen Qiang <firstname.lastname@example.org> > > Reviewed-by: Hemant Kumar <email@example.com> > > --- > > drivers/bus/mhi/core/pm.c | 1 + > > 1 file changed, 1 insertion(+) > > <formletter> > > This is not the correct way to submit patches for inclusion in the > stable kernel tree. Please read: > https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html > for how to do this properly. > I've applied this patch to mhi tree with tag "Cc: firstname.lastname@example.org". Thanks, Mani > </formletter>
next prev parent reply other threads:[~2021-05-24 8:43 UTC|newest] Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-24 4:03 Baochen Qiang 2021-05-24 4:15 ` Manivannan Sadhasivam 2021-05-24 4:37 ` Manivannan Sadhasivam 2021-05-24 4:58 ` Manivannan Sadhasivam 2021-05-24 7:01 ` Greg KH 2021-05-24 8:43 ` Manivannan Sadhasivam [this message] 2021-07-20 2:30 ` patchwork-bot+linux-arm-msm
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