From: Robert Foss <robert.foss@linaro.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
jonathan@marek.ca, tdas@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Vinod Koul <vinod.koul@linaro.org>
Cc: Robert Foss <robert.foss@linaro.org>
Subject: [RFC v1 07/11] dt-bindings: clock: Add SM8350 QCOM video clock bindings
Date: Wed, 16 Jun 2021 16:11:03 +0200 [thread overview]
Message-ID: <20210616141107.291430-8-robert.foss@linaro.org> (raw)
In-Reply-To: <20210616141107.291430-1-robert.foss@linaro.org>
Add device tree bindings for video clock controller for SM8350 SoCs.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
---
.../bindings/clock/qcom,videocc.yaml | 2 +
.../dt-bindings/clock/qcom,videocc-sm8350.h | 44 +++++++++++++++++++
2 files changed, 46 insertions(+)
create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8350.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
index 567202942b88..a1dfecbad5c9 100644
--- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
@@ -18,6 +18,7 @@ description: |
dt-bindings/clock/qcom,videocc-sdm845.h
dt-bindings/clock/qcom,videocc-sm8150.h
dt-bindings/clock/qcom,videocc-sm8250.h
+ dt-bindings/clock/qcom,videocc-sm8350.h
properties:
compatible:
@@ -26,6 +27,7 @@ properties:
- qcom,sdm845-videocc
- qcom,sm8150-videocc
- qcom,sm8250-videocc
+ - qcom,sm8350-videocc
clocks:
items:
diff --git a/include/dt-bindings/clock/qcom,videocc-sm8350.h b/include/dt-bindings/clock/qcom,videocc-sm8350.h
new file mode 100644
index 000000000000..531cad2b0ab5
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,videocc-sm8350.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8350_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8350_H
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_AHB_CLK 0
+#define VIDEO_CC_AHB_CLK_SRC 1
+#define VIDEO_CC_MVS0_CLK 2
+#define VIDEO_CC_MVS0_CLK_SRC 3
+#define VIDEO_CC_MVS0_DIV_CLK_SRC 4
+#define VIDEO_CC_MVS0C_CLK 5
+#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 6
+#define VIDEO_CC_MVS1_CLK 7
+#define VIDEO_CC_MVS1_CLK_SRC 8
+#define VIDEO_CC_MVS1_DIV2_CLK 9
+#define VIDEO_CC_MVS1_DIV_CLK_SRC 10
+#define VIDEO_CC_MVS1C_CLK 11
+#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC 12
+#define VIDEO_CC_SLEEP_CLK 13
+#define VIDEO_CC_SLEEP_CLK_SRC 14
+#define VIDEO_CC_XO_CLK 15
+#define VIDEO_CC_XO_CLK_SRC 16
+#define VIDEO_PLL0 17
+#define VIDEO_PLL1 18
+
+/* VIDEO_CC resets */
+#define VIDEO_CC_CVP_INTERFACE_BCR 0
+#define VIDEO_CC_CVP_MVS0_BCR 1
+#define VIDEO_CC_MVS0C_CLK_ARES 2
+#define VIDEO_CC_CVP_MVS0C_BCR 3
+#define VIDEO_CC_CVP_MVS1_BCR 4
+#define VIDEO_CC_MVS1C_CLK_ARES 5
+#define VIDEO_CC_CVP_MVS1C_BCR 6
+
+#define MVS0C_GDSC 0
+#define MVS1C_GDSC 1
+#define MVS0_GDSC 2
+#define MVS1_GDSC 3
+
+#endif
--
2.30.2
next prev parent reply other threads:[~2021-06-16 14:11 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-16 14:10 [RFC v1 00/11] Qcom SM8350 DispCC & VideoCC Robert Foss
2021-06-16 14:10 ` [RFC v1 01/11] clk: qcom: common: Add runtime init/suspend/resume Robert Foss
2021-06-16 14:10 ` [RFC v1 02/11] clk: qcom: rcg2: Add support for flags Robert Foss
2021-06-16 15:33 ` Konrad Dybcio
2021-06-17 7:58 ` Robert Foss
2021-06-16 16:07 ` Dmitry Baryshkov
2021-06-17 13:37 ` Robert Foss
2021-06-16 14:10 ` [RFC v1 03/11] clk: qcom: clk-alpha-pll: Fix typo in comment Robert Foss
2021-06-16 14:11 ` [RFC v1 04/11] clk: qcom: clk-alpha-pll: Add configuration support for LUCID 5LPE Robert Foss
2021-06-16 14:11 ` [RFC v1 05/11] dt-bindings: clock: Add QCOM SM8350 display clock bindings Robert Foss
2021-06-24 21:18 ` Rob Herring
2021-06-25 13:51 ` Robert Foss
2021-06-16 14:11 ` [RFC v1 06/11] clk: qcom: Add display clock controller driver for SM8350 Robert Foss
2021-06-16 15:42 ` Konrad Dybcio
2021-06-17 9:02 ` Robert Foss
2021-06-17 19:37 ` Konrad Dybcio
2021-06-16 14:11 ` Robert Foss [this message]
2021-06-16 14:11 ` [RFC v1 08/11] clk: qcom: Add video " Robert Foss
2021-06-16 14:11 ` [RFC v1 09/11] arm64: dts: qcom: sm8350: Power up dispcc & videocc on sm8350 by MMCX regulator Robert Foss
2021-06-16 14:11 ` [RFC v1 10/11] arm64: dts: qcom: sm8350: Add videocc DT node Robert Foss
2021-06-16 14:11 ` [RFC v1 11/11] arm64: dts: qcom: sm8350: Add dispcc " Robert Foss
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