Re: [PATCH 11/17] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check

[kernel test robot <lkp@intel.com>]

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Hi Dmitry,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on next-20210624]
[also build test WARNING on v5.13-rc7]
[cannot apply to linus/master v5.13-rc7 v5.13-rc6 v5.13-rc5]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Dmitry-Baryshkov/drm-msm-dpu-switch-dpu_plane-to-be-virtual/20210624-225947
base:    2a8927f0efb6fb34b9d11dab3bd3f018e866d36d
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/3842e184f54916b9d22989d840a70bfb0bfebf10
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Dmitry-Baryshkov/drm-msm-dpu-switch-dpu_plane-to-be-virtual/20210624-225947
        git checkout 3842e184f54916b9d22989d840a70bfb0bfebf10
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c: In function 'dpu_crtc_atomic_check':
>> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c:898:23: warning: variable 'mixer_width' set but not used [-Wunused-but-set-variable]
     898 |  int cnt = 0, rc = 0, mixer_width = 0, i;
         |                       ^~~~~~~~~~~


vim +/mixer_width +898 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

   884	
   885	static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
   886			struct drm_atomic_state *state)
   887	{
   888		struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
   889										  crtc);
   890		struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
   891		struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc_state);
   892		struct plane_state *pstates;
   893	
   894		const struct drm_plane_state *pstate;
   895		struct drm_plane *plane;
   896		struct drm_display_mode *mode;
   897	
 > 898		int cnt = 0, rc = 0, mixer_width = 0, i;
   899	
   900		struct drm_rect crtc_rect = { 0 };
   901	
   902		pstates = kzalloc(sizeof(*pstates) * DPU_STAGE_MAX * 4, GFP_KERNEL);
   903	
   904		if (!crtc_state->enable || !crtc_state->active) {
   905			DRM_DEBUG_ATOMIC("crtc%d -> enable %d, active %d, skip atomic_check\n",
   906					crtc->base.id, crtc_state->enable,
   907					crtc_state->active);
   908			memset(&cstate->new_perf, 0, sizeof(cstate->new_perf));
   909			goto end;
   910		}
   911	
   912		mode = &crtc_state->adjusted_mode;
   913		DRM_DEBUG_ATOMIC("%s: check\n", dpu_crtc->name);
   914	
   915		/* force a full mode set if active state changed */
   916		if (crtc_state->active_changed)
   917			crtc_state->mode_changed = true;
   918	
   919		if (cstate->num_mixers) {
   920			mixer_width = mode->hdisplay / cstate->num_mixers;
   921	
   922			_dpu_crtc_setup_lm_bounds(crtc, crtc_state);
   923		}
   924	
   925		crtc_rect.x2 = mode->hdisplay;
   926		crtc_rect.y2 = mode->vdisplay;
   927	
   928		 /* get plane state for all drm planes associated with crtc state */
   929		drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) {
   930			struct drm_rect dst, clip = crtc_rect;
   931	
   932			if (IS_ERR_OR_NULL(pstate)) {
   933				rc = PTR_ERR(pstate);
   934				DPU_ERROR("%s: failed to get plane%d state, %d\n",
   935						dpu_crtc->name, plane->base.id, rc);
   936				goto end;
   937			}
   938			if (cnt >= DPU_STAGE_MAX * 4)
   939				continue;
   940	
   941			pstates[cnt].dpu_pstate = to_dpu_plane_state(pstate);
   942			pstates[cnt].drm_pstate = pstate;
   943			pstates[cnt].stage = pstate->normalized_zpos;
   944	
   945			dpu_plane_clear_multirect(pstate);
   946	
   947			cnt++;
   948	
   949			dst = drm_plane_state_dest(pstate);
   950			if (!drm_rect_intersect(&clip, &dst)) {
   951				DPU_ERROR("invalid vertical/horizontal destination\n");
   952				DPU_ERROR("display: " DRM_RECT_FMT " plane: "
   953					  DRM_RECT_FMT "\n", DRM_RECT_ARG(&crtc_rect),
   954					  DRM_RECT_ARG(&dst));
   955				rc = -E2BIG;
   956				goto end;
   957			}
   958		}
   959	
   960		for (i = 0; i < cnt; i++) {
   961			int z_pos = pstates[i].stage;
   962	
   963			/* verify z_pos setting before using it */
   964			if (z_pos >= DPU_STAGE_MAX - DPU_STAGE_0) {
   965				DPU_ERROR("> %d plane stages assigned\n",
   966						DPU_STAGE_MAX - DPU_STAGE_0);
   967				rc = -EINVAL;
   968				goto end;
   969			}
   970	
   971			pstates[i].dpu_pstate->stage = z_pos + DPU_STAGE_0;
   972			DRM_DEBUG_ATOMIC("%s: zpos %d\n", dpu_crtc->name, z_pos);
   973		}
   974	
   975		atomic_inc(&_dpu_crtc_get_kms(crtc)->bandwidth_ref);
   976	
   977		rc = dpu_core_perf_crtc_check(crtc, crtc_state);
   978		if (rc) {
   979			DPU_ERROR("crtc%d failed performance check %d\n",
   980					crtc->base.id, rc);
   981			goto end;
   982		}
   983	
   984	end:
   985		kfree(pstates);
   986		return rc;
   987	}
   988	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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