[PATCH 00/10] MHI patches for v5.15 - Take 1

From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: gregkh@linuxfoundation.org
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
	linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org,
	linux-kernel@vger.kernel.org, loic.poulain@linaro.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 00/10] MHI patches for v5.15 - Take 1
Date: Mon,  2 Aug 2021 10:42:45 +0530	[thread overview]
Message-ID: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> (raw)

Hi Greg,

Here is the first round of MHI patches for v5.15. Most of the patches missed
v5.14 due to late submission, so sending them early now.

Summary:

1. Added a dedicated flag to the MHI client transfer APIs for inbound
buffer allocation by the MHI stack. This is required for some downlink
channels like QRTR that depends on pre-allocated buffers. Since the patch
modifies the MHI client drivers under "net/", Ack has been collected from
the netdev maintainer.

2. Added support for Cinterion MV31-W modem in pci_generic controller:
https://www.thalesgroup.com/en/markets/digital-identity-and-security/iot/iot-connectivity/products/iot-products/mv31-w-ultra-high

3. Rearranged the setting of BHI/BHIe offsets for better validation of the
register values read from MMIO.

4. Cleanup of the BHI/BHIe pointers by setting them to NULL to prevent access
after power down.

5. Added support for getting the MMIO register length from the controller
drivers. This helps in validation of the read offsets from MMIO registers
in the MHI stack.

6. Added the MMIO register length support in the controller drivers and
collected Acks from the maintainers.

7. With the help of above register length, added check for BHI/BHIe offsets
in the MHI core.

8. Used the DMA allocation APIs directly instead of using MHI specific APIs,
mhi_alloc_coherent() and mhi_free_coherent(). They were not doing anything
special other than calling the DMA allocation APIs.

9. Finally, a patch to improve the debug messages for the power up operation
by showing the current EE states.

Please consider merging!

Thanks,
Mani

Bhaumik Bhatt (8):
  bus: mhi: core: Set BHI/BHIe offsets on power up preparation
  bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up
  bus: mhi: Add MMIO region length to controller structure
  ath11k: set register access length for MHI driver
  bus: mhi: pci_generic: Set register access length for MHI driver
  bus: mhi: core: Add range checks for BHI and BHIe
  bus: mhi: core: Replace DMA allocation wrappers with original APIs
  bus: mhi: core: Improve debug messages for power up

Loic Poulain (1):
  bus: mhi: Add inbound buffers allocation flag

ULRICH Thomas (1):
  bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI

 drivers/bus/mhi/core/boot.c           | 17 ++---
 drivers/bus/mhi/core/init.c           | 93 +++++++++++++++++----------
 drivers/bus/mhi/core/internal.h       | 22 +------
 drivers/bus/mhi/core/main.c           | 15 +++--
 drivers/bus/mhi/core/pm.c             | 34 +++-------
 drivers/bus/mhi/pci_generic.c         | 38 +++++++++++
 drivers/net/mhi/net.c                 |  2 +-
 drivers/net/wireless/ath/ath11k/mhi.c |  1 +
 drivers/net/wwan/mhi_wwan_ctrl.c      |  2 +-
 include/linux/mhi.h                   |  9 ++-
 net/qrtr/mhi.c                        |  2 +-
 11 files changed, 136 insertions(+), 99 deletions(-)

-- 
2.25.1