From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Georgi Djakov <djakov@kernel.org>
Cc: AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>,
Shawn Guo <shawn.guo@linaro.org>,
Yassine Oudjana <y.oudjana@protonmail.com>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v2 07/11] interconnect: msm8916: add support for AP-owned nodes
Date: Sat, 4 Sep 2021 02:24:17 +0300 [thread overview]
Message-ID: <20210903232421.1384199-8-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20210903232421.1384199-1-dmitry.baryshkov@linaro.org>
Port support for AP-owned nodes from the downstream device tree.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/interconnect/qcom/msm8916.c | 100 ++++++++++++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/drivers/interconnect/qcom/msm8916.c b/drivers/interconnect/qcom/msm8916.c
index b7d662875c89..e3c995b11357 100644
--- a/drivers/interconnect/qcom/msm8916.c
+++ b/drivers/interconnect/qcom/msm8916.c
@@ -10,6 +10,7 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <linux/of_device.h>
#include <dt-bindings/interconnect/qcom,msm8916.h>
@@ -115,6 +116,8 @@ static struct qcom_icc_node bimc_snoc_mas = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(bimc_snoc_mas_links),
.links = bimc_snoc_mas_links,
};
@@ -130,6 +133,8 @@ static struct qcom_icc_node bimc_snoc_slv = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(bimc_snoc_slv_links),
.links = bimc_snoc_slv_links,
};
@@ -146,6 +151,11 @@ static struct qcom_icc_node mas_apss = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 0,
.num_links = ARRAY_SIZE(mas_apss_links),
.links = mas_apss_links,
};
@@ -204,6 +214,11 @@ static struct qcom_icc_node mas_gfx = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 2,
.num_links = ARRAY_SIZE(mas_gfx_links),
.links = mas_gfx_links,
};
@@ -219,6 +234,11 @@ static struct qcom_icc_node mas_jpeg = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_BYPASS,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 6,
.num_links = ARRAY_SIZE(mas_jpeg_links),
.links = mas_jpeg_links,
};
@@ -234,6 +254,11 @@ static struct qcom_icc_node mas_mdp = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_BYPASS,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 7,
.num_links = ARRAY_SIZE(mas_mdp_links),
.links = mas_mdp_links,
};
@@ -290,6 +315,11 @@ static struct qcom_icc_node mas_qdss_bam = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 1,
+ .qos.prio_level = 1,
+ .qos.qos_port = 11,
.num_links = ARRAY_SIZE(mas_qdss_bam_links),
.links = mas_qdss_bam_links,
};
@@ -304,6 +334,11 @@ static struct qcom_icc_node mas_qdss_etr = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 1,
+ .qos.prio_level = 1,
+ .qos.qos_port = 10,
.num_links = ARRAY_SIZE(mas_qdss_etr_links),
.links = mas_qdss_etr_links,
};
@@ -348,6 +383,11 @@ static struct qcom_icc_node mas_tcu0 = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 2,
+ .qos.prio_level = 2,
+ .qos.qos_port = 5,
.num_links = ARRAY_SIZE(mas_tcu0_links),
.links = mas_tcu0_links,
};
@@ -364,6 +404,11 @@ static struct qcom_icc_node mas_tcu1 = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_FIXED,
+ .qos.areq_prio = 2,
+ .qos.prio_level = 2,
+ .qos.qos_port = 6,
.num_links = ARRAY_SIZE(mas_tcu1_links),
.links = mas_tcu1_links,
};
@@ -393,6 +438,11 @@ static struct qcom_icc_node mas_vfe = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_BYPASS,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 9,
.num_links = ARRAY_SIZE(mas_vfe_links),
.links = mas_vfe_links,
};
@@ -408,6 +458,11 @@ static struct qcom_icc_node mas_video = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_BYPASS,
+ .qos.areq_prio = 0,
+ .qos.prio_level = 0,
+ .qos.qos_port = 8,
.num_links = ARRAY_SIZE(mas_video_links),
.links = mas_video_links,
};
@@ -422,6 +477,8 @@ static struct qcom_icc_node mm_int_0 = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(mm_int_0_links),
.links = mm_int_0_links,
};
@@ -436,6 +493,8 @@ static struct qcom_icc_node mm_int_1 = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(mm_int_1_links),
.links = mm_int_1_links,
};
@@ -450,6 +509,8 @@ static struct qcom_icc_node mm_int_2 = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(mm_int_2_links),
.links = mm_int_2_links,
};
@@ -464,6 +525,8 @@ static struct qcom_icc_node mm_int_bimc = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(mm_int_bimc_links),
.links = mm_int_bimc_links,
};
@@ -692,6 +755,8 @@ static struct qcom_icc_node qdss_int = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(qdss_int_links),
.links = qdss_int_links,
};
@@ -1030,6 +1095,8 @@ static struct qcom_icc_node snoc_bimc_1_mas = {
.buswidth = 16,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(snoc_bimc_1_mas_links),
.links = snoc_bimc_1_mas_links,
};
@@ -1044,6 +1111,8 @@ static struct qcom_icc_node snoc_bimc_1_slv = {
.buswidth = 8,
.mas_rpm_id = -1,
.slv_rpm_id = -1,
+ .qos.ap_owned = true,
+ .qos.qos_mode = NOC_QOS_MODE_INVALID,
.num_links = ARRAY_SIZE(snoc_bimc_1_slv_links),
.links = snoc_bimc_1_slv_links,
};
@@ -1151,9 +1220,19 @@ static struct qcom_icc_node *msm8916_snoc_nodes[] = {
[SNOC_QDSS_INT] = &qdss_int,
};
+static const struct regmap_config msm8916_snoc_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x14000,
+ .fast_io = true,
+};
+
static struct qcom_icc_desc msm8916_snoc = {
.nodes = msm8916_snoc_nodes,
.num_nodes = ARRAY_SIZE(msm8916_snoc_nodes),
+ .regmap_cfg = &msm8916_snoc_regmap_config,
+ .qos_offset = 0x7000,
};
static struct qcom_icc_node *msm8916_bimc_nodes[] = {
@@ -1168,9 +1247,20 @@ static struct qcom_icc_node *msm8916_bimc_nodes[] = {
[SNOC_BIMC_1_SLV] = &snoc_bimc_1_slv,
};
+static const struct regmap_config msm8916_bimc_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x62000,
+ .fast_io = true,
+};
+
static struct qcom_icc_desc msm8916_bimc = {
.nodes = msm8916_bimc_nodes,
.num_nodes = ARRAY_SIZE(msm8916_bimc_nodes),
+ .is_bimc_node = true,
+ .regmap_cfg = &msm8916_bimc_regmap_config,
+ .qos_offset = 0x8000,
};
static struct qcom_icc_node *msm8916_pcnoc_nodes[] = {
@@ -1226,9 +1316,19 @@ static struct qcom_icc_node *msm8916_pcnoc_nodes[] = {
[SNOC_PCNOC_SLV] = &snoc_pcnoc_slv,
};
+static const struct regmap_config msm8916_pcnoc_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = 0x11000,
+ .fast_io = true,
+};
+
static struct qcom_icc_desc msm8916_pcnoc = {
.nodes = msm8916_pcnoc_nodes,
.num_nodes = ARRAY_SIZE(msm8916_pcnoc_nodes),
+ .regmap_cfg = &msm8916_pcnoc_regmap_config,
+ .qos_offset = 0x7000,
};
static const struct of_device_id msm8916_noc_of_match[] = {
--
2.33.0
next prev parent reply other threads:[~2021-09-03 23:24 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-03 23:24 [PATCH v2 0/11] interconnect: merge AP-owned support into icc-rpm Dmitry Baryshkov
2021-09-03 23:24 ` [PATCH v2 01/11] interconnect: icc-rpm: move bus clocks handling into qnoc_probe Dmitry Baryshkov
2021-09-04 10:58 ` AngeloGioacchino Del Regno
2021-09-04 11:04 ` Marijn Suijten
2021-10-04 11:49 ` Georgi Djakov
2021-09-03 23:24 ` [PATCH v2 02/11] interconnect: sdm660: expand DEFINE_QNODE macros Dmitry Baryshkov
2021-09-04 10:58 ` AngeloGioacchino Del Regno
2021-09-04 10:58 ` AngeloGioacchino Del Regno
2021-09-04 11:05 ` Marijn Suijten
2021-09-03 23:24 ` [PATCH v2 03/11] interconnect: sdm660: drop default/unused values Dmitry Baryshkov
2021-09-04 10:59 ` AngeloGioacchino Del Regno
2021-09-04 11:05 ` Marijn Suijten
2021-09-03 23:24 ` [PATCH v2 04/11] interconnect: sdm660: merge common code into icc-rpm Dmitry Baryshkov
2021-09-04 10:59 ` AngeloGioacchino Del Regno
2021-09-04 11:05 ` Marijn Suijten
2021-10-04 11:54 ` Georgi Djakov
2021-09-03 23:24 ` [PATCH v2 05/11] interconnect: icc-rpm: add support for QoS reg offset Dmitry Baryshkov
2021-09-04 10:59 ` AngeloGioacchino Del Regno
2021-09-03 23:24 ` [PATCH v2 06/11] interconnect: msm8916: expand DEFINE_QNODE macros Dmitry Baryshkov
2021-09-04 10:59 ` AngeloGioacchino Del Regno
2021-09-03 23:24 ` Dmitry Baryshkov [this message]
2021-09-04 11:00 ` [PATCH v2 07/11] interconnect: msm8916: add support for AP-owned nodes AngeloGioacchino Del Regno
2021-09-03 23:24 ` [PATCH v2 08/11] interconnect: msm8939: expand DEFINE_QNODE macros Dmitry Baryshkov
2021-09-04 11:00 ` AngeloGioacchino Del Regno
2021-09-03 23:24 ` [PATCH v2 09/11] interconnect: msm8939: add support for AP-owned nodes Dmitry Baryshkov
2021-09-04 11:00 ` AngeloGioacchino Del Regno
2021-09-03 23:24 ` [PATCH v2 10/11] interconnect: qcs404: expand DEFINE_QNODE macros Dmitry Baryshkov
2021-09-04 11:00 ` AngeloGioacchino Del Regno
2021-09-03 23:24 ` [PATCH v2 11/11] interconnect: qcom: drop DEFINE_QNODE macro Dmitry Baryshkov
2021-09-04 11:00 ` AngeloGioacchino Del Regno
2021-09-04 11:05 ` Marijn Suijten
2021-09-06 5:42 ` [PATCH v2 0/11] interconnect: merge AP-owned support into icc-rpm Shawn Guo
2021-09-25 19:40 ` Dmitry Baryshkov
2021-10-04 11:56 ` Georgi Djakov
2021-10-04 12:37 ` Dmitry Baryshkov
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