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From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Cc: swboyd@chromium.org, Sean Paul <seanpaul@chromium.org>,
	Rob Herring <robh@kernel.org>, Rob Clark <robdclark@gmail.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>,
	Kuogee Hsieh <khsieh@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: [PATCH v2 12/13] dt-bindings: msm/dp: Add bindings for HDCP registers
Date: Wed, 15 Sep 2021 16:38:31 -0400	[thread overview]
Message-ID: <20210915203834.1439-13-sean@poorly.run> (raw)
In-Reply-To: <20210915203834.1439-1-sean@poorly.run>

From: Sean Paul <seanpaul@chromium.org>

This patch adds the bindings for the MSM DisplayPort HDCP registers
which are required to write the HDCP key into the display controller as
well as the registers to enable HDCP authentication/key
exchange/encryption.

Cc: Rob Herring <robh@kernel.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-13-sean@poorly.run #v1

Changes in v2:
-Drop register range names (Stephen)
-Fix yaml errors (Rob)
---
 .../devicetree/bindings/display/msm/dp-controller.yaml     | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
index 64d8d9e5e47a..80a55e9ff532 100644
--- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml
@@ -19,7 +19,7 @@ properties:
       - qcom,sc7180-dp
 
   reg:
-    maxItems: 1
+    maxItems: 3
 
   interrupts:
     maxItems: 1
@@ -99,8 +99,9 @@ examples:
     #include <dt-bindings/power/qcom-rpmpd.h>
 
     displayport-controller@ae90000 {
-        compatible = "qcom,sc7180-dp";
-        reg = <0xae90000 0x1400>;
+        reg = <0 0x0ae90000 0 0x1400>,
+              <0 0x0aed1000 0 0x174>,
+              <0 0x0aee1000 0 0x2c>;
         interrupt-parent = <&mdss>;
         interrupts = <12>;
         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
-- 
Sean Paul, Software Engineer, Google / Chromium OS


  parent reply	other threads:[~2021-09-15 20:39 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20210915203834.1439-1-sean@poorly.run>
2021-09-15 20:38 ` [PATCH v2 08/13] drm/msm/dpu_kms: Re-order dpu includes Sean Paul
2021-09-17  3:54   ` Stephen Boyd
2021-09-22  2:26   ` [Freedreno] " abhinavk
2021-09-15 20:38 ` [PATCH v2 09/13] drm/msm/dpu: Remove useless checks in dpu_encoder Sean Paul
2021-09-17  3:54   ` Stephen Boyd
2021-09-15 20:38 ` [PATCH v2 10/13] drm/msm/dpu: Remove encoder->enable() hack Sean Paul
2021-09-17  3:53   ` Stephen Boyd
2021-09-17 17:25     ` Sean Paul
2021-09-15 20:38 ` [PATCH v2 11/13] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules Sean Paul
2021-09-17  3:51   ` Stephen Boyd
2021-09-15 20:38 ` Sean Paul [this message]
2021-09-16 12:21   ` [PATCH v2 12/13] dt-bindings: msm/dp: Add bindings for HDCP registers Rob Herring
2021-09-16 12:58   ` Rob Herring
2021-09-15 20:38 ` [PATCH v2 13/13] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers Sean Paul
2021-09-17  6:00   ` Stephen Boyd
2021-09-17 21:05     ` Sean Paul
2021-09-22  2:25   ` [Freedreno] " abhinavk
2021-09-28 18:02     ` Sean Paul
2021-09-28 21:35       ` abhinavk
2021-09-29 14:52         ` Sean Paul

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