From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FE7BC433F5 for ; Wed, 6 Oct 2021 19:39:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 032E4611C3 for ; Wed, 6 Oct 2021 19:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239632AbhJFTkz (ORCPT ); Wed, 6 Oct 2021 15:40:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239552AbhJFTkl (ORCPT ); Wed, 6 Oct 2021 15:40:41 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AA4CC061755 for ; Wed, 6 Oct 2021 12:38:44 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id u7so3247783pfg.13 for ; Wed, 06 Oct 2021 12:38:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5Xg9zrUyKFMa3ddbem3zPmmRQ2IkXwWBatRdclbFjwA=; b=kvwXt6r49WGoKov+1kI1YQK6kLMveUPCoAiuryNLL6xUFBMjdpH1ukw3oV2k5sLg6I dHeQY2F+HemCVFPE3sVuz6U0zd+8VMt9aRLOKI0S7NmYBQQMlsfJxyNxP7XJ2wmmDZEW 7MSIJ5B0mlWDqqFeK+H26hmoLDYHLgkSf6Ne8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5Xg9zrUyKFMa3ddbem3zPmmRQ2IkXwWBatRdclbFjwA=; b=XCFY3QYPAEBgcCrT23kz/HMYtTA1v9psUT0q8wGtZpA3orFfaQx9b3b/ZHNu5RNvBM uV61CI63VEPbhgKbQHOEXxXCZ3Dcrtge174ws6gr+uWW2NHbPNtPrYMasg6nnLZAS5VO oKimTwKDkHg74o6GqBJf9mbixEaa0VFWCf2q9QzSoRaABxZ8N5YtpJYMeM2cJip0CNJG 0FKtZBhRwXw7xS0qjkIJiN0j3eBPrl/Fp4Pf06z9sTT+BmCJPx1g3er843dmhRLzpsR5 vfuwys5vfW+EftUd0ROE1gjUSrXFOEHsi5uO+yiTnxIFIWMcBAZT+mIfWMzeszoH/v+a BekQ== X-Gm-Message-State: AOAM530wHJ3ZAfs4t/rnbsosBDboYGweP5O4gzrtwdZDPF2zhofwtWgD 5XZurzyIC/BiLMJG/vPF/nke0w== X-Google-Smtp-Source: ABdhPJzVkIe0DAPOcORreiyVWMRdY6kKLr2qmge4E5lIHIpmMVTq5jsGVxJU0ygld5tw2RtEtmUK1g== X-Received: by 2002:a05:6a00:216f:b0:44b:6212:4967 with SMTP id r15-20020a056a00216f00b0044b62124967mr39153114pff.23.1633549123847; Wed, 06 Oct 2021 12:38:43 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:d412:c5eb:4aca:4738]) by smtp.gmail.com with ESMTPSA id o14sm22011296pfh.84.2021.10.06.12.38.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 12:38:43 -0700 (PDT) From: Stephen Boyd To: Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Neil Armstrong , Daniel Vetter , "Rafael J. Wysocki" , Rob Clark , Russell King , Saravana Kannan Subject: [PATCH v2 18/34] drm/meson: Migrate to aggregate driver Date: Wed, 6 Oct 2021 12:38:03 -0700 Message-Id: <20211006193819.2654854-19-swboyd@chromium.org> X-Mailer: git-send-email 2.33.0.800.g4c38ced690-goog In-Reply-To: <20211006193819.2654854-1-swboyd@chromium.org> References: <20211006193819.2654854-1-swboyd@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use an aggregate driver instead of component ops so that we can get proper driver probe ordering of the aggregate device with respect to all the component devices that make up the aggregate device. Cc: Neil Armstrong Cc: Daniel Vetter Cc: "Rafael J. Wysocki" Cc: Rob Clark Cc: Russell King Cc: Saravana Kannan Signed-off-by: Stephen Boyd --- drivers/gpu/drm/meson/meson_drv.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c index bc0d60df04ae..109fb9d057e3 100644 --- a/drivers/gpu/drm/meson/meson_drv.c +++ b/drivers/gpu/drm/meson/meson_drv.c @@ -357,13 +357,16 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) return ret; } -static int meson_drv_bind(struct device *dev) +static int meson_drv_bind(struct aggregate_device *adev) { + struct device *dev = adev->parent; + return meson_drv_bind_master(dev, true); } -static void meson_drv_unbind(struct device *dev) +static void meson_drv_unbind(struct aggregate_device *adev) { + struct device *dev = adev->parent; struct meson_drm *priv = dev_get_drvdata(dev); struct drm_device *drm = priv->drm; @@ -387,9 +390,13 @@ static void meson_drv_unbind(struct device *dev) } } -static const struct component_master_ops meson_drv_master_ops = { - .bind = meson_drv_bind, - .unbind = meson_drv_unbind, +static struct aggregate_driver meson_aggregate_drv = { + .probe = meson_drv_bind, + .remove = meson_drv_unbind, + .driver = { + .name = "meson_drm", + .owner = THIS_MODULE, + }, }; static int __maybe_unused meson_drv_pm_suspend(struct device *dev) @@ -503,9 +510,7 @@ static int meson_drv_probe(struct platform_device *pdev) if (count) { dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); - return component_master_add_with_match(&pdev->dev, - &meson_drv_master_ops, - match); + return component_aggregate_register(&pdev->dev, &meson_aggregate_drv, match); } /* If no output endpoints were available, simply bail out */ -- https://chromeos.dev