* [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting
@ 2021-10-06 20:48 Dmitry Baryshkov
2021-10-06 20:48 ` [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-10-19 23:34 ` [Freedreno] [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting abhinavk
0 siblings, 2 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2021-10-06 20:48 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
Move DPHY/CPHY setting from msm_dsi_host_set_src_pll() to new function
msm_dsi_host_set_phy_mode().
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 ++
drivers/gpu/drm/msm/dsi/dsi_host.c | 8 ++++++++
drivers/gpu/drm/msm/dsi/dsi_manager.c | 3 +++
3 files changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index b50db91cb8a7..7dfb6d198ca9 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -118,6 +118,8 @@ unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host);
struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
int msm_dsi_host_register(struct mipi_dsi_host *host, bool check_defer);
void msm_dsi_host_unregister(struct mipi_dsi_host *host);
+void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
+ struct msm_dsi_phy *src_phy);
int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
struct msm_dsi_phy *src_phy);
void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index e269df285136..1ffcd0577e99 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -2224,6 +2224,14 @@ void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, u32 dma_base,
wmb();
}
+void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
+ struct msm_dsi_phy *src_phy)
+{
+ struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
+
+ msm_host->cphy_mode = src_phy->cphy_mode;
+}
+
int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
struct msm_dsi_phy *src_phy)
{
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index c41d39f5b7cf..49a0a0841487 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -77,6 +77,7 @@ static int dsi_mgr_setup_components(int id)
return ret;
msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
+ msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
} else if (!other_dsi) {
ret = 0;
@@ -104,6 +105,8 @@ static int dsi_mgr_setup_components(int id)
MSM_DSI_PHY_MASTER);
msm_dsi_phy_set_usecase(clk_slave_dsi->phy,
MSM_DSI_PHY_SLAVE);
+ msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
+ msm_dsi_host_set_phy_mode(other_dsi->host, other_dsi->phy);
ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
if (ret)
return ret;
--
2.33.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually
2021-10-06 20:48 [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting Dmitry Baryshkov
@ 2021-10-06 20:48 ` Dmitry Baryshkov
2021-10-19 23:35 ` [Freedreno] " abhinavk
2021-10-19 23:34 ` [Freedreno] [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting abhinavk
1 sibling, 1 reply; 4+ messages in thread
From: Dmitry Baryshkov @ 2021-10-06 20:48 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Jonathan Marek, Stephen Boyd, David Airlie, Daniel Vetter,
linux-arm-msm, dri-devel, freedreno
There is no reason to set clock parents manually, use device tree to
assign DSI/display clock parents to DSI PHY clocks. Dropping this manual
setup allows us to drop repeating code and to move registration of hw
clock providers to generic place.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/dsi/dsi.h | 2 -
drivers/gpu/drm/msm/dsi/dsi_host.c | 53 ---------------------------
drivers/gpu/drm/msm/dsi/dsi_manager.c | 11 +-----
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 11 ------
4 files changed, 2 insertions(+), 75 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 7dfb6d198ca9..c03a8d09c764 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -173,8 +173,6 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
enum msm_dsi_phy_usecase uc);
-int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
- struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct msm_dsi_phy *phy);
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 1ffcd0577e99..9600b4fa27eb 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -2232,59 +2232,6 @@ void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
msm_host->cphy_mode = src_phy->cphy_mode;
}
-int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
- struct msm_dsi_phy *src_phy)
-{
- struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
- struct clk *byte_clk_provider, *pixel_clk_provider;
- int ret;
-
- msm_host->cphy_mode = src_phy->cphy_mode;
-
- ret = msm_dsi_phy_get_clk_provider(src_phy,
- &byte_clk_provider, &pixel_clk_provider);
- if (ret) {
- pr_info("%s: can't get provider from pll, don't set parent\n",
- __func__);
- return 0;
- }
-
- ret = clk_set_parent(msm_host->byte_clk_src, byte_clk_provider);
- if (ret) {
- pr_err("%s: can't set parent to byte_clk_src. ret=%d\n",
- __func__, ret);
- goto exit;
- }
-
- ret = clk_set_parent(msm_host->pixel_clk_src, pixel_clk_provider);
- if (ret) {
- pr_err("%s: can't set parent to pixel_clk_src. ret=%d\n",
- __func__, ret);
- goto exit;
- }
-
- if (msm_host->dsi_clk_src) {
- ret = clk_set_parent(msm_host->dsi_clk_src, pixel_clk_provider);
- if (ret) {
- pr_err("%s: can't set parent to dsi_clk_src. ret=%d\n",
- __func__, ret);
- goto exit;
- }
- }
-
- if (msm_host->esc_clk_src) {
- ret = clk_set_parent(msm_host->esc_clk_src, byte_clk_provider);
- if (ret) {
- pr_err("%s: can't set parent to esc_clk_src. ret=%d\n",
- __func__, ret);
- goto exit;
- }
- }
-
-exit:
- return ret;
-}
-
void msm_dsi_host_reset_phy(struct mipi_dsi_host *host)
{
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c b/drivers/gpu/drm/msm/dsi/dsi_manager.c
index 49a0a0841487..9342a822ad20 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
@@ -78,10 +78,7 @@ static int dsi_mgr_setup_components(int id)
msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
- ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
- } else if (!other_dsi) {
- ret = 0;
- } else {
+ } else if (other_dsi) {
struct msm_dsi *master_link_dsi = IS_MASTER_DSI_LINK(id) ?
msm_dsi : other_dsi;
struct msm_dsi *slave_link_dsi = IS_MASTER_DSI_LINK(id) ?
@@ -107,13 +104,9 @@ static int dsi_mgr_setup_components(int id)
MSM_DSI_PHY_SLAVE);
msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
msm_dsi_host_set_phy_mode(other_dsi->host, other_dsi->phy);
- ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
- if (ret)
- return ret;
- ret = msm_dsi_host_set_src_pll(other_dsi->host, clk_master_dsi->phy);
}
- return ret;
+ return 0;
}
static int enable_phy(struct msm_dsi *msm_dsi,
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index 8c65ef6968ca..8ec331e751a2 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -890,17 +890,6 @@ bool msm_dsi_phy_set_continuous_clock(struct msm_dsi_phy *phy, bool enable)
return phy->cfg->ops.set_continuous_clock(phy, enable);
}
-int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
- struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
-{
- if (byte_clk_provider)
- *byte_clk_provider = phy->provided_clocks->hws[DSI_BYTE_PLL_CLK]->clk;
- if (pixel_clk_provider)
- *pixel_clk_provider = phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
-
- return 0;
-}
-
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
{
if (phy->cfg->ops.save_pll_state) {
--
2.33.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Freedreno] [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting
2021-10-06 20:48 [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting Dmitry Baryshkov
2021-10-06 20:48 ` [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
@ 2021-10-19 23:34 ` abhinavk
1 sibling, 0 replies; 4+ messages in thread
From: abhinavk @ 2021-10-19 23:34 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Rob Clark, Sean Paul, Jonathan Marek,
Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
On 2021-10-06 13:48, Dmitry Baryshkov wrote:
> Move DPHY/CPHY setting from msm_dsi_host_set_src_pll() to new function
> msm_dsi_host_set_phy_mode().
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Just a minor comment, can you also include the part which removes
msm_host->cphy_mode = src_phy->cphy_mode; from msm_dsi_host_set_src_pll
in this change itself so that its clear that you are removing from there
and moving it into a new API?
You can still keep my
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
once you address this.
> ---
> drivers/gpu/drm/msm/dsi/dsi.h | 2 ++
> drivers/gpu/drm/msm/dsi/dsi_host.c | 8 ++++++++
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 3 +++
> 3 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index b50db91cb8a7..7dfb6d198ca9 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -118,6 +118,8 @@ unsigned long msm_dsi_host_get_mode_flags(struct
> mipi_dsi_host *host);
> struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host
> *host);
> int msm_dsi_host_register(struct mipi_dsi_host *host, bool
> check_defer);
> void msm_dsi_host_unregister(struct mipi_dsi_host *host);
> +void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
> + struct msm_dsi_phy *src_phy);
> int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
> struct msm_dsi_phy *src_phy);
> void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
> b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index e269df285136..1ffcd0577e99 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -2224,6 +2224,14 @@ void msm_dsi_host_cmd_xfer_commit(struct
> mipi_dsi_host *host, u32 dma_base,
> wmb();
> }
>
> +void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
> + struct msm_dsi_phy *src_phy)
> +{
> + struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> +
> + msm_host->cphy_mode = src_phy->cphy_mode;
> +}
> +
> int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
> struct msm_dsi_phy *src_phy)
> {
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index c41d39f5b7cf..49a0a0841487 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -77,6 +77,7 @@ static int dsi_mgr_setup_components(int id)
> return ret;
>
> msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
> + msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
> ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
> } else if (!other_dsi) {
> ret = 0;
> @@ -104,6 +105,8 @@ static int dsi_mgr_setup_components(int id)
> MSM_DSI_PHY_MASTER);
> msm_dsi_phy_set_usecase(clk_slave_dsi->phy,
> MSM_DSI_PHY_SLAVE);
> + msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
> + msm_dsi_host_set_phy_mode(other_dsi->host, other_dsi->phy);
> ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
> if (ret)
> return ret;
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Freedreno] [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually
2021-10-06 20:48 ` [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
@ 2021-10-19 23:35 ` abhinavk
0 siblings, 0 replies; 4+ messages in thread
From: abhinavk @ 2021-10-19 23:35 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Rob Clark, Sean Paul, Jonathan Marek,
Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
On 2021-10-06 13:48, Dmitry Baryshkov wrote:
> There is no reason to set clock parents manually, use device tree to
> assign DSI/display clock parents to DSI PHY clocks. Dropping this
> manual
> setup allows us to drop repeating code and to move registration of hw
> clock providers to generic place.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
I believe this was reviewed previously on
https://patchwork.freedesktop.org/patch/443470/
Hence,
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
> drivers/gpu/drm/msm/dsi/dsi.h | 2 -
> drivers/gpu/drm/msm/dsi/dsi_host.c | 53 ---------------------------
> drivers/gpu/drm/msm/dsi/dsi_manager.c | 11 +-----
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 11 ------
> 4 files changed, 2 insertions(+), 75 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi.h
> b/drivers/gpu/drm/msm/dsi/dsi.h
> index 7dfb6d198ca9..c03a8d09c764 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi.h
> +++ b/drivers/gpu/drm/msm/dsi/dsi.h
> @@ -173,8 +173,6 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
> void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
> void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
> enum msm_dsi_phy_usecase uc);
> -int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
> - struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
> void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
> int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
> void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct
> msm_dsi_phy *phy);
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
> b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 1ffcd0577e99..9600b4fa27eb 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -2232,59 +2232,6 @@ void msm_dsi_host_set_phy_mode(struct
> mipi_dsi_host *host,
> msm_host->cphy_mode = src_phy->cphy_mode;
> }
>
> -int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
> - struct msm_dsi_phy *src_phy)
> -{
> - struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> - struct clk *byte_clk_provider, *pixel_clk_provider;
> - int ret;
> -
> - msm_host->cphy_mode = src_phy->cphy_mode;
> -
> - ret = msm_dsi_phy_get_clk_provider(src_phy,
> - &byte_clk_provider, &pixel_clk_provider);
> - if (ret) {
> - pr_info("%s: can't get provider from pll, don't set parent\n",
> - __func__);
> - return 0;
> - }
> -
> - ret = clk_set_parent(msm_host->byte_clk_src, byte_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to byte_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> -
> - ret = clk_set_parent(msm_host->pixel_clk_src, pixel_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to pixel_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> -
> - if (msm_host->dsi_clk_src) {
> - ret = clk_set_parent(msm_host->dsi_clk_src, pixel_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to dsi_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> - }
> -
> - if (msm_host->esc_clk_src) {
> - ret = clk_set_parent(msm_host->esc_clk_src, byte_clk_provider);
> - if (ret) {
> - pr_err("%s: can't set parent to esc_clk_src. ret=%d\n",
> - __func__, ret);
> - goto exit;
> - }
> - }
> -
> -exit:
> - return ret;
> -}
> -
> void msm_dsi_host_reset_phy(struct mipi_dsi_host *host)
> {
> struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> index 49a0a0841487..9342a822ad20 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_manager.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_manager.c
> @@ -78,10 +78,7 @@ static int dsi_mgr_setup_components(int id)
>
> msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
> msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
> - ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
> - } else if (!other_dsi) {
> - ret = 0;
> - } else {
> + } else if (other_dsi) {
> struct msm_dsi *master_link_dsi = IS_MASTER_DSI_LINK(id) ?
> msm_dsi : other_dsi;
> struct msm_dsi *slave_link_dsi = IS_MASTER_DSI_LINK(id) ?
> @@ -107,13 +104,9 @@ static int dsi_mgr_setup_components(int id)
> MSM_DSI_PHY_SLAVE);
> msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
> msm_dsi_host_set_phy_mode(other_dsi->host, other_dsi->phy);
> - ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
> - if (ret)
> - return ret;
> - ret = msm_dsi_host_set_src_pll(other_dsi->host,
> clk_master_dsi->phy);
> }
>
> - return ret;
> + return 0;
> }
>
> static int enable_phy(struct msm_dsi *msm_dsi,
> diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> index 8c65ef6968ca..8ec331e751a2 100644
> --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
> @@ -890,17 +890,6 @@ bool msm_dsi_phy_set_continuous_clock(struct
> msm_dsi_phy *phy, bool enable)
> return phy->cfg->ops.set_continuous_clock(phy, enable);
> }
>
> -int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
> - struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
> -{
> - if (byte_clk_provider)
> - *byte_clk_provider =
> phy->provided_clocks->hws[DSI_BYTE_PLL_CLK]->clk;
> - if (pixel_clk_provider)
> - *pixel_clk_provider =
> phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
> -
> - return 0;
> -}
> -
> void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
> {
> if (phy->cfg->ops.save_pll_state) {
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-10-19 23:36 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-06 20:48 [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting Dmitry Baryshkov
2021-10-06 20:48 ` [PATCH 2/2] drm/msm/dsi: stop setting clock parents manually Dmitry Baryshkov
2021-10-19 23:35 ` [Freedreno] " abhinavk
2021-10-19 23:34 ` [Freedreno] [PATCH 1/2] drm/msm/dsi: untangle cphy setting from the src pll setting abhinavk
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).