From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org
Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
robh+dt@kernel.org, agross@kernel.org,
herbert@gondor.apana.org.au, davem@davemloft.net,
Thara Gopinath <thara.gopinath@linaro.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>
Subject: [PATCH 2/2] arm64/dts: qcom: sm8150: Add dt entries to support crypto engine.
Date: Wed, 13 Oct 2021 22:28:23 +0530 [thread overview]
Message-ID: <20211013165823.88123-3-bhupesh.sharma@linaro.org> (raw)
In-Reply-To: <20211013165823.88123-1-bhupesh.sharma@linaro.org>
Add crypto engine (CE) and CE BAM related nodes and definitions to
"sm8150.dtsi".
Cc: Thara Gopinath <thara.gopinath@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index ef0232c2cf45..2f7ce1fdad55 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3549,6 +3549,34 @@ wifi: wifi@18800000 {
iommus = <&apps_smmu 0x0640 0x1>;
status = "disabled";
};
+
+ cryptobam: dma-controller@1dc4000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0 0x01dc4000 0 0x24000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x504 0x0011>,
+ <&apps_smmu 0x506 0x0011>,
+ <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "memory";
+ };
+
+ crypto: crypto@1dfa000 {
+ compatible = "qcom,sm8150-qce";
+ reg = <0 0x01dfa000 0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x504 0x0011>,
+ <&apps_smmu 0x506 0x0011>,
+ <&apps_smmu 0x514 0x0011>,
+ <&apps_smmu 0x516 0x0011>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnect-names = "memory";
+ };
};
timer {
--
2.31.1
prev parent reply other threads:[~2021-10-13 16:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-13 16:58 [PATCH 0/2] Enable Qualcomm Crypto Engine on sm8150 Bhupesh Sharma
2021-10-13 16:58 ` [PATCH 1/2] crypto: qce: Add 'sm8150-qce' compatible string check Bhupesh Sharma
2021-10-24 17:18 ` Bjorn Andersson
2021-10-24 17:59 ` Bhupesh Sharma
2021-10-24 23:19 ` Bjorn Andersson
2021-10-13 16:58 ` Bhupesh Sharma [this message]
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