From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F1DEC433EF for ; Sun, 15 May 2022 14:45:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237176AbiEOOp1 (ORCPT ); Sun, 15 May 2022 10:45:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233130AbiEOOp1 (ORCPT ); Sun, 15 May 2022 10:45:27 -0400 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [5.144.164.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED4DDAE53; Sun, 15 May 2022 07:45:25 -0700 (PDT) Received: from SoMainline.org (94-209-165-62.cable.dynamic.v4.ziggo.nl [94.209.165.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 065933F644; Sun, 15 May 2022 16:45:23 +0200 (CEST) Date: Sun, 15 May 2022 16:45:22 +0200 From: Marijn Suijten To: Dmitry Baryshkov Cc: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 01/12] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Message-ID: <20220515144522.5eifojxkqat5hnjg@SoMainline.org> References: <20220514190138.3179964-1-dmitry.baryshkov@linaro.org> <20220514190138.3179964-2-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220514190138.3179964-2-dmitry.baryshkov@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2022-05-14 22:01:27, Dmitry Baryshkov wrote: > Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. > They should be enabled in the board DT files. No existing boards use > them at this moment. > > Suggested-by: Marijn Suijten > Reviewed-by: Konrad Dybcio > Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten > --- > arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index 240293592ef9..8697d40e9b74 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 { > phys = <&dsi0_phy>; > phy-names = "dsi"; > > + status = "disabled"; > + > ports { > #address-cells = <1>; > #size-cells = <0>; > @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 { > > clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>; > clock-names = "iface", "ref"; > + status = "disabled"; > }; > }; > > -- > 2.35.1 >