From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Stephen Boyd <swboyd@chromium.org>,
Michael Turquette <mturquette@baylibre.com>,
Taniya Das <quic_tdas@quicinc.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-clk@vger.kernel.org
Subject: [PATCH 2/2] phy: qcom-qmp-ufs: provide symbol clocks
Date: Mon, 20 Jun 2022 18:39:56 +0300 [thread overview]
Message-ID: <20220620153956.1723269-2-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220620153956.1723269-1-dmitry.baryshkov@linaro.org>
Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
provider to let other devices link these clocks through the DT.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 55 +++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index a2526068232b..0f31d3255897 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1167,6 +1167,54 @@ static int qcom_qmp_phy_ufs_clk_init(struct device *dev, const struct qmp_phy_cf
return devm_clk_bulk_get(dev, num, qmp->clks);
}
+static void phy_clk_release_provider(void *res)
+{
+ of_clk_del_provider(res);
+}
+
+#define UFS_SYMBOL_CLOCKS 3
+
+static int phy_symbols_clk_register(struct qcom_qmp *qmp, struct device_node *np)
+{
+ struct clk_hw_onecell_data *clk_data;
+ struct clk_hw *hw;
+ int ret;
+
+ clk_data = devm_kzalloc(qmp->dev, struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS), GFP_KERNEL);
+ clk_data->num = UFS_SYMBOL_CLOCKS;
+
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_rx_symbol_0_clk_src",
+ NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[0] = hw;
+
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_rx_symbol_1_clk_src",
+ NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[1] = hw;
+
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, "ufs_tx_symbol_0_clk_src",
+ NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[2] = hw;
+
+ ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
+ if (ret)
+ return ret;
+
+ /*
+ * Roll a devm action because the clock provider is the child node, but
+ * the child node is not actually a device.
+ */
+ return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np);
+}
+
static const struct phy_ops qcom_qmp_ufs_ops = {
.power_on = qcom_qmp_phy_ufs_enable,
.power_off = qcom_qmp_phy_ufs_disable,
@@ -1358,6 +1406,13 @@ static int qcom_qmp_phy_ufs_probe(struct platform_device *pdev)
goto err_node_put;
}
+ ret = phy_symbols_clk_register(qmp, child);
+ if (ret) {
+ dev_err(dev, "failed to create symbol clocks, %d\n",
+ ret);
+ goto err_node_put;
+ }
+
id++;
}
--
2.35.1
next prev parent reply other threads:[~2022-06-20 15:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-20 15:39 [PATCH 1/2] clk: fixed-rate: add devm_clk_hw_register_fixed_rate Dmitry Baryshkov
2022-06-20 15:39 ` Dmitry Baryshkov [this message]
2022-06-24 1:09 ` [PATCH 2/2] phy: qcom-qmp-ufs: provide symbol clocks Stephen Boyd
2022-07-07 7:38 ` Johan Hovold
2022-06-24 1:10 ` [PATCH 1/2] clk: fixed-rate: add devm_clk_hw_register_fixed_rate Stephen Boyd
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