From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6CC2ECAAD3 for ; Mon, 19 Sep 2022 19:56:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbiIST4a (ORCPT ); Mon, 19 Sep 2022 15:56:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229519AbiIST43 (ORCPT ); Mon, 19 Sep 2022 15:56:29 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D78243E54 for ; Mon, 19 Sep 2022 12:56:28 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id y11so724268pjv.4 for ; Mon, 19 Sep 2022 12:56:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date; bh=ssLW3dQ3xc0Fl+071JBbbZVKqOeptuuJZEn+QOUu0sw=; b=GMtOnGTRKPwez2FHpi2qRG9AiD5Q/eDP2JDuzZvopYHeHtNHB8x+Rcx4s+45xQ9Gao 3fbXooWo7EMKFZjtN5fv7dFBw+wk/8r891PrgsNF+eUAhkRQl2L90clHgXv68CL8q+hJ f2mIM95BfYJdBJ4x1S5sTlnQoN5YLxdK27JQ7d0D+3ZbtSCl7arP94aBZV/hXOWWE/Xp v5GZoJhZPvVvE4E5goVdbE+mCUi3N0ag4sXSfUu/+t3REwAKNPgpq2Ym1/31JYjrR4Z9 v4ww1eYRscdjOTeqORnJLLTNRfk+RrKCcTH+5nawRxku2POFjrQfbr8/qJqCeEvKv9hV 1Rlw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date; bh=ssLW3dQ3xc0Fl+071JBbbZVKqOeptuuJZEn+QOUu0sw=; b=cu9ZX5mHMBjqQlEylIs00JO+OIBwGPNgD1gbZ4hZI6z1sXurTC5jagVuAI/d33saJz CTD7Lz7vDBSv6XO0TyoBOYjWaE58n1MIdaeQw/4lgktprAmTYxGGAy86aUx+FBEaVwMc XsfDuNMlLk7npidZo7BAIEjlj0O2ASjt5rqTO5UWqetoF5KCIiKwJp+xtt/2eFHjBomh cUJvExVgOU8Cz7iAngHA8PpJET600CTf1lD3InhOtIT+06UHQa74h9bgf4dnzKgx0SaJ ZT6PH4BYwKq0Zc38fZV5Sa4b/ka8dn+8zZ/1TsuU5KJsQZtICaJQtal1fqR23ucfXomG XolA== X-Gm-Message-State: ACrzQf1WxuIQ3vm63MVP1EtWEhVllKSPr5ee1utPLrUQS0bFNO2Dj4TT edDC1KhKqKGY0oxTAL4ezAmGoA== X-Google-Smtp-Source: AMsMyM5mSPg4SLFhzWzJlL9YF63jk64sbMZAil7KlR8SlBrq7wCZ4+L0X+SNvmYKCamsJaLgpum3aA== X-Received: by 2002:a17:902:7b90:b0:178:a983:5983 with SMTP id w16-20020a1709027b9000b00178a9835983mr1324050pll.135.1663617387915; Mon, 19 Sep 2022 12:56:27 -0700 (PDT) Received: from localhost.localdomain ([2401:4900:1c61:6535:ca5f:67d1:670d:e188]) by smtp.gmail.com with ESMTPSA id a14-20020a17090a688e00b002032bda9a5dsm7071454pjd.41.2022.09.19.12.56.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Sep 2022 12:56:27 -0700 (PDT) From: Bhupesh Sharma To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, thara.gopinath@gmail.com, robh@kernel.org, krzysztof.kozlowski@linaro.org, andersson@kernel.org, bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, Jordan Crouse Subject: [PATCH v6 0/4] dt-bindings: qcom-qce: Convert bindings to yaml & related changes Date: Tue, 20 Sep 2022 01:26:14 +0530 Message-Id: <20220919195618.926227-1-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Changes since v5: ================= - v5 can be seen here: https://lore.kernel.org/lkml/20211110105922.217895-1-bhupesh.sharma@linaro.org/ - As per Bjorn's suggestion on irc, broke down the patchset into 4 separate patchsets, one each for the following areas to allow easier review and handling from the respective maintainer(s): 'arm-msm', 'crypto', 'dma' and 'devicetree' This patchset is directed for the 'devicetree' tree / area. - Addressed Rob's, Vladimir's and Bjorn's review comments and Acks received on v5. - Added Tested-by from Jordan received on the v5. - Dropped '[PATCH v5 09/22] dt-bindings: qcom-qce: Move 'clocks' to optional properties' from this series as per Bjorn's suggestions. Changes since v4: ================= - v4 for sm8250 can be seen here: https://lore.kernel.org/linux-arm-msm/20211013105541.68045-1-bhupesh.sharma@linaro.org/ - v1 for sm8150 qce enablement can be seen here: https://lore.kernel.org/linux-arm-msm/20211013165823.88123-1-bhupesh.sharma@linaro.org/ - Merged the sm8150 and sm8250 enablement patches in the same patchset, as per suggestions from Bjorn. - Dropped a couple of patches from v4, as these have been picked by Bjorn already via his tree. - Addressed review comments from Vladimir, Thara and Rob. - Collect Reviewed-by from Rob and Thara on some of the patches from the v4 patchset. Changes since v3: ================= - v3 can be seen here: https://lore.kernel.org/linux-arm-msm/20210519143700.27392-1-bhupesh.sharma@linaro.org/ - Dropped a couple of patches from v3, on basis of the review comments: ~ [PATCH 13/17] crypto: qce: core: Make clocks optional ~ [PATCH 15/17] crypto: qce: Convert the device found dev_dbg() to dev_info() - Addressed review comments from Thara, Rob and Stephan Gerhold. - Collect Reviewed-by from Rob and Thara on some of the patches from the v3 patchset. Changes since v2: ================= - v2 can be seen here: https://lore.kernel.org/dmaengine/20210505213731.538612-1-bhupesh.sharma@linaro.org/ - Drop a couple of patches from v1, which tried to address the defered probing of qce driver in case bam dma driver is not yet probed. Replace it instead with a single (simpler) patch [PATCH 16/17]. - Convert bam dma and qce crypto dt-bindings to YAML. - Addressed review comments from Thara, Bjorn, Vinod and Rob. Changes since v1: ================= - v1 can be seen here: https://lore.kernel.org/linux-arm-msm/20210310052503.3618486-1-bhupesh.sharma@linaro.org/ - v1 did not work well as reported earlier by Dmitry, so v2 contains the following changes/fixes: ~ Enable the interconnect path b/w BAM DMA and main memory first before trying to access the BAM DMA registers. ~ Enable the interconnect path b/w qce crytpo and main memory first before trying to access the qce crypto registers. ~ Make sure to document the required and optional properties for both BAM DMA and qce crypto drivers. ~ Add a few debug related print messages in case the qce crypto driver passes or fails to probe. ~ Convert the qce crypto driver probe to a defered one in case the BAM DMA or the interconnect driver(s) (needed on specific Qualcomm parts) are not yet probed. Qualcomm crypto engine (qce) is available on several Snapdragon SoCs. The qce block supports hardware accelerated algorithms for encryption and authentication. It also provides support for aes, des, 3des encryption algorithms and sha1, sha256, hmac(sha1), hmac(sha256) authentication algorithms. Cc: thara.gopinath@gmail.com Cc: robh@kernel.org Cc: andersson@kernel.org Cc: krzysztof.kozlowski@linaro.org Tested-by: Jordan Crouse Bhupesh Sharma (4): dt-bindings: qcom-qce: Convert bindings to yaml dt-bindings: qcom-qce: Add 'interconnects' and 'interconnect-names' dt-bindings: qcom-qce: Add 'iommus' to optional properties dt-bindings: qcom-qce: Add new SoC compatible strings in dt-binding doc .../devicetree/bindings/crypto/qcom-qce.txt | 25 ----- .../devicetree/bindings/crypto/qcom-qce.yaml | 93 +++++++++++++++++++ 2 files changed, 93 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.txt create mode 100644 Documentation/devicetree/bindings/crypto/qcom-qce.yaml -- 2.37.1