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From: Hemant Kumar <hemantk@codeaurora.org>
To: Loic Poulain <loic.poulain@linaro.org>, mani@kernel.org
Cc: linux-arm-msm@vger.kernel.org, bbhatt@codeaurora.org
Subject: Re: [PATCH v2] bus: mhi: core: Fix power down latency
Date: Mon, 3 May 2021 16:44:55 -0700	[thread overview]
Message-ID: <2b901961-b33d-1c63-8fde-c92e102aa48d@codeaurora.org> (raw)
In-Reply-To: <1620029090-8975-1-git-send-email-loic.poulain@linaro.org>



On 5/3/21 1:04 AM, Loic Poulain wrote:
> On graceful power-down/disable transition, when an MHI reset is
> performed, the MHI device loses its context, including interrupt
> configuration. However, the current implementation is waiting for
> event(irq) driven state change to confirm reset has been completed,
> which never happens, and causes reset timeout, leading to unexpected
> high latency of the mhi_power_down procedure (up to 45 seconds).
> 
> Fix that by moving to the recently introduced poll_reg_field method,
> waiting for the reset bit to be cleared, in the same way as the
> power_on procedure.
> 
> Fixes: a6e2e3522f29 ("bus: mhi: core: Add support for PM state transitions")
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

Reviewed-by: Hemant Kumar <hemantk@codeaurora.org>

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  parent reply	other threads:[~2021-05-03 23:45 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-03  8:04 [PATCH v2] bus: mhi: core: Fix power down latency Loic Poulain
2021-05-03  8:06 ` Loic Poulain
2021-05-03 17:01 ` Bhaumik Bhatt
2021-05-03 23:44 ` Hemant Kumar [this message]
2021-05-21 12:29 ` Manivannan Sadhasivam
2021-05-21 17:39 ` Manivannan Sadhasivam

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