From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
To: Stephen Boyd <sboyd@kernel.org>, agross@kernel.org
Cc: bjorn.andersson@linaro.org, mturquette@baylibre.com,
robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org,
konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org
Subject: Re: [PATCH v2 5/9] clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers
Date: Thu, 11 Feb 2021 22:46:14 +0100 [thread overview]
Message-ID: <2fb677ae-03ac-58a9-4b6e-c0c40b9a8e0d@somainline.org> (raw)
In-Reply-To: <161307478271.1254594.18219937886787415438@swboyd.mtv.corp.google.com>
Il 11/02/21 21:19, Stephen Boyd ha scritto:
> Quoting AngeloGioacchino Del Regno (2021-01-13 10:38:13)
>> The function clk_gfx3d_determine_rate is selecting different PLLs
>> to manage the GFX3D clock source in a special way: this one needs
>> to be ping-pong'ed on different PLLs to ensure stability during
>> frequency switching (set a PLL rate, let it stabilize, switch the
>> RCG to the new PLL) and fast frequency transitions.
>>
>> This technique is currently being used in the MSM8996 SoC and the
>> function was assuming that the parents were always at a specific
>> index in the parents list, which is TRUE, if we use this only on
>> the MSM8996 MMCC.
>> Unfortunately, MSM8996 is not the only SoC that needs to ping-pong
>> the graphics RCG, so choices are:
>> 1. Make new special ops just to hardcode *again* other indexes,
>> creating code duplication for (imo) no reason; or
>> 2. Generalize this function, so that it becomes usable for a range
>> of SoCs with slightly different ping-pong configuration.
>>
>> In this commit, the second road was taken: define a new "special"
>> struct clk_rcg2_gfx3d, containing the ordered list of parents to
>> ping-pong the graphics clock on, and the "regular" rcg2 clock
>> structure in order to generalize the clk_gfx3d_determine_rate
>> function and make it working for other SoCs.
>>
>> As for the function itself it is left with the assumption that we
>> need to ping-pong over three parents. The reasons for this are:
>> 1. The initial model was MSM8996, which has 3 parents for the
>> graphics clock pingpong;
>> 2. The other example that was taken into consideration is the
>> SDM630/636/660 SoC gpu clock controller, which is ping-ponging
>> over two dynamic clocked and one fixed clock PLL.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
>> ---
>
> Applied to clk-next but I modified it a bunch. Let me know if it doesn't
> work.
>
Will check asap!
next prev parent reply other threads:[~2021-02-11 21:46 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 18:38 [PATCH v2 0/9] SDM630/660 GCC/MMCC/GPUCC clock controllers AngeloGioacchino Del Regno
2021-01-13 18:38 ` [PATCH v2 1/9] clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 2/9] clk: qcom: gcc-sdm660: Mark GPU " AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 3/9] clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver AngeloGioacchino Del Regno
2021-01-26 13:39 ` Stanimir Varbanov
2021-01-26 14:11 ` AngeloGioacchino Del Regno
2021-02-08 13:51 ` Konrad Dybcio
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 4/9] dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc AngeloGioacchino Del Regno
2021-01-25 20:49 ` Rob Herring
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 5/9] clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers AngeloGioacchino Del Regno
2021-02-11 20:19 ` Stephen Boyd
2021-02-11 21:46 ` AngeloGioacchino Del Regno [this message]
2021-01-13 18:38 ` [PATCH v2 6/9] clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d AngeloGioacchino Del Regno
2021-01-26 14:31 ` Bjorn Andersson
2021-02-11 20:20 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 7/9] clk: qcom: gdsc: Implement NO_RET_PERIPH flag AngeloGioacchino Del Regno
2021-02-11 20:20 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 8/9] clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver AngeloGioacchino Del Regno
2021-02-11 20:21 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 9/9] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings AngeloGioacchino Del Regno
2021-01-25 21:03 ` Rob Herring
2021-02-11 20:21 ` Stephen Boyd
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