* [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells
@ 2023-06-02 6:20 Abel Vesa
2023-06-02 6:20 ` [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs Abel Vesa
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
Use two interconnect cells in order to optionally support a path tag.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes since v1:
* This patch was not part of v1
arch/arm64/boot/dts/qcom/sm8150.dtsi | 60 ++++++++++++++--------------
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 197c016aaeba..50a21062ea24 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -55,8 +55,8 @@ CPU0: cpu@0 {
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -84,8 +84,8 @@ CPU1: cpu@100 {
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -108,8 +108,8 @@ CPU2: cpu@200 {
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -132,8 +132,8 @@ CPU3: cpu@300 {
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -156,8 +156,8 @@ CPU4: cpu@400 {
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -180,8 +180,8 @@ CPU5: cpu@500 {
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -204,8 +204,8 @@ CPU6: cpu@600 {
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -228,8 +228,8 @@ CPU7: cpu@700 {
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 2>;
operating-points-v2 = <&cpu7_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
#cooling-cells = <2>;
@@ -1760,49 +1760,49 @@ spi15: spi@c94000 {
config_noc: interconnect@1500000 {
compatible = "qcom,sm8150-config-noc";
reg = <0 0x01500000 0 0x7400>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sm8150-system-noc";
reg = <0 0x01620000 0 0x19400>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@163a000 {
compatible = "qcom,sm8150-mc-virt";
reg = <0 0x0163a000 0 0x1000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8150-aggre1-noc";
reg = <0 0x016e0000 0 0xd080>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sm8150-aggre2-noc";
reg = <0 0x01700000 0 0x20000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1720000 {
compatible = "qcom,sm8150-compute-noc";
reg = <0 0x01720000 0 0x7000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sm8150-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -2120,7 +2120,7 @@ crypto: crypto@1dfa000 {
<&apps_smmu 0x506 0x0011>,
<&apps_smmu 0x508 0x0011>,
<&apps_smmu 0x512 0x0000>;
- interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "memory";
};
@@ -3547,14 +3547,14 @@ opp-202000000 {
dc_noc: interconnect@9160000 {
compatible = "qcom,sm8150-dc-noc";
reg = <0 0x09160000 0 0x3200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9680000 {
compatible = "qcom,sm8150-gem-noc";
reg = <0 0x09680000 0 0x3e200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -3659,7 +3659,7 @@ usb_2_dwc3: usb@a800000 {
camnoc_virt: interconnect@ac00000 {
compatible = "qcom,sm8150-camnoc-virt";
reg = <0 0x0ac00000 0 0x1000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -3668,8 +3668,8 @@ mdss: display-subsystem@ae00000 {
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";
- interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "mdp0-mem", "mdp1-mem";
power-domains = <&dispcc MDSS_GDSC>;
@@ -4334,7 +4334,7 @@ osm_l3: interconnect@18321000 {
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
};
cpufreq_hw: cpufreq@18323000 {
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
@ 2023-06-02 6:20 ` Abel Vesa
2023-06-02 9:19 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells Abel Vesa
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes since v1:
* None.
arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 50a21062ea24..18c822abdb88 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3595,6 +3595,10 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
@@ -3644,6 +3648,10 @@ usb_2: usb@a8f8800 {
resets = <&gcc GCC_USB30_SEC_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
2023-06-02 6:20 ` [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs Abel Vesa
@ 2023-06-02 6:20 ` Abel Vesa
2023-06-02 9:20 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs Abel Vesa
` (4 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
Use two interconnect cells in order to optionally support a path tag.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes since v1:
* This patch was not part of v1
arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++--------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index e5c60a6e4074..c5787489b05c 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -106,8 +106,8 @@ CPU0: cpu@0 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "cache";
@@ -137,8 +137,8 @@ CPU1: cpu@100 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_100: l2-cache {
compatible = "cache";
@@ -162,8 +162,8 @@ CPU2: cpu@200 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_200: l2-cache {
compatible = "cache";
@@ -187,8 +187,8 @@ CPU3: cpu@300 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_300: l2-cache {
compatible = "cache";
@@ -212,8 +212,8 @@ CPU4: cpu@400 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_400: l2-cache {
compatible = "cache";
@@ -237,8 +237,8 @@ CPU5: cpu@500 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_500: l2-cache {
compatible = "cache";
@@ -262,8 +262,8 @@ CPU6: cpu@600 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_600: l2-cache {
compatible = "cache";
@@ -287,8 +287,8 @@ CPU7: cpu@700 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 2>;
operating-points-v2 = <&cpu7_opp_table>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
- <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
#cooling-cells = <2>;
L2_700: l2-cache {
compatible = "cache";
@@ -1789,49 +1789,49 @@ spi13: spi@a94000 {
config_noc: interconnect@1500000 {
compatible = "qcom,sm8250-config-noc";
reg = <0 0x01500000 0 0xa580>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sm8250-system-noc";
reg = <0 0x01620000 0 0x1c200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@163d000 {
compatible = "qcom,sm8250-mc-virt";
reg = <0 0x0163d000 0 0x1000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8250-aggre1-noc";
reg = <0 0x016e0000 0 0x1f180>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sm8250-aggre2-noc";
reg = <0 0x01700000 0 0x33000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1733000 {
compatible = "qcom,sm8250-compute-noc";
reg = <0 0x01733000 0 0xa180>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sm8250-mmss-noc";
reg = <0 0x01740000 0 0x1f080>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -2260,7 +2260,7 @@ crypto: crypto@1dfa000 {
<&apps_smmu 0x59f 0x0000>,
<&apps_smmu 0x586 0x0011>,
<&apps_smmu 0x596 0x0011>;
- interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "memory";
};
@@ -3693,21 +3693,21 @@ opp-202000000 {
dc_noc: interconnect@90c0000 {
compatible = "qcom,sm8250-dc-noc";
reg = <0 0x090c0000 0 0x4200>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9100000 {
compatible = "qcom,sm8250-gem-noc";
reg = <0 0x09100000 0 0xb4000>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
npu_noc: interconnect@9990000 {
compatible = "qcom,sm8250-npu-noc";
reg = <0 0x09990000 0 0x1600>;
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
@@ -3837,8 +3837,8 @@ venus: video-codec@aa00000 {
<&videocc VIDEO_CC_MVS0_CLK>;
clock-names = "iface", "core", "vcodec0_core";
- interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
- <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>,
+ <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "cpu-cfg", "video-mem";
iommus = <&apps_smmu 0x2100 0x0400>;
@@ -4122,10 +4122,10 @@ camss: camss@ac6a000 {
<&apps_smmu 0xc40 0x400>,
<&apps_smmu 0xc41 0x400>;
- interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
- <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "cam_ahb",
"cam_hf_0_mnoc",
"cam_sf_0_mnoc",
@@ -4182,8 +4182,8 @@ mdss: display-subsystem@ae00000 {
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";
- interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
- <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
+ interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "mdp0-mem", "mdp1-mem";
power-domains = <&dispcc MDSS_GDSC>;
@@ -5671,7 +5671,7 @@ epss_l3: interconnect@18590000 {
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
- #interconnect-cells = <1>;
+ #interconnect-cells = <2>;
};
cpufreq_hw: cpufreq@18591000 {
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
2023-06-02 6:20 ` [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs Abel Vesa
2023-06-02 6:20 ` [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells Abel Vesa
@ 2023-06-02 6:20 ` Abel Vesa
2023-06-02 9:20 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 5/6] arm64: dts: qcom: sm8350: " Abel Vesa
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes since v1:
* None.
arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index c5787489b05c..08ea6396d364 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3750,6 +3750,10 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
@@ -3810,6 +3814,10 @@ usb_2: usb@a8f8800 {
resets = <&gcc GCC_USB30_SEC_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
+ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 5/6] arm64: dts: qcom: sm8350: Add missing interconnect paths to USB HCs
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
` (2 preceding siblings ...)
2023-06-02 6:20 ` [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs Abel Vesa
@ 2023-06-02 6:20 ` Abel Vesa
2023-06-02 6:20 ` [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC Abel Vesa
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
The USB HCs nodes are missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes since v1:
* Added Konrad's R-b tag
arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 2798a5d6e5f7..88ef478cb5cc 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2304,6 +2304,10 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
@@ -2373,6 +2377,10 @@ usb_2: usb@a8f8800 {
resets = <&gcc GCC_USB30_SEC_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
` (3 preceding siblings ...)
2023-06-02 6:20 ` [PATCH v2 5/6] arm64: dts: qcom: sm8350: " Abel Vesa
@ 2023-06-02 6:20 ` Abel Vesa
2023-09-12 17:09 ` Neil Armstrong
2023-06-02 9:19 ` [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Konrad Dybcio
2023-06-13 23:48 ` (subset) " Bjorn Andersson
6 siblings, 1 reply; 12+ messages in thread
From: Abel Vesa @ 2023-06-02 6:20 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
The USB HC node is missing the interconnect paths, so add them.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Changes since v1:
* Added Konrad's R-b tag
arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 11560ec9f182..5cd7296c7660 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4306,6 +4306,10 @@ usb_1: usb@a6f8800 {
resets = <&gcc GCC_USB30_PRIM_BCR>;
+ interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
+ interconnect-names = "usb-ddr", "apps-usb";
+
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
` (4 preceding siblings ...)
2023-06-02 6:20 ` [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC Abel Vesa
@ 2023-06-02 9:19 ` Konrad Dybcio
2023-06-13 23:48 ` (subset) " Bjorn Andersson
6 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2023-06-02 9:19 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 2.06.2023 08:20, Abel Vesa wrote:
> Use two interconnect cells in order to optionally support a path tag.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> * This patch was not part of v1
>
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 60 ++++++++++++++--------------
> 1 file changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 197c016aaeba..50a21062ea24 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -55,8 +55,8 @@ CPU0: cpu@0 {
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD0>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -84,8 +84,8 @@ CPU1: cpu@100 {
> next-level-cache = <&L2_100>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD1>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -108,8 +108,8 @@ CPU2: cpu@200 {
> next-level-cache = <&L2_200>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD2>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -132,8 +132,8 @@ CPU3: cpu@300 {
> next-level-cache = <&L2_300>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD3>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -156,8 +156,8 @@ CPU4: cpu@400 {
> next-level-cache = <&L2_400>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD4>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -180,8 +180,8 @@ CPU5: cpu@500 {
> next-level-cache = <&L2_500>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD5>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -204,8 +204,8 @@ CPU6: cpu@600 {
> next-level-cache = <&L2_600>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD6>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -228,8 +228,8 @@ CPU7: cpu@700 {
> next-level-cache = <&L2_700>;
> qcom,freq-domain = <&cpufreq_hw 2>;
> operating-points-v2 = <&cpu7_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
> power-domains = <&CPU_PD7>;
> power-domain-names = "psci";
> #cooling-cells = <2>;
> @@ -1760,49 +1760,49 @@ spi15: spi@c94000 {
> config_noc: interconnect@1500000 {
> compatible = "qcom,sm8150-config-noc";
> reg = <0 0x01500000 0 0x7400>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> system_noc: interconnect@1620000 {
> compatible = "qcom,sm8150-system-noc";
> reg = <0 0x01620000 0 0x19400>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mc_virt: interconnect@163a000 {
> compatible = "qcom,sm8150-mc-virt";
> reg = <0 0x0163a000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre1_noc: interconnect@16e0000 {
> compatible = "qcom,sm8150-aggre1-noc";
> reg = <0 0x016e0000 0 0xd080>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre2_noc: interconnect@1700000 {
> compatible = "qcom,sm8150-aggre2-noc";
> reg = <0 0x01700000 0 0x20000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> compute_noc: interconnect@1720000 {
> compatible = "qcom,sm8150-compute-noc";
> reg = <0 0x01720000 0 0x7000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mmss_noc: interconnect@1740000 {
> compatible = "qcom,sm8150-mmss-noc";
> reg = <0 0x01740000 0 0x1c100>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -2120,7 +2120,7 @@ crypto: crypto@1dfa000 {
> <&apps_smmu 0x506 0x0011>,
> <&apps_smmu 0x508 0x0011>,
> <&apps_smmu 0x512 0x0000>;
> - interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "memory";
> };
>
> @@ -3547,14 +3547,14 @@ opp-202000000 {
> dc_noc: interconnect@9160000 {
> compatible = "qcom,sm8150-dc-noc";
> reg = <0 0x09160000 0 0x3200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> gem_noc: interconnect@9680000 {
> compatible = "qcom,sm8150-gem-noc";
> reg = <0 0x09680000 0 0x3e200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3659,7 +3659,7 @@ usb_2_dwc3: usb@a800000 {
> camnoc_virt: interconnect@ac00000 {
> compatible = "qcom,sm8150-camnoc-virt";
> reg = <0 0x0ac00000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3668,8 +3668,8 @@ mdss: display-subsystem@ae00000 {
> reg = <0 0x0ae00000 0 0x1000>;
> reg-names = "mdss";
>
> - interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "mdp0-mem", "mdp1-mem";
>
> power-domains = <&dispcc MDSS_GDSC>;
> @@ -4334,7 +4334,7 @@ osm_l3: interconnect@18321000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> clock-names = "xo", "alternate";
>
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> };
>
> cpufreq_hw: cpufreq@18323000 {
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs
2023-06-02 6:20 ` [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs Abel Vesa
@ 2023-06-02 9:19 ` Konrad Dybcio
0 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2023-06-02 9:19 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 2.06.2023 08:20, Abel Vesa wrote:
> The USB HCs nodes are missing the interconnect paths, so add them.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> * None.
>
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 50a21062ea24..18c822abdb88 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -3595,6 +3595,10 @@ usb_1: usb@a6f8800 {
>
> resets = <&gcc GCC_USB30_PRIM_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_1_dwc3: usb@a600000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a600000 0 0xcd00>;
> @@ -3644,6 +3648,10 @@ usb_2: usb@a8f8800 {
>
> resets = <&gcc GCC_USB30_SEC_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_2_dwc3: usb@a800000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a800000 0 0xcd00>;
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells
2023-06-02 6:20 ` [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells Abel Vesa
@ 2023-06-02 9:20 ` Konrad Dybcio
0 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2023-06-02 9:20 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 2.06.2023 08:20, Abel Vesa wrote:
> Use two interconnect cells in order to optionally support a path tag.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> * This patch was not part of v1
>
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 72 ++++++++++++++--------------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index e5c60a6e4074..c5787489b05c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -106,8 +106,8 @@ CPU0: cpu@0 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_0: l2-cache {
> compatible = "cache";
> @@ -137,8 +137,8 @@ CPU1: cpu@100 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_100: l2-cache {
> compatible = "cache";
> @@ -162,8 +162,8 @@ CPU2: cpu@200 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_200: l2-cache {
> compatible = "cache";
> @@ -187,8 +187,8 @@ CPU3: cpu@300 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_300: l2-cache {
> compatible = "cache";
> @@ -212,8 +212,8 @@ CPU4: cpu@400 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_400: l2-cache {
> compatible = "cache";
> @@ -237,8 +237,8 @@ CPU5: cpu@500 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_500: l2-cache {
> compatible = "cache";
> @@ -262,8 +262,8 @@ CPU6: cpu@600 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_600: l2-cache {
> compatible = "cache";
> @@ -287,8 +287,8 @@ CPU7: cpu@700 {
> power-domain-names = "psci";
> qcom,freq-domain = <&cpufreq_hw 2>;
> operating-points-v2 = <&cpu7_opp_table>;
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
> - <&epss_l3 MASTER_OSM_L3_APPS &epss_l3 SLAVE_OSM_L3>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&epss_l3 MASTER_OSM_L3_APPS 0 &epss_l3 SLAVE_OSM_L3 0>;
> #cooling-cells = <2>;
> L2_700: l2-cache {
> compatible = "cache";
> @@ -1789,49 +1789,49 @@ spi13: spi@a94000 {
> config_noc: interconnect@1500000 {
> compatible = "qcom,sm8250-config-noc";
> reg = <0 0x01500000 0 0xa580>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> system_noc: interconnect@1620000 {
> compatible = "qcom,sm8250-system-noc";
> reg = <0 0x01620000 0 0x1c200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mc_virt: interconnect@163d000 {
> compatible = "qcom,sm8250-mc-virt";
> reg = <0 0x0163d000 0 0x1000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre1_noc: interconnect@16e0000 {
> compatible = "qcom,sm8250-aggre1-noc";
> reg = <0 0x016e0000 0 0x1f180>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> aggre2_noc: interconnect@1700000 {
> compatible = "qcom,sm8250-aggre2-noc";
> reg = <0 0x01700000 0 0x33000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> compute_noc: interconnect@1733000 {
> compatible = "qcom,sm8250-compute-noc";
> reg = <0 0x01733000 0 0xa180>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> mmss_noc: interconnect@1740000 {
> compatible = "qcom,sm8250-mmss-noc";
> reg = <0 0x01740000 0 0x1f080>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -2260,7 +2260,7 @@ crypto: crypto@1dfa000 {
> <&apps_smmu 0x59f 0x0000>,
> <&apps_smmu 0x586 0x0011>,
> <&apps_smmu 0x596 0x0011>;
> - interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "memory";
> };
>
> @@ -3693,21 +3693,21 @@ opp-202000000 {
> dc_noc: interconnect@90c0000 {
> compatible = "qcom,sm8250-dc-noc";
> reg = <0 0x090c0000 0 0x4200>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> gem_noc: interconnect@9100000 {
> compatible = "qcom,sm8250-gem-noc";
> reg = <0 0x09100000 0 0xb4000>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> npu_noc: interconnect@9990000 {
> compatible = "qcom,sm8250-npu-noc";
> reg = <0 0x09990000 0 0x1600>;
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> qcom,bcm-voters = <&apps_bcm_voter>;
> };
>
> @@ -3837,8 +3837,8 @@ venus: video-codec@aa00000 {
> <&videocc VIDEO_CC_MVS0_CLK>;
> clock-names = "iface", "core", "vcodec0_core";
>
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
> - <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_VENUS_CFG 0>,
> + <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "cpu-cfg", "video-mem";
>
> iommus = <&apps_smmu 0x2100 0x0400>;
> @@ -4122,10 +4122,10 @@ camss: camss@ac6a000 {
> <&apps_smmu 0xc40 0x400>,
> <&apps_smmu 0xc41 0x400>;
>
> - interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
> - <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>,
> + <&mmss_noc MASTER_CAMNOC_HF 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_CAMNOC_SF 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_CAMNOC_ICP 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "cam_ahb",
> "cam_hf_0_mnoc",
> "cam_sf_0_mnoc",
> @@ -4182,8 +4182,8 @@ mdss: display-subsystem@ae00000 {
> reg = <0 0x0ae00000 0 0x1000>;
> reg-names = "mdss";
>
> - interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
> - <&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
> + interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
> interconnect-names = "mdp0-mem", "mdp1-mem";
>
> power-domains = <&dispcc MDSS_GDSC>;
> @@ -5671,7 +5671,7 @@ epss_l3: interconnect@18590000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> clock-names = "xo", "alternate";
>
> - #interconnect-cells = <1>;
> + #interconnect-cells = <2>;
> };
>
> cpufreq_hw: cpufreq@18591000 {
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs
2023-06-02 6:20 ` [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs Abel Vesa
@ 2023-06-02 9:20 ` Konrad Dybcio
0 siblings, 0 replies; 12+ messages in thread
From: Konrad Dybcio @ 2023-06-02 9:20 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 2.06.2023 08:20, Abel Vesa wrote:
> The USB HCs nodes are missing the interconnect paths, so add them.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> * None.
>
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index c5787489b05c..08ea6396d364 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3750,6 +3750,10 @@ usb_1: usb@a6f8800 {
>
> resets = <&gcc GCC_USB30_PRIM_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_1_dwc3: usb@a600000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a600000 0 0xcd00>;
> @@ -3810,6 +3814,10 @@ usb_2: usb@a8f8800 {
>
> resets = <&gcc GCC_USB30_SEC_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3_1 0 &mc_virt SLAVE_EBI_CH0 0>,
> + <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_1 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_2_dwc3: usb@a800000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a800000 0 0xcd00>;
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
` (5 preceding siblings ...)
2023-06-02 9:19 ` [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Konrad Dybcio
@ 2023-06-13 23:48 ` Bjorn Andersson
6 siblings, 0 replies; 12+ messages in thread
From: Bjorn Andersson @ 2023-06-13 23:48 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andy Gross, Abel Vesa, Rob Herring,
Conor Dooley, Konrad Dybcio
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On Fri, 2 Jun 2023 09:20:11 +0300, Abel Vesa wrote:
> Use two interconnect cells in order to optionally support a path tag.
>
>
Applied, thanks!
[1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells
commit: 97c289026c62f80933b44353904b919572175f61
[2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs
commit: c2998e9a42637cdab699a21aa75a8cb5a7cbce72
[3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells
commit: b5a12438325b9c0207ae4374a797368070cfb945
[4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs
commit: fd62fd1cf9e7fb7ef761e411d37cb5d06769954b
[5/6] arm64: dts: qcom: sm8350: Add missing interconnect paths to USB HCs
commit: 8b51dc863baf1447e9ab52411c5bed7ef9a56d80
[6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
commit: b5b0649d5be4c82d09489492c121a7823323fc4a
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
2023-06-02 6:20 ` [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC Abel Vesa
@ 2023-09-12 17:09 ` Neil Armstrong
0 siblings, 0 replies; 12+ messages in thread
From: Neil Armstrong @ 2023-09-12 17:09 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
Hi,
On 02/06/2023 08:20, Abel Vesa wrote:
> The USB HC node is missing the interconnect paths, so add them.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>
> Changes since v1:
> * Added Konrad's R-b tag
>
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 11560ec9f182..5cd7296c7660 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -4306,6 +4306,10 @@ usb_1: usb@a6f8800 {
>
> resets = <&gcc GCC_USB30_PRIM_BCR>;
>
> + interconnects = <&aggre1_noc MASTER_USB3_0 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
> + interconnect-names = "usb-ddr", "apps-usb";
> +
> usb_1_dwc3: usb@a600000 {
> compatible = "snps,dwc3";
> reg = <0 0x0a600000 0 0xcd00>;
Since this commit, this happens on hdk8450:
[ 0.280395] usb30_prim_gdsc status stuck at 'off'
# bad: [2dde18cd1d8fac735875f2e4987f11817cc0bc2c] Linux 6.5
# good: [6995e2de6891c724bfeb2db33d7b87775f913ad1] Linux 6.4
git bisect start 'v6.5' 'v6.4'
# good: [b775d6c5859affe00527cbe74263de05cfe6b9f9] Merge tag 'mips_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
git bisect good b775d6c5859affe00527cbe74263de05cfe6b9f9
# bad: [56cbceab928d7ac3702de172ff8dcc1da2a6aaeb] Merge tag 'usb-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
git bisect bad 56cbceab928d7ac3702de172ff8dcc1da2a6aaeb
# bad: [b30d7a77c53ec04a6d94683d7680ec406b7f3ac8] Merge tag 'perf-tools-for-v6.5-1-2023-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next
git bisect bad b30d7a77c53ec04a6d94683d7680ec406b7f3ac8
# bad: [313c22bb31953c5ac7f3be94279126307dd5865c] Merge tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
git bisect bad 313c22bb31953c5ac7f3be94279126307dd5865c
# good: [60c2f542a7ada6bce82ce8e9d50e05eea74fe472] Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
git bisect good 60c2f542a7ada6bce82ce8e9d50e05eea74fe472
# good: [af3c684721cf69ff662c53a58f02261fa2f8efbe] Merge tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
git bisect good af3c684721cf69ff662c53a58f02261fa2f8efbe
# bad: [f07c96511d00138171130d43a50a377489cd87de] Merge tag 'v6.4-next-dts32' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/dt
git bisect bad f07c96511d00138171130d43a50a377489cd87de
# good: [abc49a7c6035c57ece0642811f70a7a3892badb6] dt-bindings: arm: qcom: Add Samsung Galaxy Express
git bisect good abc49a7c6035c57ece0642811f70a7a3892badb6
# bad: [e47a7f571d57d383f345e85c47a05ef1801b278c] arm64: dts: qcom: sm8250: rename labels for DSI nodes
git bisect bad e47a7f571d57d383f345e85c47a05ef1801b278c
# bad: [add687cbfc3482ca74949b91b251e76792d25652] dt-bindings: arm: qcom: document AL02-C9 board based on IPQ9574 family
git bisect bad add687cbfc3482ca74949b91b251e76792d25652
# good: [fd62fd1cf9e7fb7ef761e411d37cb5d06769954b] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs
git bisect good fd62fd1cf9e7fb7ef761e411d37cb5d06769954b
# bad: [90c8c4eb4bbb5e2e241fd5286bd43dd30a850b9d] arm64: dts: qcom: qdu1000: Add SDHCI node
git bisect bad 90c8c4eb4bbb5e2e241fd5286bd43dd30a850b9d
# bad: [b5b0649d5be4c82d09489492c121a7823323fc4a] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
git bisect bad b5b0649d5be4c82d09489492c121a7823323fc4a
# good: [8b51dc863baf1447e9ab52411c5bed7ef9a56d80] arm64: dts: qcom: sm8350: Add missing interconnect paths to USB HCs
git bisect good 8b51dc863baf1447e9ab52411c5bed7ef9a56d80
# first bad commit: [b5b0649d5be4c82d09489492c121a7823323fc4a] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC
Neil
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-09-12 17:09 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-02 6:20 [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Abel Vesa
2023-06-02 6:20 ` [PATCH v2 2/6] arm64: dts: qcom: sm8150: Add missing interconnect paths to USB HCs Abel Vesa
2023-06-02 9:19 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 3/6] arm64: dts: qcom: sm8250: Use 2 interconnect cells Abel Vesa
2023-06-02 9:20 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 4/6] arm64: dts: qcom: sm8250: Add missing interconnect paths to USB HCs Abel Vesa
2023-06-02 9:20 ` Konrad Dybcio
2023-06-02 6:20 ` [PATCH v2 5/6] arm64: dts: qcom: sm8350: " Abel Vesa
2023-06-02 6:20 ` [PATCH v2 6/6] arm64: dts: qcom: sm8450: Add missing interconnect paths to USB HC Abel Vesa
2023-09-12 17:09 ` Neil Armstrong
2023-06-02 9:19 ` [PATCH v2 1/6] arm64: dts: qcom: sm8150: Use 2 interconnect cells Konrad Dybcio
2023-06-13 23:48 ` (subset) " Bjorn Andersson
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