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From: Marc Gonzalez <marc.w.gonzalez@free.fr>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Kishon Vijay Abraham I <kishon@ti.com>
Cc: MSM <linux-arm-msm@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	Evan Green <evgreen@chromium.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	Niklas Cassel <niklas.cassel@linaro.org>,
	Stanimir Varbanov <svarbanov@mm-sol.com>
Subject: Re: [PATCH] phy: qcom-qmp: Correct READY_STATUS poll break condition
Date: Fri, 19 Jul 2019 17:50:14 +0200	[thread overview]
Message-ID: <5b252fe6-9435-2aad-d0db-f6170a07b5e9@free.fr> (raw)
In-Reply-To: <3570d880-2b76-88ae-8721-e75cf5acec4c@free.fr>

On 13/06/2019 11:10, Marc Gonzalez wrote:

> Here are my observations for a 8998 board:
> 
> 1) If I apply only the readl_poll_timeout() fix (not the mask_pcs_ready fixup)
> qcom_pcie_probe() fails with a timeout in phy_init.
> => this is in line with your regression analysis.
> 
> 2) Your patch also fixes a long-standing bug in UFS init whereby sending
> lots of information to the console during phy init would lead to an
> incorrectly diagnosed time-out.
> 
> Good stuff!
> 
> Reviewed-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> Tested-by: Marc Gonzalez <marc.w.gonzalez@free.fr>

It looks like this patch fixed UFS, but broke PCIe and USB3 ^_^

qcom-qmp-phy 1c06000.phy: Registered Qcom-QMP phy
qcom-qmp-phy c010000.phy: Registered Qcom-QMP phy
qcom-qmp-phy 1da7000.phy: Registered Qcom-QMP phy

qcom-qmp-phy 1c06000.phy: BEFORE=000000a6 AFTER=000000a6
qcom-qmp-phy 1c06000.phy: phy initialization timed-out
phy phy-1c06000.phy.0: phy init failed --> -110
qcom-pcie: probe of 1c00000.pci failed with error -110

qcom-qmp-phy 1da7000.phy: BEFORE=00000040 AFTER=0000000d

qcom-qmp-phy c010000.phy: BEFORE=69696969 AFTER=b7b7b7b7
qcom-qmp-phy c010000.phy: phy initialization timed-out
phy phy-c010000.phy.1: phy init failed --> -110
dwc3 a800000.dwc3: failed to initialize core: -110
dwc3: probe of a800000.dwc3 failed with error -110


Downstream code for PCIe is:

static bool pcie_phy_is_ready(struct msm_pcie_dev_t *dev)
{
	if (dev->phy_ver >= 0x20) {
		if (readl_relaxed(dev->phy + PCIE_N_PCS_STATUS(dev->rc_idx, dev->common_phy)) &	BIT(6))
			return false;
		else
			return true;
	}

	if (!(readl_relaxed(dev->phy + PCIE_COM_PCS_READY_STATUS) & 0x1))
		return false;
	else
		return true;
}

AFAICT:
PCIe and USB3 QMP PHYs are ready when PHYSTATUS=BIT(6) goes to 0.
But UFS is ready when PCS_READY=BIT(0) goes to 1.


Can someone verify that USB3 is broken on 845 with 885bd765963b?

Regards.

  parent reply	other threads:[~2019-07-19 15:50 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-04 23:24 [PATCH] phy: qcom-qmp: Correct READY_STATUS poll break condition Bjorn Andersson
2019-06-04 23:35 ` Evan Green
2019-06-12 13:08 ` Niklas Cassel
2019-06-12 17:34   ` Bjorn Andersson
2019-06-12 16:24 ` Marc Gonzalez
2019-06-12 17:25   ` Bjorn Andersson
2019-06-13  9:10     ` Marc Gonzalez
2019-06-19 12:43       ` Marc Gonzalez
2019-07-19 15:50       ` Marc Gonzalez [this message]
2019-07-23 10:31         ` Marc Gonzalez
2019-08-02 19:54           ` Marc Gonzalez
2019-08-06  0:43         ` Bjorn Andersson

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