From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EB26C433F5 for ; Sat, 14 May 2022 14:45:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233446AbiENOpq (ORCPT ); Sat, 14 May 2022 10:45:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233427AbiENOpp (ORCPT ); Sat, 14 May 2022 10:45:45 -0400 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [IPv6:2001:4b7a:2000:18::164]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D09A3C5D for ; Sat, 14 May 2022 07:45:44 -0700 (PDT) Received: from [192.168.1.113] (abxh168.neoplus.adsl.tpnet.pl [83.9.1.168]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id E5D0D2054D; Sat, 14 May 2022 16:45:42 +0200 (CEST) Message-ID: <649d0682-4b35-3c33-8f77-e7849da355c6@somainline.org> Date: Sat, 14 May 2022 16:45:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v4 02/12] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default From: Konrad Dybcio To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Marijn Suijten Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20220514141041.3158521-1-dmitry.baryshkov@linaro.org> <20220514141041.3158521-3-dmitry.baryshkov@linaro.org> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 14/05/2022 16:44, Konrad Dybcio wrote: > > On 14/05/2022 16:10, Dmitry Baryshkov wrote: >> Follow the typical practice and keep DSI1/DSI1 PHY disabled by default. >> They should be enabled in the board DT files. No existing boards use >> them at this moment. >> >> Reviewed-by: Marijn Suijten >> Reviewed-by: Konrad Dybcio >> Signed-off-by: Dmitry Baryshkov >> --- >>   arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++ >>   1 file changed, 3 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi >> b/arch/arm64/boot/dts/qcom/sdm660.dtsi >> index eccf6fde16b4..023b0ac4118c 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi >> @@ -192,6 +192,8 @@ dsi1: dsi@c996000 { >>           phys = <&dsi1_phy>; >>           phy-names = "dsi"; >>   +        status = "disabled"; >> + >>           ports { >>               #address-cells = <1>; >>               #size-cells = <0>; >> @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 { >>             clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; >>           clock-names = "iface", "ref"; >> +        status = "disabled"; >>       }; >>   }; > > Reviewed-by: Konrad Dybcio > > > Konrad Sorry, I went too fast and r-b'd this twice.. :P Konrad