From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EBA6C3815B for ; Mon, 20 Apr 2020 16:29:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 150AA206DD for ; Mon, 20 Apr 2020 16:29:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="CHOzMuiz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725896AbgDTQ3T (ORCPT ); Mon, 20 Apr 2020 12:29:19 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:14986 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725271AbgDTQ23 (ORCPT ); Mon, 20 Apr 2020 12:28:29 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1587400108; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=QA9CZuPAM8s1GI09MkFEN/LL8wgIB+Q0f+qXwJ/VpWg=; b=CHOzMuizuOZ8szlYs1XgI2AqoUZ10WffvJEum/q4inG48PFB1dUk7H7wJHUxTWDUFpsp1Qro 7WZrxKdH1toZl7ZytLRUILW+Kztfcgy2WP1OiU1vpc6TxVZQYfSLSaeLqCGR4ZBrQ+Oxguzt V3MTjtbwg73aKcoP5PtnENu8RVE= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e9dcdac.7f23024071f0-smtp-out-n04; Mon, 20 Apr 2020 16:28:28 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 06E2BC43637; Mon, 20 Apr 2020 16:28:26 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3245DC433D2; Mon, 20 Apr 2020 16:28:26 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 20 Apr 2020 21:58:26 +0530 From: Sai Prakash Ranjan To: Robin Murphy Cc: Will Deacon , Joerg Roedel , Sibi Sankar , Bjorn Andersson , Jordan Crouse , Rob Clark , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Evan Green , Stephen Boyd , iommu@lists.linux-foundation.org, Matthias Kaehlcke , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCHv2 2/6] iommu/arm-smmu: Allow client devices to select direct mapping In-Reply-To: References: <14539e787e6d8b7bd0a6d8f8a001baae6f691988.1587392905.git.saiprakash.ranjan@codeaurora.org> Message-ID: <65f21f15b90f73e16c0bb5bb75e835e6@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 2020-04-20 21:27, Robin Murphy wrote: > On 2020-04-20 3:37 pm, Sai Prakash Ranjan wrote: >> From: Jordan Crouse >> >> Some client devices want to directly map the IOMMU themselves instead >> of using the DMA domain. Allow those devices to opt in to direct >> mapping by way of a list of compatible strings. >> >> Signed-off-by: Jordan Crouse >> Co-developed-by: Sai Prakash Ranjan >> Signed-off-by: Sai Prakash Ranjan >> --- >> drivers/iommu/arm-smmu-qcom.c | 19 +++++++++++++++++++ >> drivers/iommu/arm-smmu.h | 1 + >> 2 files changed, 20 insertions(+) >> >> diff --git a/drivers/iommu/arm-smmu-qcom.c >> b/drivers/iommu/arm-smmu-qcom.c >> index 64a4ab270ab7..0b3f159065aa 100644 >> --- a/drivers/iommu/arm-smmu-qcom.c >> +++ b/drivers/iommu/arm-smmu-qcom.c >> @@ -3,6 +3,7 @@ >> * Copyright (c) 2019, The Linux Foundation. All rights reserved. >> */ >> +#include >> #include >> #include "arm-smmu.h" >> @@ -11,6 +12,23 @@ struct qcom_smmu { >> struct arm_smmu_device smmu; >> }; >> +static const struct of_device_id qcom_smmu_client_of_match[] = { >> + { .compatible = "qcom,adreno" }, >> + { .compatible = "qcom,mdp4" }, >> + { .compatible = "qcom,mdss" }, >> + { .compatible = "qcom,sc7180-mdss" }, >> + { .compatible = "qcom,sdm845-mdss" }, >> + { } >> +}; >> + >> +static int qcom_smmu_request_domain(struct device *dev) >> +{ >> + const struct of_device_id *match = >> + of_match_device(qcom_smmu_client_of_match, dev); >> + >> + return match ? IOMMU_DOMAIN_IDENTITY : 0; >> +} >> + >> static int qcom_sdm845_smmu500_reset(struct arm_smmu_device *smmu) >> { >> int ret; >> @@ -41,6 +59,7 @@ static int qcom_smmu500_reset(struct arm_smmu_device >> *smmu) >> } >> static const struct arm_smmu_impl qcom_smmu_impl = { >> + .req_domain = qcom_smmu_request_domain, >> .reset = qcom_smmu500_reset, >> }; >> diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h >> index 8d1cd54d82a6..662fdb4dccd2 100644 >> --- a/drivers/iommu/arm-smmu.h >> +++ b/drivers/iommu/arm-smmu.h >> @@ -386,6 +386,7 @@ struct arm_smmu_impl { >> int (*init_context)(struct arm_smmu_domain *smmu_domain); >> void (*tlb_sync)(struct arm_smmu_device *smmu, int page, int sync, >> int status); >> + int (*req_domain)(struct device *dev); > > Nit: since the point is to implement the full > iommu_ops::def_domain_type interface, can we call it def_domain_type > please? > Sure, will send the next version shortly. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation