From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Gonzalez Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: msm8998: Add ANOC1 SMMU node Date: Tue, 2 Apr 2019 09:37:17 +0200 Message-ID: <6d7deec7-d141-bbde-9358-628c0af7bb8c@free.fr> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Bjorn Andersson Cc: Jeffrey Hugo , MSM , Douglas Anderson , Evan Green , Stanimir Varbanov , Manu Gautam , iommu , Srinivas Kandagatla , Robin Murphy List-Id: linux-arm-msm@vger.kernel.org On 01/04/2019 17:40, Marc Gonzalez wrote: > The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB. > (*) Aggregate Network-on-Chip #1 > > Based on the following DTS downstream: > https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18 > > Signed-off-by: Marc Gonzalez > --- > Changes from v1: > Split off from "PCIe and AR8151 on APQ8098/MSM8998" series > Change compatible string to use qcom,msm8998-smmu-v2 > --- > arch/arm64/boot/dts/qcom/msm8998.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > index ef71e8f1d102..f807ea3e2c6e 100644 > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > @@ -606,6 +606,21 @@ > #thermal-sensor-cells = <1>; > }; > > + anoc1_smmu: arm,smmu@1680000 { Doh! This should probably be anoc1_smmu: iommu@1680000 Bjorn, can you fix it up when you pick up the patch, or do you need me to respin? Regards.