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From: abhinavk@codeaurora.org
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Jonathan Marek <jonathan@marek.ca>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	freedreno@lists.freedesktop.org
Subject: Re: [Freedreno] [PATCH v2 14/22] drm/msm/dpu: add list of supported formats to the DPU caps
Date: Tue, 09 Nov 2021 12:05:06 -0800	[thread overview]
Message-ID: <6de0375f60e442f301cb4e735d3ca2e6@codeaurora.org> (raw)
In-Reply-To: <20210705012115.4179824-15-dmitry.baryshkov@linaro.org>

On 2021-07-04 18:21, Dmitry Baryshkov wrote:
> As we are going to add virtual planes, add the list of supported 
> formats
> to the hw catalog entry. It will be used to setup universal planes, 
> with
> later selecting a pipe depending on whether the YUV format is used for
> the framebuffer.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

I dont see an issue with exposing the format_list in the catalog, hence
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 ++++++++++
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h |  4 ++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index d01c4c919504..b8e0fece1f0b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -195,6 +195,8 @@ static const struct dpu_caps sdm845_dpu_caps = {
>  	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>  	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>  	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>  };
> 
>  static const struct dpu_caps sc7180_dpu_caps = {
> @@ -207,6 +209,8 @@ static const struct dpu_caps sc7180_dpu_caps = {
>  	.has_idle_pc = true,
>  	.max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
>  	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>  };
> 
>  static const struct dpu_caps sm8150_dpu_caps = {
> @@ -223,6 +227,8 @@ static const struct dpu_caps sm8150_dpu_caps = {
>  	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>  	.max_hdeci_exp = MAX_HORZ_DECIMATION,
>  	.max_vdeci_exp = MAX_VERT_DECIMATION,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>  };
> 
>  static const struct dpu_caps sm8250_dpu_caps = {
> @@ -237,6 +243,8 @@ static const struct dpu_caps sm8250_dpu_caps = {
>  	.has_3d_merge = true,
>  	.max_linewidth = 4096,
>  	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>  };
> 
>  static const struct dpu_caps sc7280_dpu_caps = {
> @@ -249,6 +257,8 @@ static const struct dpu_caps sc7280_dpu_caps = {
>  	.has_idle_pc = true,
>  	.max_linewidth = 2400,
>  	.pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +	.format_list = plane_formats_yuv,
> +	.num_formats = ARRAY_SIZE(plane_formats_yuv),
>  };
> 
>  static const struct dpu_mdp_cfg sdm845_mdp[] = {
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index d2a945a27cfa..f3c5aa3f4b3f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -324,6 +324,8 @@ struct dpu_qos_lut_tbl {
>   * @pixel_ram_size     size of latency hiding and de-tiling buffer in 
> bytes
>   * @max_hdeci_exp      max horizontal decimation supported (max is 
> 2^value)
>   * @max_vdeci_exp      max vertical decimation supported (max is 
> 2^value)
> + * @format_list: Pointer to list of supported formats
> + * @num_formats: Number of supported formats
>   */
>  struct dpu_caps {
>  	u32 max_mixer_width;
> @@ -340,6 +342,8 @@ struct dpu_caps {
>  	u32 pixel_ram_size;
>  	u32 max_hdeci_exp;
>  	u32 max_vdeci_exp;
> +	const u32 *format_list;
> +	u32 num_formats;
>  };
> 
>  /**

  reply	other threads:[~2021-11-09 20:05 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-05  1:20 [PATCH v2 00/22] drm/msm/dpu: switch dpu_plane to be virtual Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 01/22] drm/msm/dpu: move LUT levels out of QOS config Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 02/22] drm/msm/dpu: remove pipe_qos_cfg from struct dpu_plane Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 03/22] drm/msm/dpu: drop pipe_name " Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 04/22] drm/msm/dpu: remove stage_cfg from struct dpu_crtc Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 05/22] drm/msm/dpu: rip out master planes support Dmitry Baryshkov
2021-07-05  1:20 ` [PATCH v2 06/22] drm/msm/dpu: move dpu_hw_pipe_cfg out of struct dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 07/22] drm/msm/dpu: drop scaler config from plane state Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 08/22] drm/msm/dpu: drop dpu_csc_cfg from dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 09/22] drm/msm/dpu: remove dpu_hw_pipe_cdp_cfg " Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 10/22] drm/msm/dpu: don't cache pipe->cap->features in dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 11/22] drm/msm/dpu: don't cache pipe->cap->sblk " Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 12/22] drm/msm/dpu: rip out debugfs support from dpu_plane Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 13/22] drm/msm/dpu: drop src_split and multirect check from dpu_crtc_atomic_check Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 14/22] drm/msm/dpu: add list of supported formats to the DPU caps Dmitry Baryshkov
2021-11-09 20:05   ` abhinavk [this message]
2021-07-05  1:21 ` [PATCH v2 15/22] drm/msm/dpu: simplify DPU_SSPP features checks Dmitry Baryshkov
2021-11-09 20:06   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 16/22] drm/msm/dpu: do not limit the zpos property Dmitry Baryshkov
2021-11-09 20:15   ` [Freedreno] " abhinavk
2021-11-09 20:21     ` Dmitry Baryshkov
2021-11-10  1:35       ` abhinavk
2021-11-10  1:58         ` Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 17/22] drm/msm/dpu: add support for SSPP allocation to RM Dmitry Baryshkov
2021-11-10  0:30   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 18/22] drm/msm/dpu: move pipe_hw to dpu_plane_state Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 19/22] drm/msm/dpu: add support for virtualized planes Dmitry Baryshkov
2021-07-05  1:21 ` [PATCH v2 20/22] drm/msm/dpu: fix smart dma support Dmitry Baryshkov
2021-11-10  2:06   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 21/22] drm/msm/dpu: fix CDP setup to account for multirect index Dmitry Baryshkov
2021-11-10  2:12   ` [Freedreno] " abhinavk
2021-07-05  1:21 ` [PATCH v2 22/22] drm/msm/dpu: add multirect support Dmitry Baryshkov
2021-11-10  2:22   ` [Freedreno] " abhinavk
2021-09-30  2:19 ` [Freedreno] [PATCH v2 00/22] drm/msm/dpu: switch dpu_plane to be virtual abhinavk
2021-09-30 10:56   ` Dmitry Baryshkov

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