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From: Thara Gopinath <thara.gopinath@linaro.org>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	rui.zhang@intel.com, daniel.lezcano@linaro.org,
	rjw@rjwysocki.net, robh+dt@kernel.org, tdas@codeaurora.org,
	mka@chromium.org, linux-arm-msm@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [Patch v3 3/6] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support
Date: Wed, 14 Jul 2021 08:37:19 -0400	[thread overview]
Message-ID: <6de43ee8-e3f4-f09e-1076-7746e44dd19a@linaro.org> (raw)
In-Reply-To: <20210713031848.sp5fpjg36uthnmuq@vireshk-i7>



On 7/12/21 11:18 PM, Viresh Kumar wrote:
> On 12-07-21, 21:18, Thara Gopinath wrote:
>> So I really need the interrupt to fire and then the timer to kick in and
>> take up the monitoring. I can think of introducing a variable is_disabled
>> which is updated and read under a spinlock. qcom_cpufreq_hw_cpu_exit can
>> hold the spinlock and set is_disabled to true prior to cancelling the work
>> queue or disabling the interrupt. Before re-enabling the interrupt or
>> re-queuing the work in qcom_lmh_dcvs_notify, is_disabled can be read and
>> checked.
> 
> Or you can make the lmh_dcvs_poll_work item a pointer and mark it NULL in exit,
> with proper locking etc.

Yes it could work. I will spin the next version with either this or 
introducing a new variable with locking.

> 
>> But does this problem not exist in target_index , fast_switch etc also ? One
>> cpu can be disabling and the other one can be updating the target right?
> 
> The race doesn't happen there as cpufreq_unregister_driver() takes care of
> stopping everything before removing the policy. To be more precise, governor's
> ->stop() function is responsible for making sure that frequency won't be updated
> any further.
> 

-- 
Warm Regards
Thara (She/Her/Hers)

  reply	other threads:[~2021-07-14 12:37 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08 12:06 [Patch v3 0/6] Introduce LMh driver for Qualcomm SoCs Thara Gopinath
2021-07-08 12:06 ` [Patch v3 1/6] firmware: qcom_scm: Introduce SCM calls to access LMh Thara Gopinath
2021-07-10  4:02   ` Bjorn Andersson
2021-07-08 12:06 ` [Patch v3 2/6] thermal: qcom: Add support for LMh driver Thara Gopinath
2021-07-10  4:15   ` Bjorn Andersson
2021-07-13  0:49     ` Thara Gopinath
2021-07-08 12:06 ` [Patch v3 3/6] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support Thara Gopinath
2021-07-08 20:00   ` kernel test robot
2021-07-09  6:46   ` Viresh Kumar
2021-07-09 15:37     ` Thara Gopinath
2021-07-12  4:35       ` Viresh Kumar
2021-07-12  4:41       ` Viresh Kumar
2021-07-13  1:18         ` Thara Gopinath
2021-07-13  3:18           ` Viresh Kumar
2021-07-14 12:37             ` Thara Gopinath [this message]
2021-07-10  4:57   ` Bjorn Andersson
2021-07-13  1:09     ` Thara Gopinath
2021-07-08 12:06 ` [Patch v3 4/6] arm64: boot: dts: qcom: sdm45: Add support for LMh node Thara Gopinath
2021-07-10  4:17   ` Bjorn Andersson
2021-07-19 16:33   ` Bjorn Andersson
2021-07-19 22:44     ` Thara Gopinath
2021-07-08 12:06 ` [Patch v3 5/6] arm64: boot: dts: qcom: sdm845: Remove cpufreq cooling devices for CPU thermal zones Thara Gopinath
2021-07-10  4:17   ` Bjorn Andersson
2021-07-08 12:06 ` [Patch v3 6/6] dt-bindings: thermal: Add dt binding for QCOM LMh Thara Gopinath
2021-07-10  4:21   ` Bjorn Andersson
2021-07-13  0:54     ` Thara Gopinath
2021-07-12 17:32   ` Rob Herring
2021-07-22  3:14 ` [Patch v3 0/6] Introduce LMh driver for Qualcomm SoCs Steev Klimaszewski
2021-07-27 15:29   ` Thara Gopinath
2021-07-27 17:43     ` Steev Klimaszewski

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