From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, agross@kernel.org
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, joro@8bytes.org,
will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, robdclark@gmail.com,
linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
marijn.suijten@somainline.org, kernel@collabora.com,
luca@z3ntu.xyz, a39.skl@gmail.com, phone-devel@vger.kernel.org,
~postmarketos/upstreaming@lists.sr.ht
Subject: Re: [PATCH v3 2/6] iommu/qcom: Use the asid read from device-tree if specified
Date: Tue, 20 Jun 2023 11:43:36 +0200 [thread overview]
Message-ID: <6e3f4ff6-2556-a696-58dc-40e1e4d84189@collabora.com> (raw)
In-Reply-To: <12f0800c-beb3-6fdc-b743-8624f0d5d6ac@linaro.org>
Il 07/03/23 17:44, Dmitry Baryshkov ha scritto:
> On 15/11/2022 12:11, AngeloGioacchino Del Regno wrote:
>> As specified in this driver, the context banks are 0x1000 apart but
>> on some SoCs the context number does not necessarily match this
>> logic, hence we end up using the wrong ASID: keeping in mind that
>> this IOMMU implementation relies heavily on SCM (TZ) calls, it is
>> mandatory that we communicate the right context number.
>>
>> Since this is all about how context banks are mapped in firmware,
>> which may be board dependent (as a different firmware version may
>> eventually change the expected context bank numbers), introduce a
>> new property "qcom,ctx-num": when found, the ASID will be forced
>> as read from the devicetree.
>>
>> When "qcom,ctx-num" is not found, this driver retains the previous
>> behavior as to avoid breaking older devicetrees or systems that do
>> not require forcing ASID numbers.
>>
>> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
>> [Marijn: Rebased over next-20221111]
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>> drivers/iommu/arm/arm-smmu/qcom_iommu.c | 18 +++++++++++++++---
>> 1 file changed, 15 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
>> b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
>> index bfd7b51eb5db..491a8093f3d6 100644
>> --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
>> +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
>> @@ -551,7 +551,8 @@ static int qcom_iommu_of_xlate(struct device *dev, struct
>> of_phandle_args *args)
>> * index into qcom_iommu->ctxs:
>> */
>> if (WARN_ON(asid < 1) ||
>> - WARN_ON(asid > qcom_iommu->num_ctxs)) {
>> + WARN_ON(asid > qcom_iommu->num_ctxs) ||
>> + WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL)) {
>
> Separate change in my opinion. Please split it to a separate patch with proper
> Fixes: tag.
>
This is of_xlate: the array entry at [asid - 1] is always initialized before
the introduction of `qcom,ctx-num`, so this is not a separate change and it
does not require a Fixes tag, as it is not fixing a previous behavior, but
accounting for a new one.
>> put_device(&iommu_pdev->dev);
>> return -EINVAL;
>> }
>> @@ -638,7 +639,8 @@ static int qcom_iommu_sec_ptbl_init(struct device *dev)
>> static int get_asid(const struct device_node *np)
>> {
>> - u32 reg;
>> + u32 reg, val;
>> + int asid;
>> /* read the "reg" property directly to get the relative address
>> * of the context bank, and calculate the asid from that:
>> @@ -646,7 +648,17 @@ static int get_asid(const struct device_node *np)
>> if (of_property_read_u32_index(np, "reg", 0, ®))
>> return -ENODEV;
>> - return reg / 0x1000; /* context banks are 0x1000 apart */
>> + /*
>> + * Context banks are 0x1000 apart but, in some cases, the ASID
>> + * number doesn't match to this logic and needs to be passed
>> + * from the DT configuration explicitly.
>> + */
>> + if (of_property_read_u32(np, "qcom,ctx-num", &val))
>> + asid = reg / 0x1000;
>> + else
>> + asid = val;
>
> As a matter of preference (and logic) I'd have written that as:
>
> if (!of_property_read(np, "qcom,ctx-num", &val))
> asid = val;
> else
> asid = reg / 0x1000;
>
> LGTM otherwise
>
Will do!
Thanks,
Angelo
P.S.: Sorry for the very late reply.
>> +
>> + return asid;
>> }
>> static int qcom_iommu_ctx_probe(struct platform_device *pdev)
>
next prev parent reply other threads:[~2023-06-20 9:43 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-15 10:11 [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 1/6] dt-bindings: iommu: qcom,iommu: Document qcom,ctx-num property AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 2/6] iommu/qcom: Use the asid read from device-tree if specified AngeloGioacchino Del Regno
2023-03-07 16:44 ` Dmitry Baryshkov
2023-03-07 16:47 ` Konrad Dybcio
2023-06-20 9:43 ` AngeloGioacchino Del Regno [this message]
2022-11-15 10:11 ` [PATCH v3 3/6] iommu/qcom: Properly reset the IOMMU context AngeloGioacchino Del Regno
2023-03-07 16:50 ` Dmitry Baryshkov
2022-11-15 10:11 ` [PATCH v3 4/6] iommu/qcom: Index contexts by asid number to allow asid 0 AngeloGioacchino Del Regno
2023-03-07 16:53 ` Dmitry Baryshkov
2022-11-15 10:11 ` [PATCH v3 5/6] dt-bindings: iommu: qcom,iommu: Document QSMMUv2 and MSM8976 compatibles AngeloGioacchino Del Regno
2022-11-16 12:22 ` Krzysztof Kozlowski
2022-11-15 10:11 ` [PATCH v3 6/6] iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts AngeloGioacchino Del Regno
2023-03-07 16:58 ` Dmitry Baryshkov
2023-02-22 9:57 ` [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2023-06-19 21:42 ` Luca Weiss
2023-06-20 10:02 ` AngeloGioacchino Del Regno
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