From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 563C6C48BE6 for ; Wed, 16 Jun 2021 06:58:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 31C0B613B9 for ; Wed, 16 Jun 2021 06:58:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231318AbhFPHAY (ORCPT ); Wed, 16 Jun 2021 03:00:24 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:30191 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230360AbhFPHAO (ORCPT ); Wed, 16 Jun 2021 03:00:14 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1623826689; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=I0eydOR0xnXCnwZc0aveamd5PTl1UHcBko2iiIqk/Yg=; b=AWH3tuy/OXZBqVTUtsEtzxMuIcYUYu93jyINdt0mk0FhW0rBJHCzxgExh4xTDNtKs6hTVNrE FZzHZ+sFUrZqE14hNvw/S2XXXojfX273RMmqHRdbfrkeoyo+JJjq1X3gnTS6ulG6s04p4HRK UYPKo4FI7LzwH6V7/d++7CVmTVQ= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 60c9a0fce570c05619939a0c (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 16 Jun 2021 06:58:04 GMT Sender: saiprakash.ranjan=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 790E3C4323A; Wed, 16 Jun 2021 06:58:04 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id B795BC4338A; Wed, 16 Jun 2021 06:58:03 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 16 Jun 2021 12:28:03 +0530 From: Sai Prakash Ranjan To: Robin Murphy Cc: Krishna Reddy , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Will Deacon , linux-arm-kernel@lists.infradead.org, Thierry Reding Subject: Re: [PATCH] iommu/io-pgtable-arm: Optimize partial walk flush for large scatter-gather list In-Reply-To: References: <20210609145315.25750-1-saiprakash.ranjan@codeaurora.org> <35bfd245-45e2-8083-b620-330d6dbd7bd7@arm.com> <12067ffb8243b220cf03e83aaac3e823@codeaurora.org> <266f190e-99ae-9175-cf13-7a77730af389@arm.com> <61c69d23-324a-85d7-2458-dfff8df9280b@arm.com> <07001b4ed6c0a491eacce6e4dc13ab5e@codeaurora.org> <5eb5146ab51a8fe0b558680d479a26cd@codeaurora.org> Message-ID: <8535b6c757a5584b495f135f4377053c@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Robin, On 2021-06-15 19:23, Robin Murphy wrote: > On 2021-06-15 12:51, Sai Prakash Ranjan wrote: ... >> Hi @Robin, from these discussions it seems they are not ok with the >> change >> for all SoC vendor implementations and do not have any data on such >> impact. >> As I mentioned above, on QCOM platforms we do have several >> optimizations in HW >> for TLBIs and would like to make use of it and reduce the unmap >> latency. >> What do you think, should this be made implementation specific? > > Yes, it sounds like there's enough uncertainty for now that this needs > to be an opt-in feature. However, I still think that non-strict mode > could use it generically, since that's all about over-invalidating to > save time on individual unmaps - and relatively non-deterministic - > already. > > So maybe we have a second set of iommu_flush_ops, or just a flag > somewhere to control the tlb_flush_walk functions internally, and the > choice can be made in the iommu_get_dma_strict() test, but also forced > on all the time by your init_context hook. What do you reckon? > Sounds good to me. Since you mentioned non-strict mode using it generically, can't we just set tlb_flush_all() in io_pgtable_tlb_flush_walk() like below based on quirk so that we don't need to add any check in iommu_get_dma_strict() and just force the new flush_ops in init_context hook? if (iop->cfg.quirks & IO_PGTABLE_QUIRK_NON_STRICT) { iop->cfg.tlb->tlb_flush_all(iop->cookie); return; } Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation