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* [PATCH 0/2] arm64: sm8150: Add minimal DMA support
@ 2021-04-16 13:31 Felipe Balbi
  2021-04-16 13:31 ` [PATCH 1/2] DMA: qcom: gpi: add compatible for sm8150 Felipe Balbi
  2021-04-16 13:31 ` [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes Felipe Balbi
  0 siblings, 2 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-04-16 13:31 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi

From: Felipe Balbi <felipe.balbi@microsoft.com>

Hi,

With these two patches, GPI DMA probes fine on sm8150 (well, after
setting gpi_dma[012] status to okay). Future commits should come to add
relevant DMA channel mapping for the various IPs.

DTS patch a dependency on I2C patches by Caleb Connolly and SPI patch by
yours truly.

Felipe Balbi (2):
  DMA: qcom: gpi: add compatible for sm8150
  arm64: boot: dts: qcom: sm8150: Add DMA nodes

 .../devicetree/bindings/dma/qcom,gpi.yaml     |  1 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi          | 72 +++++++++++++++++++
 drivers/dma/qcom/gpi.c                        |  1 +
 3 files changed, 74 insertions(+)

-- 
2.31.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/2] DMA: qcom: gpi: add compatible for sm8150
  2021-04-16 13:31 [PATCH 0/2] arm64: sm8150: Add minimal DMA support Felipe Balbi
@ 2021-04-16 13:31 ` Felipe Balbi
  2021-04-16 13:31 ` [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes Felipe Balbi
  1 sibling, 0 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-04-16 13:31 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi

From: Felipe Balbi <felipe.balbi@microsoft.com>

No functional changes, just adding a new compatible for a diferent
SoC.

Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com>
---
 Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 1 +
 drivers/dma/qcom/gpi.c                              | 1 +
 2 files changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
index f8142adf9aea..902e2e523386 100644
--- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
+++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
@@ -20,6 +20,7 @@ properties:
   compatible:
     enum:
       - qcom,sdm845-gpi-dma
+      - qcom,sm8150-gpi-dma
 
   reg:
     maxItems: 1
diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c
index 57f5ee4235c7..43ac3ab23d4c 100644
--- a/drivers/dma/qcom/gpi.c
+++ b/drivers/dma/qcom/gpi.c
@@ -2281,6 +2281,7 @@ static int gpi_probe(struct platform_device *pdev)
 
 static const struct of_device_id gpi_of_match[] = {
 	{ .compatible = "qcom,sdm845-gpi-dma" },
+	{ .compatible = "qcom,sm8150-gpi-dma" },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, gpi_of_match);
-- 
2.31.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes
  2021-04-16 13:31 [PATCH 0/2] arm64: sm8150: Add minimal DMA support Felipe Balbi
  2021-04-16 13:31 ` [PATCH 1/2] DMA: qcom: gpi: add compatible for sm8150 Felipe Balbi
@ 2021-04-16 13:31 ` Felipe Balbi
  2021-04-16 13:40   ` Felipe Balbi
  2021-04-16 18:56   ` Konrad Dybcio
  1 sibling, 2 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-04-16 13:31 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi

From: Felipe Balbi <felipe.balbi@microsoft.com>

With this patch, DMA has a chance of probing and doing something
useful.

Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com>
---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 72 ++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index c563f381a138..b426e935a36b 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -4,6 +4,7 @@
  * Copyright (c) 2019, Linaro Limited
  */
 
+#include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-aoss-qmp.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
@@ -577,6 +578,29 @@ gcc: clock-controller@100000 {
 				 <&sleep_clk>;
 		};
 
+		gpi_dma0: qcom,gpi-dma@800000 {
+			#dma-cells = <3>;
+			compatible = "qcom,sm8150-gpi-dma";
+			reg = <0 0x800000 0 0x60000>;
+			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+			dma-channels = <13>;
+			dma-channel-mask = <0xfa>;
+			iommus = <&apps_smmu 0x00d6 0x0>;
+			status = "disabled";
+		};
+
 		qupv3_id_0: geniqup@8c0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0x0 0x008c0000 0x0 0x6000>;
@@ -612,6 +636,8 @@ spi0: spi@880000 {
 				pinctrl-0 = <&qup_spi0_default>;
 				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
 				spi-max-frequency = <50000000>;
+				dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+				       <&gpi_dma0 1 0 QCOM_GPI_SPI>;
 				#address-cells = <1>;
 				#size-cells = <0>;
 				status = "disabled";
@@ -814,6 +840,29 @@ spi7: spi@89c000 {
 			};
 		};
 
+		gpi_dma1: qcom,gpi-dma@a00000 {
+			#dma-cells = <3>;
+			compatible = "qcom,sm8150-gpi-dma";
+			reg = <0 0xa00000 0 0x60000>;
+			interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+			dma-channels = <13>;
+			dma-channel-mask = <0xfa>;
+			iommus = <&apps_smmu 0x0616 0x0>;
+			status = "disabled";
+		};
+
 		qupv3_id_1: geniqup@ac0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0x0 0x00ac0000 0x0 0x6000>;
@@ -1004,6 +1053,29 @@ spi16: spi@a94000 {
 			};
 		};
 
+		gpi_dma2: qcom,gpi-dma@c00000 {
+			#dma-cells = <3>;
+			compatible = "qcom,sm8150-gpi-dma";
+			reg = <0 0xc00000 0 0x60000>;
+			interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 591 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 592 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 595 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 596 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 599 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>;
+			dma-channels = <13>;
+			dma-channel-mask = <0xfa>;
+			iommus = <&apps_smmu 0x07b6 0x0>;
+			status = "disabled";
+		};
+
 		qupv3_id_2: geniqup@cc0000 {
 			compatible = "qcom,geni-se-qup";
 			reg = <0x0 0x00cc0000 0x0 0x6000>;
-- 
2.31.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes
  2021-04-16 13:31 ` [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes Felipe Balbi
@ 2021-04-16 13:40   ` Felipe Balbi
  2021-04-16 18:56   ` Konrad Dybcio
  1 sibling, 0 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-04-16 13:40 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi


Hi,

Felipe Balbi <balbi@kernel.org> writes:
> @@ -612,6 +636,8 @@ spi0: spi@880000 {
>  				pinctrl-0 = <&qup_spi0_default>;
>  				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
>  				spi-max-frequency = <50000000>;
> +				dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
> +				       <&gpi_dma0 1 0 QCOM_GPI_SPI>;

one little note. This was for a quick test. I can either remove, keep it
or complete with the rest of the SPIs in this same patch. Let me know
what y'all prefer :-)

-- 
balbi

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes
  2021-04-16 13:31 ` [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes Felipe Balbi
  2021-04-16 13:40   ` Felipe Balbi
@ 2021-04-16 18:56   ` Konrad Dybcio
  2021-04-17  6:20     ` Felipe Balbi
  1 sibling, 1 reply; 6+ messages in thread
From: Konrad Dybcio @ 2021-04-16 18:56 UTC (permalink / raw)
  To: Felipe Balbi, Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi

>one little note. This was for a quick test. I can either remove, keep it
>or complete with the rest of the SPIs in this same patch. Let me know

>what y'all prefer :-)


Yeah, please remove it from this one and send in a separate patch, preferably adding dmas to all the QUPs :)


Aaand since I already asked you to re-send, you might as well fix up the properties order under the nodes (compatible first, then reg, with #dma-cells somewhere at the bottom) and the unit name (should be "dma-controller@...").


Konrad



^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes
  2021-04-16 18:56   ` Konrad Dybcio
@ 2021-04-17  6:20     ` Felipe Balbi
  0 siblings, 0 replies; 6+ messages in thread
From: Felipe Balbi @ 2021-04-17  6:20 UTC (permalink / raw)
  To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Vinod Koul
  Cc: Rob Herring, linux-arm-msm, devicetree, dmaengine, Felipe Balbi


Hi,

(looks like your email client is still refusing to break lines at 80 columns)

Konrad Dybcio <konrad.dybcio@somainline.org> writes:

>>one little note. This was for a quick test. I can either remove, keep it
>>or complete with the rest of the SPIs in this same patch. Let me know
>
>>what y'all prefer :-)
>
>
> Yeah, please remove it from this one and send in a separate patch, preferably
> adding dmas to all the QUPs :)

done

> Aaand since I already asked you to re-send, you might as well fix up the
> properties order under the nodes (compatible first, then reg, with #dma-cells
> somewhere at the bottom) and the unit name (should be "dma-controller@...").

done and done :-)

-- 
balbi

^ permalink raw reply	[flat|nested] 6+ messages in thread

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Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-16 13:31 [PATCH 0/2] arm64: sm8150: Add minimal DMA support Felipe Balbi
2021-04-16 13:31 ` [PATCH 1/2] DMA: qcom: gpi: add compatible for sm8150 Felipe Balbi
2021-04-16 13:31 ` [PATCH 2/2] arm64: boot: dts: qcom: sm8150: Add DMA nodes Felipe Balbi
2021-04-16 13:40   ` Felipe Balbi
2021-04-16 18:56   ` Konrad Dybcio
2021-04-17  6:20     ` Felipe Balbi

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