From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D310C433E0 for ; Fri, 15 May 2020 15:59:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 326F6206D8 for ; Fri, 15 May 2020 15:59:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="KEEKWvbt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726863AbgEOP7F (ORCPT ); Fri, 15 May 2020 11:59:05 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:31439 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726652AbgEOP7F (ORCPT ); Fri, 15 May 2020 11:59:05 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589558343; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=qxsW8J//wgvAmbboym2DVFK7T00YKI0V2xlBc3zGI9A=; b=KEEKWvbt+O6HXnwQsAaEoIYWqSgmNqLEOWTh0z5E3xveaK90fuJ1Ti3B+I1CH5J/CGZuzyGD KHXbT2TmggNBOTMuYmjWqN0apvplZwwdNEc0HX39+GvEqJgC52nEGN0DWL+8inxXM7Q/DtoX 4NhjQPpmSGzxX4DmpfXV+HmZBJc= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ebebc30.7fd92b617f10-smtp-out-n05; Fri, 15 May 2020 15:58:40 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 243A2C43636; Fri, 15 May 2020 15:58:40 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1D64AC433D2; Fri, 15 May 2020 15:58:39 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 15 May 2020 21:28:39 +0530 From: Sai Prakash Ranjan To: Mathieu Poirier Cc: Suzuki K Poulose , linux-arm-msm , Coresight ML , Linux Kernel Mailing List , Stephen Boyd , Tingwei Zhang , Leo Yan , linux-arm-kernel , Mike Leach Subject: Re: [PATCH] coresight: etm4x: Add support to disable trace unit power up In-Reply-To: <20200515155144.GA7085@xps15> References: <20200514105915.27516-1-saiprakash.ranjan@codeaurora.org> <20200514180055.GA29384@xps15> <2c932d57288508cc72a6ee323cf5595e@codeaurora.org> <20200515155144.GA7085@xps15> Message-ID: <89be7790b7fdd4b0268919e060198926@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Mathieu, On 2020-05-15 21:21, Mathieu Poirier wrote: > On Fri, May 15, 2020 at 08:37:13PM +0530, Sai Prakash Ranjan wrote: >> Hi Mathieu, >> >> On 2020-05-15 20:22, Mathieu Poirier wrote: >> > On Thu, 14 May 2020 at 12:39, Sai Prakash Ranjan >> > wrote: >> > > >> > > Hi Mathieu, >> > > >> > > On 2020-05-14 23:30, Mathieu Poirier wrote: >> > > > Good morning Sai, >> > > > >> > > > On Thu, May 14, 2020 at 04:29:15PM +0530, Sai Prakash Ranjan wrote: >> > > >> From: Tingwei Zhang >> > > >> >> > > >> On some Qualcomm Technologies Inc. SoCs like SC7180, there >> > > >> exists a hardware errata where the APSS (Application Processor >> > > >> SubSystem)/CPU watchdog counter is stopped when ETM register >> > > >> TRCPDCR.PU=1. >> > > > >> > > > Fun stuff... >> > > > >> > > >> > > Yes :) >> > > >> > > >> Since the ETMs share the same power domain as >> > > >> that of respective CPU cores, they are powered on when the >> > > >> CPU core is powered on. So we can disable powering up of the >> > > >> trace unit after checking for this errata via new property >> > > >> called "qcom,tupwr-disable". >> > > >> >> > > >> Signed-off-by: Tingwei Zhang >> > > >> Co-developed-by: Sai Prakash Ranjan >> > > >> Signed-off-by: Sai Prakash Ranjan >> > > > >> > > > Co-developed-by: Sai Prakash Ranjan >> > > > Signed-off-by: Tingwei Zhang >> > > > >> > > >> > > Tingwei is the author, so if I understand correctly, his signed-off-by >> > > should appear first, am I wrong? >> > >> > It's a gray area and depends on who's code is more prevalent in the >> > patch. If Tingwei wrote the most of the code then his name is in the >> > "from:" section, yours as co-developer and he signs off on it (as I >> > suggested). If you did most of the work then it is the opposite. >> > Adding a Co-developed and a signed-off with the same name doesn't make >> > sense. >> > >> >> I did check the documentation for submitting patches: >> Documentation/process/submitting-patches.rst. And it clearly states >> that "Co-developed-by must be followed by Signed-off by the co-author >> and the last Signed-off-by: must always be that of the developer >> submitting the patch". >> >> Quoting below from the doc: >> >> Co-developed-by: ...Since >> Co-developed-by: denotes authorship, every Co-developed-by: must be >> immediately >> followed by a Signed-off-by: of the associated co-author. Standard >> sign-off >> procedure applies, i.e. the ordering of Signed-off-by: tags should >> reflect >> the >> chronological history of the patch insofar as possible, regardless of >> whether >> the author is attributed via From: or Co-developed-by:. Notably, the >> last >> Signed-off-by: must always be that of the developer submitting the >> patch. > > Ah yes, glad to see that got clarified. You can ignore my > recommendation on > that snippet. > >> >> > > >> > > >> --- >> > > >> .../devicetree/bindings/arm/coresight.txt | 6 ++++ >> > > >> drivers/hwtracing/coresight/coresight-etm4x.c | 29 >> > > >> ++++++++++++------- >> > > > >> > > > Please split in two patches. >> > > > >> > > >> > > Sure, I will split the dt-binding into separate patch, checkpatch did >> > > warn. >> > >> > And you still sent me the patch... I usually run checkpatch before >> > all the submissions I review and flatly ignore patches that return >> > errors. You got lucky... >> > >> >> I did not mean to ignore it or else I wouldn't have run checkpatch >> itself. >> I checked other cases like "arm,scatter-gather" where the binding and >> the >> driver change was in a single patch, hence I thought it's not a very >> strict >> rule. > > The patch has another warning for a line over 80 characters, that > should have > been fixed before sending. Putting DT changes in a separate patch is > always > better for the DT people. They review tons of patches and making their > life > easier is always a good thing. > Ok, I will fix this and resend. I did not want to change it in case if it affects readability since most maintainers prefer to ignore this 80 characters warning if it affects readability. I will keep this in mind for future patches as well. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation