Re: [PATCH] clk: qcom: gcc-sdm845: Use floor ops for sdcc clks

[Taniya Das <tdas@codeaurora.org>]

Hi,

On 8/31/2019 3:04 AM, Doug Anderson wrote:
> Hi,
> 
> On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd <swboyd@chromium.org> wrote:
>>
>> Some MMC cards fail to enumerate properly when inserted into an MMC slot
>> on sdm845 devices. This is because the clk ops for qcom clks round the
>> frequency up to the nearest rate instead of down to the nearest rate.
>> For example, the MMC driver requests a frequency of 52MHz from
>> clk_set_rate() but the qcom implementation for these clks rounds 52MHz
>> up to the next supported frequency of 100MHz. The MMC driver could be
>> modified to request clk rate ranges but for now we can fix this in the
>> clk driver by changing the rounding policy for this clk to be round down
>> instead of round up.
> 
> Since all the MMC rates are expressed as "maximum" clock rates doing
> it like you are doing it now seems sane.
> 
> 

Looks like we need to update/track it for all SDCC clocks for all targets.


>> Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845")
>> Reported-by: Douglas Anderson <dianders@chromium.org>
>> Cc: Taniya Das <tdas@codeaurora.org>
>> Signed-off-by: Stephen Boyd <swboyd@chromium.org>
>> ---
>>
>> I suppose we need to do this for all the sdc clks in qcom driver?
> 
> Seems like a good idea to me.
> 
> 
>>   drivers/clk/qcom/gcc-sdm845.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> 
> 
> -Doug
> 

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