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From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
To: Vinod Koul <vkoul@kernel.org>
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	bhelgaas@google.com, robh+dt@kernel.org, kishon@ti.com,
	mturquette@baylibre.com, sboyd@kernel.org, svarbanov@mm-sol.com,
	lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de,
	mgautam@codeaurora.org, smuthayy@codeaurora.org,
	varada@codeaurora.org, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	stable@vger.kernel.org,
	Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Subject: Re: [PATCH 5/9] phy: qcom-qmp: use correct values for ipq8074 gen2 pcie phy init
Date: Wed, 29 Jul 2020 12:15:13 +0530	[thread overview]
Message-ID: <9988249f-53aa-e615-f64b-28c0c0641ab4@codeaurora.org> (raw)
In-Reply-To: <20200713055558.GB34333@vkoul-mobl>


On 7/13/2020 11:25 AM, Vinod Koul wrote:
> On 05-07-20, 14:47, Sivaprakash Murugesan wrote:
>> There were some problem in ipq8074 gen2 pcie phy init sequence, fix
> Can you please describe these problems, it would help review to
> understand the issues and also for future reference to you

Hi Vinod,

As you mentioned we are updating few register values

and also adding clocks and resets.

the register values are given by the Hardware team and there

is some fine tuning values are provided by Hardware team for the

issues we faced downstream.

Also, few register values are typos for example QSERDES_RX_SIGDET_CNTRL

is a rx register it was wrongly in serdes table.

I will try to mention these details in next patch.


  reply	other threads:[~2020-07-29  6:45 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-05  9:17 [PATCH 0/9] Add PCIe support for IPQ8074 Sivaprakash Murugesan
2020-07-05  9:17 ` [PATCH 1/9] dt-bindings: pci: Add ipq8074 gen3 pci compatible Sivaprakash Murugesan
2020-07-15 21:50   ` Rob Herring
2020-07-05  9:17 ` [PATCH 2/9] dt-bindings: phy: qcom,qmp: Add dt-binding for ipq8074 gen3 pcie phy Sivaprakash Murugesan
2020-07-15 21:50   ` Rob Herring
2020-07-05  9:17 ` [PATCH 3/9] clk: qcom: ipq8074: Add missing bindings for pcie Sivaprakash Murugesan
2020-07-11 16:12   ` Stephen Boyd
2020-07-05  9:17 ` [PATCH 4/9] clk: qcom: ipq8074: Add missing clocks " Sivaprakash Murugesan
2020-07-11 16:10   ` Stephen Boyd
2020-07-11 16:12   ` Stephen Boyd
2020-07-05  9:17 ` [PATCH 5/9] phy: qcom-qmp: use correct values for ipq8074 gen2 pcie phy init Sivaprakash Murugesan
2020-07-13  5:55   ` Vinod Koul
2020-07-29  6:45     ` Sivaprakash Murugesan [this message]
2020-08-03 11:03       ` Vinod Koul
2020-07-05  9:17 ` [PATCH 6/9] phy: qcom-qmp: Add compatible for ipq8074 pcie gen3 qmp phy Sivaprakash Murugesan
2020-07-13  6:04   ` Vinod Koul
2020-07-29  7:46     ` Sivaprakash Murugesan
2020-07-05  9:17 ` [PATCH 7/9] pci: dwc: qcom: do phy power on before pcie init Sivaprakash Murugesan
2020-07-05  9:17 ` [PATCH 8/9] pci: qcom: Add support for ipq8074 pci controller Sivaprakash Murugesan
2020-07-05  9:18 ` [PATCH 9/9] arm64: dts: ipq8074: Fixup pcie dts nodes Sivaprakash Murugesan
2020-07-06 23:49 ` [PATCH 0/9] Add PCIe support for IPQ8074 Bjorn Helgaas

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