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Thu, 02 Mar 2023 08:25:02 -0800 (PST) MIME-Version: 1.0 References: <07ea204c6488e7e78956bca09f59bf9c49353780.1677749625.git.quic_varada@quicinc.com> In-Reply-To: <07ea204c6488e7e78956bca09f59bf9c49353780.1677749625.git.quic_varada@quicinc.com> From: Dmitry Baryshkov Date: Thu, 2 Mar 2023 18:24:46 +0200 Message-ID: Subject: Re: [PATCH 4/8] clk: qcom: gcc-ipq9574: Add USB related clocks To: Varadarajan Narayanan Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, 2 Mar 2023 at 11:56, Varadarajan Narayanan wrote: > > Add the clocks needed for enabling USB in IPQ9574 > > Signed-off-by: Varadarajan Narayanan > --- > drivers/clk/qcom/gcc-ipq9574.c | 35 ++++++++++++++++++++++++++++ > include/dt-bindings/clock/qcom,ipq9574-gcc.h | 2 ++ > 2 files changed, 37 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c > index 1bf33d5..85cc6a5 100644 > --- a/drivers/clk/qcom/gcc-ipq9574.c > +++ b/drivers/clk/qcom/gcc-ipq9574.c > @@ -2041,6 +2041,39 @@ static struct clk_regmap_mux usb0_pipe_clk_src = { > }, > }; > > +static struct clk_branch gcc_usb0_pipe_clk = { > + .halt_reg = 0x2c054, > + .halt_check = BRANCH_HALT_DELAY, > + .clkr = { > + .enable_reg = 0x2c054, > + .enable_mask = BIT(0), > + .hw.init = &(struct clk_init_data){ > + .name = "gcc_usb0_pipe_clk", > + .parent_hws = (const struct clk_hw *[]){ > + &usb0_pipe_clk_src.clkr.hw }, Please move the closing bracket to the next line. > + .num_parents = 1, > + .flags = CLK_SET_RATE_PARENT, > + .ops = &clk_branch2_ops, > + }, > + }, > +}; > + > +static struct clk_branch gcc_usb0_sleep_clk = { > + .halt_reg = 0x2c058, > + .clkr = { > + .enable_reg = 0x2c058, > + .enable_mask = BIT(0), > + .hw.init = &(struct clk_init_data){ > + .name = "gcc_usb0_sleep_clk", > + .parent_hws = (const struct clk_hw *[]){ > + &gcc_sleep_clk_src.clkr.hw }, > + .num_parents = 1, > + .flags = CLK_SET_RATE_PARENT, > + .ops = &clk_branch2_ops, > + }, > + }, > +}; > + > static const struct freq_tbl ftbl_sdcc_apps_clk_src[] = { > F(144000, P_XO, 16, 12, 125), > F(400000, P_XO, 12, 1, 5), > @@ -4008,6 +4041,8 @@ static struct clk_regmap *gcc_ipq9574_clks[] = { > [GCC_USB0_MOCK_UTMI_CLK] = &gcc_usb0_mock_utmi_clk.clkr, > [USB0_PIPE_CLK_SRC] = &usb0_pipe_clk_src.clkr, > [GCC_USB0_PHY_CFG_AHB_CLK] = &gcc_usb0_phy_cfg_ahb_clk.clkr, > + [GCC_USB0_PIPE_CLK] = &gcc_usb0_pipe_clk.clkr, > + [GCC_USB0_SLEEP_CLK] = &gcc_usb0_sleep_clk.clkr, > [SDCC1_APPS_CLK_SRC] = &sdcc1_apps_clk_src.clkr, > [GCC_SDCC1_APPS_CLK] = &gcc_sdcc1_apps_clk.clkr, > [SDCC1_ICE_CORE_CLK_SRC] = &sdcc1_ice_core_clk_src.clkr, > diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h > index c89e96d..96b7c0b 100644 > --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h > +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h > @@ -214,4 +214,6 @@ > #define GCC_SNOC_PCIE1_1LANE_S_CLK 205 > #define GCC_SNOC_PCIE2_2LANE_S_CLK 206 > #define GCC_SNOC_PCIE3_2LANE_S_CLK 207 > +#define GCC_USB0_PIPE_CLK 208 > +#define GCC_USB0_SLEEP_CLK 209 > #endif > -- > 2.7.4 > -- With best wishes Dmitry