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bh=Mt21cFemr1uGIYO6Ni8xKf8eOU75PbYRiUnsYWmiaWA=; b=bs3DQD93z+NrugmukuQuaGVqHbZ4OR4NwqrqJKDnyrPRS0h0gvpxt7+Xf6HTxbske/ h1I2fC3swWNXyHq1rc3473JeUAB+PIl/lkqWKIgzV1jOrsbBxJpxRG1pWT+UdVVjHIxn DCEQ+5RbA8+Ywsr5FL/LCWrWXN9o0/yJfztUbaeeeprM6DgDDcBu3FIuiEjaqTYK3lFH C2v+0j1hGQ+gTMucAeoIrUlXOBhw6og37x/6S/W6RM0+Z9b5x/odO/eicUuKlQRiJTzQ Rfb3bcOAvCDCNaGV3NPiurD8lBSrbU8dUXkU6ih7KVdKboPoquq3RPpbuJt59jBIIXFA 99lw== X-Gm-Message-State: AOAM532GbQI+D3zCq3IY4vAJL23tb3mvc+HwS8B6Z9SyzYvMBY5L9AZn AyaaRfpZ6uGBQjGtO+2qQZHD2QypQ/n2ihRNcDXBdH2dCyUPow== X-Google-Smtp-Source: ABdhPJwYBbXcefLhcu+PWD1HrBfsDhAre9yVj7OYRvNyQ7YV5qYnx6zoiZBqLfiwE1E64JxyAcZjhvQiyT9tr77xAtc= X-Received: by 2002:a5d:8242:: with SMTP id n2mr663422ioo.198.1624323625054; Mon, 21 Jun 2021 18:00:25 -0700 (PDT) MIME-Version: 1.0 References: <20210612094631.89980-1-martin.botka@somainline.org> <20210612094631.89980-3-martin.botka@somainline.org> In-Reply-To: From: Jassi Brar Date: Mon, 21 Jun 2021 20:00:14 -0500 Message-ID: Subject: Re: [PATCH V3 3/3] mailbox: qcom-apcs: Add SM6125 compatible To: Bjorn Andersson Cc: Rob Herring , Martin Botka , ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , AngeloGioacchino Del Regno , Marijn Suijten , jamipkettunen@somainline.org, Andy Gross , linux-arm-msm , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Jun 21, 2021 at 6:35 PM Bjorn Andersson wrote: > > On Mon 21 Jun 18:19 CDT 2021, Rob Herring wrote: > > > On Mon, Jun 21, 2021 at 5:10 PM Jassi Brar wrote: > > > > > > On Mon, Jun 21, 2021 at 2:46 PM Rob Herring wrote: > > > > > > > > On Sun, Jun 20, 2021 at 10:03 PM Jassi Brar wrote: > > > > > > > > > > On Sat, Jun 12, 2021 at 4:46 AM Martin Botka > > > > > wrote: > > > > > > > > > > > > This commit adds compatible for the SM6125 SoC > > > > > > > > > > > > Signed-off-by: Martin Botka > > > > > > --- > > > > > > Changes in V2: > > > > > > None > > > > > > Changes in V3: > > > > > > Change compatible to apcs-hmss-global > > > > > > drivers/mailbox/qcom-apcs-ipc-mailbox.c | 5 +++++ > > > > > > 1 file changed, 5 insertions(+) > > > > > > > > > > > > diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > > > > > > index f25324d03842..f24c5ad8d658 100644 > > > > > > --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c > > > > > > +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c > > > > > > @@ -57,6 +57,10 @@ static const struct qcom_apcs_ipc_data sdm660_apcs_data = { > > > > > > .offset = 8, .clk_name = NULL > > > > > > }; > > > > > > > > > > > > +static const struct qcom_apcs_ipc_data sm6125_apcs_data = { > > > > > > + .offset = 8, .clk_name = NULL > > > > > > +}; > > > > > > + > > > > > > static const struct qcom_apcs_ipc_data apps_shared_apcs_data = { > > > > > > .offset = 12, .clk_name = NULL > > > > > > }; > > > > > > @@ -166,6 +170,7 @@ static const struct of_device_id qcom_apcs_ipc_of_match[] = { > > > > > > { .compatible = "qcom,sc8180x-apss-shared", .data = &apps_shared_apcs_data }, > > > > > > { .compatible = "qcom,sdm660-apcs-hmss-global", .data = &sdm660_apcs_data }, > > > > > > { .compatible = "qcom,sdm845-apss-shared", .data = &apps_shared_apcs_data }, > > > > > > + { .compatible = "qcom,sm6125-apcs-hmss-global", .data = &sm6125_apcs_data }, > > > > > > { .compatible = "qcom,sm8150-apss-shared", .data = &apps_shared_apcs_data }, > > > > > > { .compatible = "qcom,sdx55-apcs-gcc", .data = &sdx55_apcs_data }, > > > > > > {} > > > > > > > > > > > These all are basically different names for the same controller. > > > > > The 'offset' is a configuration parameter and the 'clock', when NULL, > > > > > is basically some "always-on" clock. > > > > > I am sure we wouldn't be doing it, if the controller was third-party. > > > > > > > > If newer implementations are 'the same', then they should have a > > > > fallback compatible to the existing one that is the same and no driver > > > > change is needed. If the differences are board or instance (within an > > > > SoC) specific, then a DT property would be appropriate. > > > > > > > The controllers (13 now) only differ by the 'offset' where the > > > registers are mapped. Clock-name is a pure s/w artifact. > > > So, maybe we could push all these in DT. > > > > Why is 'reg' not used for the offset? > > > > The DT node and its "reg" describes the whole IP block. > > The particular register that we care of has, as you can see, moved > around during the various platforms and some incarnations of this IP > block provides controls for CPU-related clocks as well. > > We can certainly have the multiple compatible points to the same > apcs_data, but I'm not able to spot a reasonable "catch-all compatible" > given that I don't see any natural groupings. > Any platform that comes later may reuse the already available compatible. For example drop this patch and reuse "qcom,sdm660-apcs-hmss-global" ? > > In any case, we can't really get rid of the first 13 instances though... > > > > Right, we have the problem that we have DTBs out there that relies on > these compatibles, but as Jassi requests we'd have to start describing > the internal register layout in DT - which this binding purposefully > avoids. > Not these strings, but 'offset' and 'clock-name' as optional properties that new platforms can use. cheers.