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[209.85.217.41]) by smtp.gmail.com with ESMTPSA id l9sm30158vsr.21.2020.05.05.17.19.00 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 05 May 2020 17:19:00 -0700 (PDT) Received: by mail-vs1-f41.google.com with SMTP id s11so8641vsm.3 for ; Tue, 05 May 2020 17:19:00 -0700 (PDT) X-Received: by 2002:a05:6102:4d:: with SMTP id k13mr5406597vsp.198.1588724340078; Tue, 05 May 2020 17:19:00 -0700 (PDT) MIME-Version: 1.0 References: <20200504213624.1.Ibc8eeddcee94984a608d6900b46f9ffde4045da4@changeid> <20200505082436.GD9658@pendragon.ideasonboard.com> <20200505210609.GA6094@pendragon.ideasonboard.com> <20200505211401.GC6094@pendragon.ideasonboard.com> In-Reply-To: From: Doug Anderson Date: Tue, 5 May 2020 17:18:48 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] drm/bridge: ti-sn65dsi86: Implement lane reordering + polarity To: Laurent Pinchart Cc: Andrzej Hajda , Neil Armstrong , Rob Clark , Sean Paul , linux-arm-msm , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , dri-devel , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Tue, May 5, 2020 at 2:24 PM Doug Anderson wrote: > > Hi, > > On Tue, May 5, 2020 at 2:14 PM Laurent Pinchart > wrote: > > > > > I'll add this documentation into the comments of the yaml, but I'm not > > > going to try to implement enforcement at the yaml level. > > > > Why not ? :-) > > Because trying to describe anything in the yaml bindings that doesn't > fit in the exact pattern of things that the yaml bindings are designed > to check is like constructing the empire state building with only > toothpicks. > > If you want to suggest some syntax that would actually make this > doable without blowing out the yaml bindings then I'm happy to add it. > Me being naive would assume that we'd need to do an exhaustive list of > the OK combinations. That would be fine for the 1-land and 2-lane > cases, but for 4 lanes that means adding 256 entries to the bindings. > > I think the correct way to do this would require adding code in the > project but that's > really only done for generic subsystem-level concepts and not for a > single driver. OK. Looked at your review of the .yaml and the "uniqueItems" is probably the bit I didn't think of. With that I can limit this but it's still a little awkward. I still haven't figured out how to force data-lanes and lane-polarities to have the same number of items, too. I'll add this as an add-on patch to my v2 and folks can decide if they like it or hate it. # See ../../media/video-interface.txt for details. data-lanes: oneOf: - minItems: 1 maxItems: 1 uniqueItems: true items: enum: - 0 - 1 description: If you have 1 logical lane it can go to either physical port 0 or port 1. Port 0 is suggested. - minItems: 2 maxItems: 2 uniqueItems: true items: enum: - 0 - 1 description: If you have 2 logical lanes they can be reordered on physical ports 0 and 1. - minItems: 4 maxItems: 4 uniqueItems: true items: enum: - 0 - 1 - 2 - 3 description: If you have 4 logical lanes they can be reordered on in any way. -Doug