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[209.85.210.178]) by smtp.gmail.com with ESMTPSA id n22sm937667pff.57.2021.08.18.17.09.45 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 18 Aug 2021 17:09:45 -0700 (PDT) Received: by mail-pf1-f178.google.com with SMTP id t42so1256053pfg.12 for ; Wed, 18 Aug 2021 17:09:45 -0700 (PDT) X-Received: by 2002:a5d:9eda:: with SMTP id a26mr9282243ioe.166.1629331471737; Wed, 18 Aug 2021 17:04:31 -0700 (PDT) MIME-Version: 1.0 References: <1628754078-29779-1-git-send-email-rajpat@codeaurora.org> <1628754078-29779-4-git-send-email-rajpat@codeaurora.org> In-Reply-To: <1628754078-29779-4-git-send-email-rajpat@codeaurora.org> From: Doug Anderson Date: Wed, 18 Aug 2021 17:04:18 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 3/7] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes To: Rajesh Patil Cc: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , linux-arm-msm , LKML , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Rajendra Nayak , Sai Prakash Ranjan , msavaliy@qti.qualcomm.com, satya priya , Roja Rani Yarubandi Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Thu, Aug 12, 2021 at 12:42 AM Rajesh Patil wrote: > > @@ -542,8 +561,305 @@ > #address-cells = <2>; > #size-cells = <2>; > ranges; > + iommus = <&apps_smmu 0x123 0x0>; > status = "disabled"; > > + i2c0: i2c@980000 { Not a full review of your patch (I think Matthias has already looked in a bunch of detail), but can I also request that you add i2c and spi aliases in your next spin (I think you have to spin this anyway, right?) Add these under the "aliases" mode before the mmc ones (to keep sort order good): i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; i2c6 = &i2c6; i2c7 = &i2c7; i2c8 = &i2c8; i2c9 = &i2c9; i2c10 = &i2c10; i2c11 = &i2c11; i2c12 = &i2c12; i2c13 = &i2c13; i2c14 = &i2c14; i2c15 = &i2c15; ...and these after: spi0 = &spi0; spi1 = &spi1; spi2 = &spi2; spi3 = &spi3; spi4 = &spi4; spi5 = &spi5; spi6 = &spi6; spi7 = &spi7; spi8 = &spi8; spi9 = &spi9; spi10 = &spi10; spi11 = &spi11; spi12 = &spi12; spi13 = &spi13; spi14 = &spi14; spi15 = &spi15; The "Quad SPI" doesn't get an alias, but that's OK. It doesn't have a well-defined number in the manual and it's fine to have it be auto-assigned. It's really just confusing when there's something with a well-defined number in the manual and it's a _different_ one in the logs. ;-) -Doug