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[209.85.217.46]) by smtp.gmail.com with ESMTPSA id 41sm2233342uaf.8.2020.01.31.08.48.49 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 Jan 2020 08:48:50 -0800 (PST) Received: by mail-vs1-f46.google.com with SMTP id 7so4739219vsr.10 for ; Fri, 31 Jan 2020 08:48:49 -0800 (PST) X-Received: by 2002:a67:e342:: with SMTP id s2mr7136533vsm.198.1580489329211; Fri, 31 Jan 2020 08:48:49 -0800 (PST) MIME-Version: 1.0 References: <20200130211231.224656-1-dianders@chromium.org> <20200130131220.v3.7.I513cd73b16665065ae6c22cf594d8b543745e28c@changeid> In-Reply-To: From: Doug Anderson Date: Fri, 31 Jan 2020 08:48:37 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 07/15] dt-bindings: clock: Fix qcom,gpucc bindings for sdm845/sc7180/msm8998 To: Rob Herring Cc: Andy Gross , Bjorn Andersson , Stephen Boyd , Jeffrey Hugo , Taniya Das , Jeffrey Hugo , linux-arm-msm , Harigovindan P , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Matthias Kaehlcke , Kalyan Thota , Mark Rutland , linux-clk , "Kristian H. Kristensen" , Michael Turquette , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, On Fri, Jan 31, 2020 at 8:43 AM Rob Herring wrote: > > On Thu, Jan 30, 2020 at 3:12 PM Douglas Anderson wrote: > > > > The qcom,gpucc bindings had a few problems with them: > > > > 1. When things were converted to yaml the name of the "gpll0 main" > > clock got changed from "gpll0" to "gpll0_main". Change it back for > > msm8998. > > > > 2. Apparently there is a push not to use purist aliases for clocks but > > instead to just use the internal Qualcomm names. For sdm845 and > > sc7180 (where the drivers haven't already been changed) move in > > this direction. > > > > Things were also getting complicated harder to deal with by jamming > > several SoCs into one file. Splitting simplifies things. > > > > Fixes: 5c6f3a36b913 ("dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings") > > Signed-off-by: Douglas Anderson > > --- > > > > Changes in v3: > > - Added pointer to inlude file in description. > > - Everyone but msm8998 now uses internal QC names. > > - Fixed typo grpahics => graphics > > - Split bindings into 3 files. > > > > Changes in v2: > > - Patch ("dt-bindings: clock: Fix qcom,gpucc...") new for v2. > > > > .../devicetree/bindings/clock/qcom,gpucc.yaml | 72 ------------------- > > .../bindings/clock/qcom,msm8998-gpucc.yaml | 66 +++++++++++++++++ > > .../bindings/clock/qcom,sc7180-gpucc.yaml | 72 +++++++++++++++++++ > > .../bindings/clock/qcom,sdm845-gpucc.yaml | 72 +++++++++++++++++++ > > 4 files changed, 210 insertions(+), 72 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sdm845-gpucc.yaml > > I'm not seeing any differences in sdm845 and sc7180. Do those really > need to be separate? It doesn't have to be all combined or all > separate. They are the same, other than pointing to a different #include file. I debated whether to put them in one file (arbitrarily named after one SoC or the other) or to put them in individual files. I got the impression from Stephen that he'd prefer them to be separate files even in the case that they were 99% identical, but I certainly could have misunderstood. I'll do whatever you guys agree to. If you want them in one file I'll probably name it "qcom,sdm845-gpucc.yaml" just because that SoC is earlier, unless someone tells me otherwise. -Doug