Re: [PATCH v2 3/4] PCIe: qcom: Add support to control pipe clk mux

From: Stephen Boyd <swboyd@chromium.org>
To: Prasad Malisetty <pmaliset@codeaurora.org>,
	agross@kernel.org, bhelgaas@google.com,
	bjorn.andersson@linaro.org, lorenzo.pieralisi@arm.com,
	robh+dt@kernel.org, svarbanov@mm-sol.com
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
	mgautam@codeaurora.org, dianders@chromium.org, mka@chromium.org,
	sanm@codeaurora.org
Subject: Re: [PATCH v2 3/4] PCIe: qcom: Add support to control pipe clk mux
Date: Sat, 5 Jun 2021 21:26:42 +0000	[thread overview]
Message-ID: <CAE-0n50WxF_S7Zo4MhFqppjSELTFo7nOEtmCXJ4DoqvhF7kMQw@mail.gmail.com> (raw)
In-Reply-To: <1622904059-21244-4-git-send-email-pmaliset@codeaurora.org>

Quoting Prasad Malisetty (2021-06-05 07:40:58)
> In PCIe driver pipe-clk mux needs to switch between pipe_clk
> and XO for GDSC enable. This is done by setting pipe_clk mux
> as parent of pipe_clk after phy init.

Just to confirm, we can't set this parent via assigned-clock-parents
property in DT?

>
> Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 8a7a300..5cbbea4 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -166,6 +166,9 @@ struct qcom_pcie_resources_2_7_0 {
>         struct regulator_bulk_data supplies[2];
>         struct reset_control *pci_reset;
>         struct clk *pipe_clk;
> +       struct clk *pipe_clk_mux;
> +       struct clk *pipe_ext_src;
> +       struct clk *ref_clk_src;
>  };
>
>  union qcom_pcie_resources {
> @@ -1167,6 +1170,20 @@ static int qcom_pcie_get_resources_2_7_0(struct qcom_pcie *pcie)
>         if (ret < 0)
>                 return ret;
>
> +       if (of_device_is_compatible(dev->of_node, "qcom,pcie-sc7280")) {
> +               res->pipe_clk_mux = devm_clk_get(dev, "pipe_src");
> +               if (IS_ERR(res->pipe_clk_mux))
> +                       return PTR_ERR(res->pipe_clk_mux);
> +
> +               res->pipe_ext_src = devm_clk_get(dev, "pipe_ext");
> +               if (IS_ERR(res->pipe_ext_src))
> +                       return PTR_ERR(res->pipe_ext_src);
> +
> +               res->ref_clk_src = devm_clk_get(dev, "ref");

Is this going to be used by any code?

> +               if (IS_ERR(res->ref_clk_src))
> +                       return PTR_ERR(res->ref_clk_src);
> +       }
> +
>         res->pipe_clk = devm_clk_get(dev, "pipe");
>         return PTR_ERR_OR_ZERO(res->pipe_clk);
>  }
> @@ -1255,6 +1272,11 @@ static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie)
>  static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie)
>  {
>         struct qcom_pcie_resources_2_7_0 *res = &pcie->res.v2_7_0;
> +       struct dw_pcie *pci = pcie->pci;
> +       struct device *dev = pci->dev;
> +
> +       if (of_device_is_compatible(dev->of_node, "qcom,pcie-sc7280"))
> +               clk_set_parent(res->pipe_clk_mux, res->pipe_ext_src);
>
>         return clk_prepare_enable(res->pipe_clk);
>  }
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>