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MIME-Version: 1.0 References: <20210511180728.23781-1-jonathan@marek.ca> <20210511180728.23781-4-jonathan@marek.ca> In-Reply-To: <20210511180728.23781-4-jonathan@marek.ca> From: Robert Foss Date: Wed, 19 May 2021 18:26:57 +0200 Message-ID: Subject: Re: [PATCH 03/17] media: camss: csiphy-3ph: add support for SM8250 CSI DPHY To: Jonathan Marek Cc: MSM , Andrey Konovalov , Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , "open list:QUALCOMM CAMERA SUBSYSTEM DRIVER" , open list Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, 11 May 2021 at 20:08, Jonathan Marek wrote: > > Add support for CSIPHY (2PH/DPHY mode) found on SM8250 hardware. > > Signed-off-by: Jonathan Marek > --- > .../qcom/camss/camss-csiphy-3ph-1-0.c | 144 +++++++++++++++++- > 1 file changed, 137 insertions(+), 7 deletions(-) > > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > index 783b65295d20..61947576ddfb 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > @@ -62,6 +62,7 @@ struct csiphy_reg_t { > u32 csiphy_param_type; > }; > > +/* GEN2 1.0 2PH */ > static const struct > csiphy_reg_t lane_regs_sdm845[5][14] = { > { > @@ -146,6 +147,121 @@ csiphy_reg_t lane_regs_sdm845[5][14] = { > }, > }; > > +/* GEN2 1.2.1 2PH */ > +static const struct > +csiphy_reg_t lane_regs_sm8250[5][20] = { > + { > + {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0900, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0908, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0904, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0904, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0034, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0010, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x001C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, > + {0x0000, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x000c, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0024, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + }, > + { > + {0x0730, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C80, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C88, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C84, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C84, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0734, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0710, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x071C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0708, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, > + {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x070c, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0724, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + }, > + { > + {0x0230, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0A00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0A08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0A04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0A04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0234, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0210, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x021C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0208, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, > + {0x0200, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x020c, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0224, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + }, > + { > + {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0B00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0B08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0B04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0B04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0434, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0410, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x041C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, > + {0x0400, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x040c, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0424, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + }, > + { > + {0x0630, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C00, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C08, 0x10, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0C04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0634, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0610, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x061C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0608, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, > + {0x0600, 0x8D, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x060c, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0624, 0x00, 0x00, CSIPHY_DNP_PARAMS}, > + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, > + {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, > + }, > +}; > + > static void csiphy_hw_version_read(struct csiphy_device *csiphy, > struct device *dev) > { > @@ -298,13 +414,23 @@ static void csiphy_gen1_config_lanes(struct csiphy_device *csiphy, > static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, > u8 settle_cnt) > { > - int i, l; > - u32 val; > + const struct csiphy_reg_t *r; > + int i, l, array_size; > + u32 val, lane_enable; > + > + switch (csiphy->camss->version) { > + case CAMSS_845: > + r = &lane_regs_sdm845[0][0]; > + array_size = ARRAY_SIZE(lane_regs_sdm845[0]); > + break; > + case CAMSS_8250: CAMSS_8250 is not defined until later in the series, in "media: camss: add support for SM8250 camss". > + r = &lane_regs_sm8250[0][0]; > + array_size = ARRAY_SIZE(lane_regs_sm8250[0]); > + break; > + } > > for (l = 0; l < 5; l++) { > - for (i = 0; i < 14; i++) { > - const struct csiphy_reg_t *r = &lane_regs_sdm845[l][i]; > - > + for (i = 0; i < array_size; i++, r++) { > switch (r->csiphy_param_type) { > case CSIPHY_SETTLE_CNT_LOWER_BYTE: > val = settle_cnt & 0xff; > @@ -331,7 +457,10 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy, > > settle_cnt = csiphy_settle_cnt_calc(link_freq, csiphy->timer_clk_rate); > > - val = BIT(c->clk.pos); > + if (csiphy->camss->version == CAMSS_8250) > + val = BIT(7); > + else > + val = BIT(c->clk.pos); sdm845 and sm8250 behave the same way, and I think this chunk should reflect that. With that being said the docs for camss-sdm845 mention that the only valid lane for the clock is #7. I don't know if it is preferred to enforce the restriction in the driver, yaml or both. > for (i = 0; i < c->num_data; i++) > val |= BIT(c->data[i].pos * 2); > > @@ -349,7 +478,8 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy, > if (csiphy->camss->version == CAMSS_8x16 || > csiphy->camss->version == CAMSS_8x96) > csiphy_gen1_config_lanes(csiphy, cfg, settle_cnt); > - else if (csiphy->camss->version == CAMSS_845) > + else if (csiphy->camss->version == CAMSS_845 || > + csiphy->camss->version == CAMSS_8250) > csiphy_gen2_config_lanes(csiphy, settle_cnt); > > /* IRQ_MASK registers - disable all interrupts */ With the above issues fixed; Reviewed-by: Robert Foss