From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1819C433E6 for ; Wed, 10 Feb 2021 14:24:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8F96564E7D for ; Wed, 10 Feb 2021 14:24:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230107AbhBJOYj (ORCPT ); Wed, 10 Feb 2021 09:24:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230328AbhBJOYh (ORCPT ); Wed, 10 Feb 2021 09:24:37 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67437C061756 for ; Wed, 10 Feb 2021 06:23:57 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id gb24so1191729pjb.4 for ; Wed, 10 Feb 2021 06:23:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=MPgybWOPz9O8KUCUEo9OULkMkLL6UsB5l9YUlsh/sYA=; b=QrvT1sx0pSFF+l/9RHgHJWGNWxEmPN+Ow3+annBHqQ5Lwdjk8t50ctv/kusRScAjQi xAhBAYcB++RJlH6lya4XQ4BBxcV7xbK4YIjs635zeBzE7FD/WryRCNtLCTb7jvyNq7kT +oFp6x5Wdlk+GXh011QlsJsCwCVqXp9PprlJqhskqGeXXy8Sv+1ZmeAoIwA2JCdww6Sr F5O5XG8M5hJAo8ZvUXRzaM3/3I7eQiuXwsr7XqgCaxrKPP0aiHF4AKtKkMSMOOZxi+NL XblNJ0C6SFxdEMQylqFvhs5z9W/5fJuQrcq/JpoFn7oAaB8G0aItBOz3aqyReulkyzRX GyeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=MPgybWOPz9O8KUCUEo9OULkMkLL6UsB5l9YUlsh/sYA=; b=W4rv0BAnwFXjFP4SeMGQjywgFWPZkjZQC1aovFf54W8VYk/hdCVyiSuVbbXuOTVXh3 /6wtzvwn7eCxURel+Px1lQyWXiXOICUfy2eJaFlMb2KJyGpn8zdnp9bhkvpvFNBfd2K6 fcMjnAgUGxOClkbU3L1/DZh1R2CQAqR2sTqiG3jHs5l0IuYGCGwSZwcQw3BhdS7dtPjs XkXGc++L9QjXH50F876f4LZWP7wF3/gh9sQMMqVRuUdHrnGYUymu1H+EMclGx55LLyA/ BL+LxSyt3C558lBw1B2RNtXYoajb3taNdme54nys3Z141VzuBbyKrmQdQo+cdWOjkPKJ TY3w== X-Gm-Message-State: AOAM530IJlMT5Czo7KjfjhUiXtUtxOizZj3OcLZ7qTvMmaoNp7bALw27 WvmCReJ5L1VWUP+i9uup/mYhDnx9e2HzRdPuE7lfW4LT8ow= X-Google-Smtp-Source: ABdhPJyHFwLn1YvUc5+umh9ZUkR80qmd5zC5Amw2Hy/evxQddUInk4UiCVAFc7Y7NDYhurh20nXMI8ql53REo1NawqA= X-Received: by 2002:a17:902:e5cf:b029:e2:5300:b1b8 with SMTP id u15-20020a170902e5cfb02900e25300b1b8mr3190228plf.69.1612967036709; Wed, 10 Feb 2021 06:23:56 -0800 (PST) MIME-Version: 1.0 References: <20210210122906.3037085-1-junak.pub@gmail.com> In-Reply-To: <20210210122906.3037085-1-junak.pub@gmail.com> From: Robert Foss Date: Wed, 10 Feb 2021 15:23:45 +0100 Message-ID: Subject: Re: [PATCH] media: qcom: camss: Fix overflows in clock rate calculations To: Vladimir Lypak Cc: Todor Tomov , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , linux-media , MSM , linux-kernel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hey Vladimir, This patch looks good to me, thanks for the submission. Acked-by: Robert Foss On Wed, 10 Feb 2021 at 13:51, Vladimir Lypak wrote: > > Because of u32 type being used to store pixel clock rate, expression used > to calculate pipeline clocks (pixel_clock * bpp) produces wrong value due > to integer overflow. This patch changes data type used to store, pass and > retrieve pixel_clock from u32 to u64 to make this mistake less likely to > be repeated in the future. > > Signed-off-by: Vladimir Lypak > --- > drivers/media/platform/qcom/camss/camss-csid.c | 2 +- > drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c | 4 ++-- > drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c | 4 ++-- > drivers/media/platform/qcom/camss/camss-csiphy.c | 4 ++-- > drivers/media/platform/qcom/camss/camss-csiphy.h | 2 +- > drivers/media/platform/qcom/camss/camss-vfe.c | 4 ++-- > drivers/media/platform/qcom/camss/camss.c | 2 +- > drivers/media/platform/qcom/camss/camss.h | 2 +- > 8 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c > index be3fe76f3dc30..6307b889baa69 100644 > --- a/drivers/media/platform/qcom/camss/camss-csid.c > +++ b/drivers/media/platform/qcom/camss/camss-csid.c > @@ -462,7 +462,7 @@ static irqreturn_t csid_isr(int irq, void *dev) > static int csid_set_clock_rates(struct csid_device *csid) > { > struct device *dev = csid->camss->dev; > - u32 pixel_clock; > + u64 pixel_clock; > int i, j; > int ret; > > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c > index 12bce391d71fd..ec66d1557b8b1 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c > +++ b/drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c > @@ -57,7 +57,7 @@ static void csiphy_reset(struct csiphy_device *csiphy) > * Return settle count value or 0 if the CSI2 pixel clock > * frequency is not available > */ > -static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, > +static u8 csiphy_settle_cnt_calc(u64 pixel_clock, u8 bpp, u8 num_lanes, > u32 timer_clk_rate) > { > u32 mipi_clock; /* Hz */ > @@ -83,7 +83,7 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, > > static void csiphy_lanes_enable(struct csiphy_device *csiphy, > struct csiphy_config *cfg, > - u32 pixel_clock, u8 bpp, u8 lane_mask) > + u64 pixel_clock, u8 bpp, u8 lane_mask) > { > struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; > u8 settle_cnt; > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > index 97cb9de850315..cd6eb88a7c153 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c > @@ -113,7 +113,7 @@ static irqreturn_t csiphy_isr(int irq, void *dev) > * Return settle count value or 0 if the CSI2 pixel clock > * frequency is not available > */ > -static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, > +static u8 csiphy_settle_cnt_calc(u64 pixel_clock, u8 bpp, u8 num_lanes, > u32 timer_clk_rate) > { > u32 mipi_clock; /* Hz */ > @@ -137,7 +137,7 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes, > > static void csiphy_lanes_enable(struct csiphy_device *csiphy, > struct csiphy_config *cfg, > - u32 pixel_clock, u8 bpp, u8 lane_mask) > + u64 pixel_clock, u8 bpp, u8 lane_mask) > { > struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg; > u8 settle_cnt; > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c > index 509c9a59c09cd..61628f55c4f63 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy.c > +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c > @@ -102,7 +102,7 @@ static u8 csiphy_get_bpp(const struct csiphy_format *formats, > static int csiphy_set_clock_rates(struct csiphy_device *csiphy) > { > struct device *dev = csiphy->camss->dev; > - u32 pixel_clock; > + u64 pixel_clock; > int i, j; > int ret; > > @@ -238,7 +238,7 @@ static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg) > static int csiphy_stream_on(struct csiphy_device *csiphy) > { > struct csiphy_config *cfg = &csiphy->cfg; > - u32 pixel_clock; > + u64 pixel_clock; > u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg); > u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats, > csiphy->fmt[MSM_CSIPHY_PAD_SINK].code); > diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h > index f7967ef836dcc..450c8247bd533 100644 > --- a/drivers/media/platform/qcom/camss/camss-csiphy.h > +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h > @@ -50,7 +50,7 @@ struct csiphy_hw_ops { > void (*reset)(struct csiphy_device *csiphy); > void (*lanes_enable)(struct csiphy_device *csiphy, > struct csiphy_config *cfg, > - u32 pixel_clock, u8 bpp, u8 lane_mask); > + u64 pixel_clock, u8 bpp, u8 lane_mask); > void (*lanes_disable)(struct csiphy_device *csiphy, > struct csiphy_config *cfg); > irqreturn_t (*isr)(int irq, void *dev); > diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c > index fae2b513b2f9d..b2c95b46ce661 100644 > --- a/drivers/media/platform/qcom/camss/camss-vfe.c > +++ b/drivers/media/platform/qcom/camss/camss-vfe.c > @@ -1112,7 +1112,7 @@ static inline void vfe_isr_halt_ack(struct vfe_device *vfe) > static int vfe_set_clock_rates(struct vfe_device *vfe) > { > struct device *dev = vfe->camss->dev; > - u32 pixel_clock[MSM_VFE_LINE_NUM]; > + u64 pixel_clock[MSM_VFE_LINE_NUM]; > int i, j; > int ret; > > @@ -1194,7 +1194,7 @@ static int vfe_set_clock_rates(struct vfe_device *vfe) > */ > static int vfe_check_clock_rates(struct vfe_device *vfe) > { > - u32 pixel_clock[MSM_VFE_LINE_NUM]; > + u64 pixel_clock[MSM_VFE_LINE_NUM]; > int i, j; > int ret; > > diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c > index 8fefce57bc49f..eb55cf436b717 100644 > --- a/drivers/media/platform/qcom/camss/camss.c > +++ b/drivers/media/platform/qcom/camss/camss.c > @@ -555,7 +555,7 @@ struct media_entity *camss_find_sensor(struct media_entity *entity) > * > * Return 0 on success or a negative error code otherwise > */ > -int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock) > +int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock) > { > struct media_entity *sensor; > struct v4l2_subdev *subdev; > diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h > index 3a0484683cd6e..fabfce9a3496c 100644 > --- a/drivers/media/platform/qcom/camss/camss.h > +++ b/drivers/media/platform/qcom/camss/camss.h > @@ -108,7 +108,7 @@ int camss_enable_clocks(int nclocks, struct camss_clock *clock, > struct device *dev); > void camss_disable_clocks(int nclocks, struct camss_clock *clock); > struct media_entity *camss_find_sensor(struct media_entity *entity); > -int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock); > +int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock); > int camss_pm_domain_on(struct camss *camss, int id); > void camss_pm_domain_off(struct camss *camss, int id); > void camss_delete(struct camss *camss); > -- > 2.30.0 >