From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D9B8C433E2 for ; Tue, 8 Sep 2020 17:04:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D91A52087C for ; Tue, 8 Sep 2020 17:04:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599584692; bh=h3cv+RDjlk7wmtLDNSrx814csKm6m7ct3iSQIbcOg/E=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=OKatzegpuOrkgMDohdNFGazRJYuCgxQfa67yAToQmDXLkJ4WxaDCgQVvd7K1wbqwQ vqHAPNSpYhzTbtj7Ui5byLiXSnRzks0vgRRYheYWxXh5KzEwEKGp0MMztk3dzHvuH0 jRXfb38XXIyCMhj/KzsBXlXKcpLpmBjLr55EOuNA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731884AbgIHREw (ORCPT ); Tue, 8 Sep 2020 13:04:52 -0400 Received: from mail.kernel.org ([198.145.29.99]:58436 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731836AbgIHQTo (ORCPT ); Tue, 8 Sep 2020 12:19:44 -0400 Received: from mail-vk1-f169.google.com (mail-vk1-f169.google.com [209.85.221.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D251621D41 for ; Tue, 8 Sep 2020 11:56:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599566219; bh=h3cv+RDjlk7wmtLDNSrx814csKm6m7ct3iSQIbcOg/E=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=IbjSqtIF1TJJuBu197Ffb0ftjzwrp79UjzhpZGFfYZQpPM4sW2yH/p0uJnTCwnLI9 Gc5uwheqxkQOIqwi/2gvYq07TlJD03asJMUVwx5qRErkhjFwvOL4vU26B9skjfZpul 7mizF9BQQCTsu8WVBP5h1HJHW7p0cYOcZ/te/4wI= Received: by mail-vk1-f169.google.com with SMTP id x142so4001400vke.0 for ; Tue, 08 Sep 2020 04:56:58 -0700 (PDT) X-Gm-Message-State: AOAM5319TVIY++BGIKvZPdUstmfx5BFCb3iZNgfyJ+2H7PNX9J8zqOhI PRc6T0Itx4vw5HeudmNAx/YtUasS4RkXheHbLA2kZA== X-Google-Smtp-Source: ABdhPJxvKv+NiIR52wR1XowSSPT+PZ4GJxVsBTin1GaHc/2WNVEmYNU5vtdL9uz3C8HX7BrRbPPW5oa4vjLLPudWWH8= X-Received: by 2002:a1f:2507:: with SMTP id l7mr3434112vkl.35.1599566218024; Tue, 08 Sep 2020 04:56:58 -0700 (PDT) MIME-Version: 1.0 References: <20200908075716.30357-1-manivannan.sadhasivam@linaro.org> <20200908075716.30357-3-manivannan.sadhasivam@linaro.org> In-Reply-To: <20200908075716.30357-3-manivannan.sadhasivam@linaro.org> From: Amit Kucheria Date: Tue, 8 Sep 2020 17:26:47 +0530 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/7] arm64: dts: qcom: sm8250: Add cpufreq hw node To: Manivannan Sadhasivam Cc: "Rafael J. Wysocki" , Viresh Kumar , Rob Herring , Andy Gross , Bjorn Andersson , Linux PM list , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , linux-arm-msm , Dmitry Baryshkov , Taniya Das Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, Sep 8, 2020 at 1:27 PM Manivannan Sadhasivam wrote: > > From: Bjorn Andersson > > Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores > on SM8250 SoCs. > > Signed-off-by: Bjorn Andersson > Signed-off-by: Manivannan Sadhasivam Reviewed-by: Amit Kucheria > --- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index e7d139e1a6ce..aafb46a26a9c 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -87,6 +87,7 @@ > reg = <0x0 0x0>; > enable-method = "psci"; > next-level-cache = <&L2_0>; > + qcom,freq-domain = <&cpufreq_hw 0>; > L2_0: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -102,6 +103,7 @@ > reg = <0x0 0x100>; > enable-method = "psci"; > next-level-cache = <&L2_100>; > + qcom,freq-domain = <&cpufreq_hw 0>; > L2_100: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -114,6 +116,7 @@ > reg = <0x0 0x200>; > enable-method = "psci"; > next-level-cache = <&L2_200>; > + qcom,freq-domain = <&cpufreq_hw 0>; > L2_200: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -126,6 +129,7 @@ > reg = <0x0 0x300>; > enable-method = "psci"; > next-level-cache = <&L2_300>; > + qcom,freq-domain = <&cpufreq_hw 0>; > L2_300: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -138,6 +142,7 @@ > reg = <0x0 0x400>; > enable-method = "psci"; > next-level-cache = <&L2_400>; > + qcom,freq-domain = <&cpufreq_hw 1>; > L2_400: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -150,6 +155,7 @@ > reg = <0x0 0x500>; > enable-method = "psci"; > next-level-cache = <&L2_500>; > + qcom,freq-domain = <&cpufreq_hw 1>; > L2_500: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -163,6 +169,7 @@ > reg = <0x0 0x600>; > enable-method = "psci"; > next-level-cache = <&L2_600>; > + qcom,freq-domain = <&cpufreq_hw 1>; > L2_600: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -175,6 +182,7 @@ > reg = <0x0 0x700>; > enable-method = "psci"; > next-level-cache = <&L2_700>; > + qcom,freq-domain = <&cpufreq_hw 2>; > L2_700: l2-cache { > compatible = "cache"; > next-level-cache = <&L3_0>; > @@ -2076,6 +2084,20 @@ > }; > }; > }; > + > + cpufreq_hw: cpufreq@18591000 { > + compatible = "qcom,sm8250-epss"; > + reg = <0 0x18591000 0 0x1000>, > + <0 0x18592000 0 0x1000>, > + <0 0x18593000 0 0x1000>; > + reg-names = "freq-domain0", "freq-domain1", > + "freq-domain2"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; > + clock-names = "xo", "alternate"; > + > + #freq-domain-cells = <1>; > + }; > }; > > timer { > -- > 2.17.1 >