From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1049CC07E96 for ; Tue, 6 Jul 2021 14:39:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ECE11611AD for ; Tue, 6 Jul 2021 14:39:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232480AbhGFOlt (ORCPT ); Tue, 6 Jul 2021 10:41:49 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:52733 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232527AbhGFOls (ORCPT ); Tue, 6 Jul 2021 10:41:48 -0400 Received: from mail-wm1-f47.google.com ([209.85.128.47]) by mrelayeu.kundenserver.de (mreue012 [213.165.67.97]) with ESMTPSA (Nemesis) id 1Mae7u-1lUSTw2pJq-00cChf for ; Tue, 06 Jul 2021 16:30:50 +0200 Received: by mail-wm1-f47.google.com with SMTP id g10so7873806wmh.2 for ; Tue, 06 Jul 2021 07:30:50 -0700 (PDT) X-Gm-Message-State: AOAM530V2E2JrD4gCbBLxGuxnVCf1jvCYBayjQSHVccbfU18QLkkDS3D WTW9s33YXT9y5OI6TauFexHll+uHi2BpI6Ja7lI= X-Google-Smtp-Source: ABdhPJwjGcsb8QX7KR+y5dhq1rdJJfs2xmRDD56swcSUod9PkkjY20gqBu2JjgAr8kkaWEAWJO9jcpljutP9zo7GaRw= X-Received: by 2002:a1c:c90f:: with SMTP id f15mr1126879wmb.142.1625581850346; Tue, 06 Jul 2021 07:30:50 -0700 (PDT) MIME-Version: 1.0 References: <20210527124356.22367-1-will@kernel.org> <20210706102634.GB24903@arm.com> <59800d6c-364a-f4be-e341-c5b531657ba3@arm.com> <20210706133314.GB20327@willie-the-truck> In-Reply-To: From: Arnd Bergmann Date: Tue, 6 Jul 2021 16:30:34 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) To: Marc Zyngier Cc: Will Deacon , Robin Murphy , Catalin Marinas , Yassine Oudjana , Ard Biesheuvel , Android Kernel Team , Linux ARM , Mark Rutland , Vincent Whitchurch , linux-arm-msm Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:/mWEPK4Z+zy5bjPjyvfCSuehQCBBwX9NsFo8lNrvyc2B3io5q0i zGuHvo98JHLQ5NggNNftIseuML+CeAq8t37hR34Kj4+CGxr3Wx29/v87NQPKBA7Rt4y7XiV tDDJLFLXWHn8R2cM8omDoD+Pjlw01SkDFdjgZ7jNUFpW/L2xgEHKo4PT6dMv1vNd4lQEHx0 jqNlA7/6COlq4ajdb1JIw== X-UI-Out-Filterresults: notjunk:1;V03:K0:vfojltf3ngc=:thQja4WO6/vJHt2hGZIjzm G3Kf6mf8VzZ+mhMuiLy5VVkhjZkBlPzDH2yHetVgPgElgDahGDuSjZ1+Xyntvj1mgORU5QZoW Qeb4caszOjVJV2opVvVh63jNgFE1qxwX1wdvtfe68wXZNXOppr/tuOJp5U6ARCeyL27MH0NvA upEN6g3FeUHkYkdNyh7RdMWDKJg+t7Cmcxe77KTl2xgnvIpYdV3TWfLdWR4rgpK1//+p6ExaI oYy/DJoqblKbMvPjWuLJ8GMUXd0EDS7N2LlO8rw0syaO36e6qzJ44O2jDtLO2cMPCaJdPsSac 2SX1r9ldwc02U41GWZSkXvTycVwKjG1pzwBzk5COGfQd/ww1UeqMR5H+aeRN9ZqyHbSTHEK+x NOgXxbHlGSaEDnOuEp+uiqwqaNNOzicA2QQVPA6Oss++8oENLr4LUNOHtnf/RCaIZPp/Q7uLJ NMo1Uba2rdBBiMLhU9TL42+TsPNJkdr9QOIwCPcGdfgAGMf4C/ZOiXCVn3Yc9pM6+2ruR2a+J hxkUFHzPFGy0PgGftdU29m1vzCtyoF1GcgHJ8cQfOyGluOhsSWNv+id9nfx7tyNwkEBCE+m1W y6gKpBhHxIY7zfp7dWvWyvGOwf+ys6PpzxLPG+q7bJLGbdM3it/tNZxOS9O+ThxkF/gU4bY7y fOEBxwUIN5EK3XsN0tm43vW4qpIXUl5aiPDt5DXKNS9UNYaObEIH4qdeZ6Q9RFbGMoH6P4U09 wnS4mxK5/XExq8/QhfsXZ6mVlEht7J1U+ceCfkCIrqf2Zp4cFyyVkik5fhq3zOYOv7WEZHodb nFsAOGLIVHSUJx0JnFIa2vBGB0aB8n9ML+ZRS0H2ZZiKub2F58Z6SlShWQZQAY6bexCdD1L Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue, Jul 6, 2021 at 3:44 PM Marc Zyngier wrote: > > On 2021-07-06 14:33, Will Deacon wrote: > > On Tue, Jul 06, 2021 at 02:29:07PM +0100, Robin Murphy wrote: > > > > I can't find much information about the original Kryo core at all... > > I have similar issues with my QDF2400. The UART, RTC and DMA controllers > are all screaming at me. I'm confident that the UART doesn't do any > DMA (it is handled by the SBSA driver), but the DMA controllers are > probably doing what it says on the tin. But that's a server chip, surely the DMA controller is fully cache coherent as required by SBSA? (please?) Maybe just a misannotation on the device node? > Do we know whether Falkor and Kryo share any part of their design? I'm fairly sure the Snapdragon 821 / msm8996 is not cache coherent. I can only speculate on how much got reused between the two, but as Falkor was released only after they had already given up on the full-custom Kryo core, it's plausible that it incorporates bits from that one. In particular the cache controller is probably easy to reuse even if the rest of it was a new design. Arnd