From: Ulf Hansson <ulf.hansson@linaro.org>
To: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Asutosh Das <asutoshd@codeaurora.org>,
Sahitya Tummala <stummala@codeaurora.org>,
Sayali Lokhande <sayalil@codeaurora.org>,
cang@codeaurora.org, Ram Prakash Gupta <rampraka@codeaurora.org>,
Doug Anderson <dianders@google.com>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>
Subject: Re: [PATCH V3] dt-bindings: mmc: sdhci-msm: Add CQE reg map
Date: Wed, 4 Mar 2020 16:34:43 +0100 [thread overview]
Message-ID: <CAPDyKFok8p+yuokLBZX3RF5U6SQYMKKeDf=co1-WzotBQzprQg@mail.gmail.com> (raw)
In-Reply-To: <1582545470-11530-1-git-send-email-vbadigan@codeaurora.org>
On Mon, 24 Feb 2020 at 12:58, Veerabhadrarao Badiganti
<vbadigan@codeaurora.org> wrote:
>
> CQE feature has been enabled on sdhci-msm. Add CQE reg map
> and reg names that need to be supplied for supporting CQE feature.
>
> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Applied for next, thanks!
Kind regards
Uffe
> ---
> Changes since V2:
> - Dropped _mem suffix to reg names.
>
> Changes since V1:
> - Updated description for more clarity & Fixed typos.
> ---
> Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index 7ee639b..5445931 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -26,7 +26,13 @@ Required properties:
>
> - reg: Base address and length of the register in the following order:
> - Host controller register map (required)
> - - SD Core register map (required for msm-v4 and below)
> + - SD Core register map (required for controllers earlier than msm-v5)
> + - CQE register map (Optional, CQE support is present on SDHC instance meant
> + for eMMC and version v4.2 and above)
> +- reg-names: When CQE register map is supplied, below reg-names are required
> + - "hc" for Host controller register map
> + - "core" for SD core register map
> + - "cqhci" for CQE register map
> - interrupts: Should contain an interrupt-specifiers for the interrupts:
> - Host controller interrupt (required)
> - pinctrl-names: Should contain only one value - "default".
> --
> Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc., is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
prev parent reply other threads:[~2020-03-04 15:35 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-11 15:29 [PATCH V1] dt-bindings: mmc: sdhci-msm: Add CQE reg map Veerabhadrarao Badiganti
2020-02-11 16:42 ` Doug Anderson
2020-02-12 12:00 ` Veerabhadrarao Badiganti
2020-02-12 23:21 ` Doug Anderson
2020-02-14 11:45 ` [PATCH V2] " Veerabhadrarao Badiganti
2020-02-19 20:08 ` Rob Herring
2020-02-24 11:44 ` Veerabhadrarao Badiganti
2020-02-24 11:57 ` [PATCH V3] " Veerabhadrarao Badiganti
2020-02-27 20:54 ` Doug Anderson
2020-02-28 15:10 ` Rob Herring
2020-03-04 15:34 ` Ulf Hansson [this message]
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