From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82D64C04AB5 for ; Mon, 3 Jun 2019 11:27:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5A3DD27BCA for ; Mon, 3 Jun 2019 11:27:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=arista.com header.i=@arista.com header.b="Y+yacQIv" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728320AbfFCL1t (ORCPT ); Mon, 3 Jun 2019 07:27:49 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:43534 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727853AbfFCL1t (ORCPT ); Mon, 3 Jun 2019 07:27:49 -0400 Received: by mail-pf1-f194.google.com with SMTP id c6so10442607pfa.10 for ; Mon, 03 Jun 2019 04:27:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arista.com; s=googlenew; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yge3w9rHbWgvobFZbFOeEgA2IlTICZ6Y6fbhlA0nby0=; b=Y+yacQIvPCAiHgjTQHZU0FVoG9I2CbtFWh1hmP9jN5AY8VLFjiX+k6xtFzH0HNGzit O8+HuDE7HRrRPCKpVtBjzFEjUib45UJWNrACrI5dtMn5dhL7BYlOQviAmeCacyysnT/n Xvty8zwlPZ+u8dVb5gfg1+6bj4mdWhGmOj9ZV4LWheZdjBeBpOVrxXrNWXT+AbiGMNl2 Yu+vBF4TlQWGZi8Dq4zfPpETqkKfLGxVZb/314XRDJcA/hQwkyrur5b+hi4Dx4U2BziM nnSr7BJ7sU2o9o3B6SunhLofFsrm83s3EU1wt5ZiCI98JrmP0w6INx6y8G5bvgNUiRxA ZVIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yge3w9rHbWgvobFZbFOeEgA2IlTICZ6Y6fbhlA0nby0=; b=s61SqGIVjEKYqUUNMNZ7tLowseFaQps/TTplVSi19CvHjprnHeHN3p/wfb3XrwVu1J cnCjj2H7oHJ8BcxQOI5i/u9lI3sXgEDFUTAYhKCfxWtywkpJCiSEmulHvMjY394HvnhR M53KfP10jZjawFlghArLXlsbgFatNtumRbbyd6oTU4hfkuGq8b/xmVODxQECgFJ7XGBA ggvSlxoYNpk/C5qO7e56Ydc2v4e/E4v20wuLUehZ52yE7p2VQfYNoi7ynaZN93J2blVT Crg/DT7TM7T0W7+PgoZ1rMm4kQt6VN+euAhggetjTZWT/6+HhkWLaW1ntM3DRY9Zub0j lTOw== X-Gm-Message-State: APjAAAW3JXp5FFjPoNGwjU/ekCFcRYKqcSrgtpwCLGkrR7XlAnRSpGaj 93NQrtk8rGlQ34ezfEjwnPD3qK56JP17eSQbqw2QiQ== X-Google-Smtp-Source: APXvYqzSN6KszB00jgSY5jsJHGaLYRRvYWrgtbKYUHrE3f1JWTjJzTyKXde3mFVwC5OO8+m15yXDYPFToKa7arJ98wc= X-Received: by 2002:a62:4d03:: with SMTP id a3mr30832487pfb.2.1559561268802; Mon, 03 Jun 2019 04:27:48 -0700 (PDT) MIME-Version: 1.0 References: <20190506185207.31069-1-tmurphy@arista.com> <20190603105158.GL12745@8bytes.org> In-Reply-To: <20190603105158.GL12745@8bytes.org> From: Tom Murphy Date: Mon, 3 Jun 2019 12:27:37 +0100 Message-ID: Subject: Re: [PATCH v3 0/4] iommu/amd: Convert the AMD iommu driver to the dma-iommu api To: Joerg Roedel Cc: iommu@lists.linux-foundation.org, Tom Murphy , Will Deacon , Robin Murphy , Marek Szyprowski , Kukjin Kim , Krzysztof Kozlowski , David Woodhouse , Andy Gross , David Brown , Matthias Brugger , Rob Clark , Heiko Stuebner , Gerald Schaefer , Thierry Reding , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-tegra@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Mon, Jun 3, 2019 at 11:52 AM Joerg Roedel wrote: > > Hi Tom, > > On Mon, May 06, 2019 at 07:52:02PM +0100, Tom Murphy wrote: > > Convert the AMD iommu driver to the dma-iommu api. Remove the iova > > handling and reserve region code from the AMD iommu driver. > > Thank you for your work on this! I appreciate that much, but I am not > sure we are ready to make that move for the AMD and Intel IOMMU drivers > yet. > > My main concern right now is that these changes will add a per-page > table lock into the fast-path for dma-mapping operations. There has been > much work in the past to remove all locking from these code-paths and > make it scalable on x86. Where is the locking introduced? intel doesn't use a lock in it's iommu_map function: https://github.com/torvalds/linux/blob/f2c7c76c5d0a443053e94adb9f0918fa2fb85c3a/drivers/iommu/intel-iommu.c#L5302 because it cleverly uses cmpxchg64 to avoid using locks: https://github.com/torvalds/linux/blob/f2c7c76c5d0a443053e94adb9f0918fa2fb85c3a/drivers/iommu/intel-iommu.c#L900 And the locking in AMD's iommu_map function can be removed (and i have removed it in my patch set) because it does that same thing as intel: https://github.com/torvalds/linux/blob/f2c7c76c5d0a443053e94adb9f0918fa2fb85c3a/drivers/iommu/amd_iommu.c#L1486 Is there something I'm missing? > > The dma-ops implementations in the x86 IOMMU drivers have the benefit > that they can call their page-table manipulation functions directly and > without locks, because they can make the necessary assumptions. The > IOMMU-API mapping/unmapping path can't make these assumptions because it > is also used for non-DMA-API use-cases. > > So before we can move the AMD and Intel drivers to the generic DMA-API > implementation we need to solve this problem to not introduce new > scalability regressions. > > Regards, > > Joerg >