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Thu, 29 Oct 2020 15:12:47 -0700 (PDT) From: Jingoo Han To: Rob Herring , Lorenzo Pieralisi CC: "linux-pci@vger.kernel.org" , Andy Gross , Binghui Wang , Bjorn Andersson , Bjorn Helgaas , Fabio Estevam , Gustavo Pimentel , Jerome Brunet , Jesper Nilsson , Jonathan Chocron , Jonathan Hunter , Kevin Hilman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Kukjin Kim , Kunihiko Hayashi , "linux-amlogic@lists.infradead.org" , "linux-arm-kernel@axis.com" , "linux-arm-msm@vger.kernel.org" , "linux-omap@vger.kernel.org" , "linuxppc-dev@lists.ozlabs.org" , "linux-samsung-soc@vger.kernel.org" , "linux-tegra@vger.kernel.org" , Lucas Stach , Martin Blumenstingl , Masahiro Yamada , Minghuan Lian , Mingkai Hu , Murali Karicheri , Neil Armstrong , NXP Linux Team , Pengutronix Kernel Team , Pratyush Anand , Richard Zhu , Roy Zang , Sascha Hauer , Shawn Guo , Stanimir Varbanov , Thierry Reding , Thomas Petazzoni , Xiaowei Song , Yue Wang , Han Jingoo Subject: Re: [PATCH 05/13] PCI: dwc: Ensure all outbound ATU windows are reset Thread-Topic: [PATCH 05/13] PCI: dwc: Ensure all outbound ATU windows are reset Thread-Index: AQHWrWuC4GikzhqGKUGSkw9tkhUTo6mvJla0 X-MS-Exchange-MessageSentRepresentingType: 1 Date: Thu, 29 Oct 2020 22:12:36 +0000 Message-ID: References: <20201028204646.356535-1-robh@kernel.org> <20201028204646.356535-6-robh@kernel.org> In-Reply-To: <20201028204646.356535-6-robh@kernel.org> Accept-Language: ko-KR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-Exchange-Organization-SCL: -1 X-MS-TNEF-Correlator: X-MS-Exchange-Organization-RecordReviewCfmType: 0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 10/28/20, 4:47 PM, Rob Herring wrote: >=20 > The Layerscape driver clears the ATU registers which may have been > configured by the bootloader. Any driver could have the same issue > and doing it for all drivers doesn't hurt, so let's move it into the > common DWC code. > > Cc: Minghuan Lian > Cc: Mingkai Hu > Cc: Roy Zang > Cc: Lorenzo Pieralisi > Cc: Bjorn Helgaas > Cc: Jingoo Han Acked-by: Jingoo Han Best regards, Jingoo Han > Cc: Gustavo Pimentel > Cc: linuxppc-dev@lists.ozlabs.org > Signed-off-by: Rob Herring > --- > drivers/pci/controller/dwc/pci-layerscape.c | 14 -------------- > drivers/pci/controller/dwc/pcie-designware-host.c | 5 +++++ > 2 files changed, 5 insertions(+), 14 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/c= ontroller/dwc/pci-layerscape.c > index f24f79a70d9a..53e56d54c482 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape.c > +++ b/drivers/pci/controller/dwc/pci-layerscape.c > @@ -83,14 +83,6 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie= ) > iowrite32(val, pci->dbi_base + PCIE_STRFMR1); > } > =20 > -static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie) > -{ > - int i; > - > - for (i =3D 0; i < PCIE_IATU_NUM; i++) > - dw_pcie_disable_atu(pcie->pci, i, DW_PCIE_REGION_OUTBOUND); > -} > - > static int ls1021_pcie_link_up(struct dw_pcie *pci) > { > u32 state; > @@ -136,12 +128,6 @@ static int ls_pcie_host_init(struct pcie_port *pp) > struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); > struct ls_pcie *pcie =3D to_ls_pcie(pci); > =20 > - /* > - * Disable outbound windows configured by the bootloader to avoid > - * one transaction hitting multiple outbound windows. > - * dw_pcie_setup_rc() will reconfigure the outbound windows. > - */ > - ls_pcie_disable_outbound_atus(pcie); > ls_pcie_fix_error_response(pcie); > =20 > dw_pcie_dbi_ro_wr_en(pci); > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers= /pci/controller/dwc/pcie-designware-host.c > index cde45b2076ee..265a48f1a0ae 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -534,6 +534,7 @@ static struct pci_ops dw_pcie_ops =3D { > =20 > void dw_pcie_setup_rc(struct pcie_port *pp) > { > + int i; > u32 val, ctrl, num_ctrls; > struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); > =20 > @@ -583,6 +584,10 @@ void dw_pcie_setup_rc(struct pcie_port *pp) > PCI_COMMAND_MASTER | PCI_COMMAND_SERR; > dw_pcie_writel_dbi(pci, PCI_COMMAND, val); > =20 > + /* Ensure all outbound windows are disabled so there are multiple matc= hes */ > + for (i =3D 0; i < pci->num_viewport; i++) > + dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND); > + > /* > * If the platform provides its own child bus config accesses, it mean= s > * the platform uses its own address translation component rather than > --=20 > 2.25.1