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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id c12sm1949076oov.11.2021.06.18.11.16.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Jun 2021 11:16:40 -0700 (PDT) Date: Fri, 18 Jun 2021 13:16:38 -0500 From: Bjorn Andersson To: Thara Gopinath Cc: agross@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, viresh.kumar@linaro.org, rjw@rjwysocki.net, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 3/5] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support Message-ID: References: <20210608222926.2707768-1-thara.gopinath@linaro.org> <20210608222926.2707768-4-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210608222926.2707768-4-thara.gopinath@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Tue 08 Jun 17:29 CDT 2021, Thara Gopinath wrote: > diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c [..] > @@ -305,6 +383,8 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > > index = args.args[0]; > > + lmh_mitigation_enabled = of_property_read_bool(pdev->dev.of_node, "qcom,support-lmh"); Rather than adding a new interrupt _and_ a flag to tell the driver that this new interrupt should be used, wouldn't it be sufficient to just see if the interrupt is specified? > + > res = platform_get_resource(pdev, IORESOURCE_MEM, index); > if (!res) { > dev_err(dev, "failed to get mem resource %d\n", index); > @@ -329,6 +409,11 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > goto unmap_base; > } > > + if (!alloc_cpumask_var(&data->cpus, GFP_KERNEL)) { > + ret = -ENOMEM; > + goto unmap_base; > + } > + > data->soc_data = of_device_get_match_data(&pdev->dev); > data->base = base; > data->res = res; > @@ -347,6 +432,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > goto error; > } > > + cpumask_copy(data->cpus, policy->cpus); > policy->driver_data = data; > > ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy); > @@ -370,6 +456,20 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) > dev_warn(cpu_dev, "failed to enable boost: %d\n", ret); > } > > + if (lmh_mitigation_enabled) { > + data->lmh_dcvs_irq = platform_get_irq(pdev, index); > + if (data->lmh_dcvs_irq < 0) { This will be -ENXIO if the interrupt isn't specified and <0 for other errors, so you should be able to distinguish the two failure cases. Regards, Bjorn > + ret = data->lmh_dcvs_irq; > + goto error; > + } > + ret = devm_request_irq(dev, data->lmh_dcvs_irq, qcom_lmh_dcvs_handle_irq, > + 0, "dcvsh-irq", data); > + if (ret) { > + dev_err(dev, "Error %d registering irq %x\n", ret, data->lmh_dcvs_irq); > + goto error; > + } > + INIT_DEFERRABLE_WORK(&data->lmh_dcvs_poll_work, qcom_lmh_dcvs_poll); > + } > return 0; > error: > kfree(data); > -- > 2.25.1 >